Computer System and Network

COMPUTER SYSTEM & NETWORK

(COMP 23)ENCODED BY: PREPARED BY: DONDON LEDAMA MARL T. GONZALEZSCHOOL ADMINISTRATOR

LESSON I: Introduction

1f.c. ledesma avenue, san carlos city, negros occidental Tel. #: (034) 312-6189 / (034) 729-4327

Computer System Components Recent advances in microelectronic technology have made computers an integral part of our society. Each step in our everyday lives maybe influenced by computer technology: we awake to a digital alarm clocks beaming of reselected music at the right time, drive to work in a digital alarm clocks beaming of reselected music at the right time, drive to work in a digital-processor-controlled automobile, work in an extensively automated office, shop for computer-coded grocery items and return to rest in the computer-regulated heating and cooling environment of our homes. It may not be necessary to understand the detailed operating principles of a jet plane or an automobile on order to use and enjoy the benefits of these technical marvels. But a fair understanding of the operating principles, capabilities, and limitations of digital computers is necessary, if we would use them in an efficient manner. This book is designed to give such an understanding of the operating principles of digital computers. This chapter will begin by describing the organization of a general-purpose digital computer system and then will briefly trace the evolution of computers. The diagram shows a general view of how desktop and workstation computers are organized. Different systems have different details, but in general all computers consist of components (processor, memory, controllers, video) connected together with a bus. Physically, a bus consists of many parallel wires, usually printed (in copper) on the main circuit board of the computer. Data signals, clock signals, and control signals are sent on the bus back and forth between components. A particular type of bus follows a carefully written standard that describes the signals that are carried on the wires and what the signals mean. The PCI standard (for example) describes the PCI bus used on most current PCs.

The processor continuously executes the machine cycle, executing machine instructions one by one. Most instructions are for an arithmetical, a logical, or a control operation. A machine operation often involves access to main storage or involves an I/O


controller. If so, the machine operation puts data and control signals on the bus, and (may) wait for data and control signals to return. Some machine operations take place entirely inside the processor (the bus is not involved). These operations are very fast. Input/output Controllers The way in which devices connected to a bus cooperate is another part of a bus standard. Input/output controllers receive input and output requests from the central processor, and then send device-specific control signals to the device they control. They also manage the data flow to and from the device. This frees the central processor from involvement with the details of controlling each device. I/O controllers are needed only for those I/O devices that are part of the system. Often the I/O controllers are part of the electronics on the main circuit board (the mother board) of the computer. Sometimes an uncommon device requires its own controller which must be plugged into a connector (an expansion slot) on the mother board. Main Memory In practice, data and instructions are often placed in different sections of memory, but this is a matter of software organization, not a hardware requirement. Also, most computers have special sections of memory that permanently hold programs (firmware stored in ROM), and other sections that are permanently used for special purposes. Main memory (also called main storage or just memory) holds the bit patterns of machine instructions and the bit patterns of data. Memory chips and the electronics that controls them are concerned only with saving bit patterns and returning them when requested. No distinction is made between bit patterns that are intended as instructions and bit patterns that are intended as data. The amount of memory on a system is often described in terms of: 210 = 1024 bytes. Megabyte: 220 = 1024 Kilobytes 30 = 1024 Gigabyte: 2 Megabytes 40 = 1024 Gigabytes Terabyte: 2 Kilobyte:


These days (Winter 2005) the amount of main memory in a new desktop computer ranges from 256 megabytes to 1 gigabyte. Hard disks and other secondary storage devices are tens or hundreds of gigabytes. Backup storage comes in sizes as large as several terabytes

Addresses Each byte of main storage has an address. Most modern processors use 32-bit addresses, so there are 232 possible addresses. Think of main storage as if it were an array: Byte [0x00000000 ... 0xFFFFFFFF] main Storage; A main storage address is an index into memory. A 32-bit address is the address of a single byte. Thirty-two wires of the bus contain an address (there are many more bus wires for timing and control). Sometimes people talk about addresses like 0x2000, which looks like a pattern of just 16 bits. But this is just an abbreviation for the full 32-bit address. The actual address is 0x00002000. The first MIPS processors (designed in 1985) used 32-bit addresses. From 1991 to present, top-end MIPS processors use 64-bit addresses. The MIPS32 chip is a modern chip designed for embedded applications. It uses 32-bit addresses, since embedded applications often don't need 64 bits. Recent processor chips from AMD and Intel have 64-bit addresses, although 32-bit versions are still available. The assembly language of this course is for the MIPS32 chip, so we will use 32-bit addresses. The assembly language of the 64-bit MIPS chips is similar.

The MIPS has an address space of 232 bytes. A Gigabyte is 230, so the MIPS have 4 gigabytes of address space. Ideally, all of these memory locations would be implemented using memory chips (usually called RAM). RAM costs about $200 per


gigabyte. Installing the maximum amount of memory as RAM would cost about $800. This might be more than you want to spend. Hard disk storage costs much less per gigabyte. Hard disks cost about $50 per gigabyte (winter, 2005).

On modern computers, the full address space is present no matter how much RAM has been installed. This is done by keeping some parts of the full address space on disk and some parts in RAM. The RAM, the hard disk, some special electronics, and the operating system work together to provide the full 32 bit address space. To a user or an applications programmer it looks as if all 232 bytes of main memory are present. This method of providing the full address space by using a combination of RAM memory and the hard disk is called virtual memory. The word virtual means "appearing to exist, but not really there." Some computer geeks have a virtual social life. Cache Memory Disk access is slow compared to RAM access. Potentially, using a combination of real memory and disk memory to implement the address space could greatly slow down program execution. However, with clever electronics and a good operating system, virtual memory is only slightly slower than physical memory. Computer systems also have cache memory. Cache memory is very fast RAM that is inside (or close to) the processor. It duplicates sections of main storage that are heavily used by the currently running programs. The processor does not have to use the


system bus to get or store data in cache memory. Access to cache memory is much faster than to normal main memory. Like virtual memory, cache memory is invisible to most programs. It is an electronic detail below the level of abstraction provided by assembly language. Hardware keeps cache up to date and in synch with main storage. Your programs are unaware that there is cache memory and virtual memory. They just see "main memory". Application programs don't contain instructions that say "store this in cache memory", or say "get this from virtual memory". They only refer to the contents of main memory at a particular address. The hardware makes sure that the program gets or stores the correct byte, no matter where it really is.

Contents of Memory The memory system merely stores bit patterns. That some of these patterns represent integers, that some represent characters, and that some represent instructions (and so on) is of no concern to the electronics. How these patterns are used depends on the programs that use them. A word processor program, for example, is written to process patterns that represent characters. A spreadsheet program processes patterns that represent numbers. Of course, most programs process several types of data, and must keep track of how each is used. Often programs keep the various uses of memory in separate sections, but that is a programming convention, not a requirement of electronics. Any byte in main storage can contain any 8-bit pattern. No byte of main storage can contain anything but an 8-bit pattern. There is nothing in the memory system of a computer that says what a pattern represents. Computer System Organization Before we look at the C language, let us look at the overall organization of computing systems. Figure 1.1 shows a block diagram of a typical computer system. Notice it is divided into two major sections; hardware and software.


Computer Hardware The physical machine, consisting of electronic circuits, is called the hardware. It consists of several major units: the Central P r o c e s si n g Unit (CPU), M a i n Memory, Secondary Memory and Peripherals. The CPU is the major component of a computer; the `èlectronic brain'' of the machine. It consists of the electronic circuits needed to perform operations on the data. Main Memory is where programs that are currently being executed as well as their data are stored. The CPU fetches program instructions in sequence, together with the required data, from Main Memory and then performs the operation specified by the instruction. Information may be both read from and written to any location in Main Memory so the devices used to implement this block are called random access memory chips (RAM). The contents of Main Memory (often simply called memory) are both temporary (the programs and data reside there only when they are needed) and volatile (the contents are lost when power to the machine is turned off). The Secondary Memory provides more long term and stable storage for both programs and data. In modern computing systems this Secondary Memory is most often implemented using rotating magnetic storage devices, more commonly called disks (though magnetic tape may also be used); therefore, Secondary Memory is often referred to as the disk. The physical devices making up Secondary Memory, the disk


drives are also known as mass storage devices because relatively large amounts of data and many programs may be stored on them. The disk drives making up Secondary Memory are one form of Input/Output (I/O) device since they provide a means for information to be brought into (input) and taken out of (output) the CPU and its memory. Other forms of I/O devices which transfer information between humans and the computer are represented by the Peripherals box in Figure 1.1. These Peripherals include of devices such as terminals -- a keyboard (and optional mouse) for input and a video screen for output, high-speed printers, and possibly floppy disk drives and tape drives for permanent, removable storage of data and programs. Other I/O devices may include high-speed optical scanners, plotters, multi-user and graphics terminals, networking hardware, etc. In general, these devices provide the physical interface between the computer and its environment by allowing humans or even other machines to communicate with the computer. Computer Software -- The Operating System Hardware is called ``hard'' because, once it is built, it is relatively difficult to change. However, the hardware of a computer system, by itself, is useless. It must be given directions as to what to do, i.e. a program. These programs are called software; ``soft'' because it is relatively easy to change both the instructions in a particular program as well as which program is being executed by the hardware at any given time. When a computer system is purchased, the hardware comes with a certain amount of software which facilitates the use of the system. Other software to run on the system may be purchased and/or written by the user. Some major vendors of computer systems include: IBM, DEC, HP, AT&T, Sun, Compaq, and Apple. The remaining blocks in Figure 1.1 are typical software layers provided on most computing systems. This software may be thought of as having a hierarchical, layered structure, where each layer uses the facilities of layers below it. The four major blocks shown in the figure are the Operating System, Utilities, User Programs and Applications. The primary responsibility of the Operating System (OS) is to ``manage'' the ``resources'' provided by the hardware. Such management includes assigning areas of memory to different programs which are to be run, assigning one particular program to run on the CPU at a time, and controlling the peripheral devices. When a program is called upon to be executed (its operations performed), it must be loaded, i.e. moved from disk to an assigned area of memory. The OS may then direct the CPU to begin fetching instructions from this area. Other typical responsibilities of the OS include Secondary Storage management (assignment of space on the disk), a piece of software called the file system, and Security (protecting the programs and data of one user from activities of other users that may be on the same system).


Many mainframe machines normally use proprietary operating systems, such as VM and CMS (IBM) and VAX VMS and TOPS 20 (DEC). More recently, there is a move towards a standardized operating system and most workstations and desktops typically use UNIX (AT&T and other versions). A widely used operating system for IBM PC and compatible personal computers is DOS (Microsoft). Apple Macintosh machines are distinguished by an easy to use proprietary operating system with graphical icons. Utility Programs The layer above the OS is labeled Utilities and consists of several programs which are primarily responsible for the logical interface with the user, i.e. the ``view'' the user has when interacting with the computer. (Sometimes this layer and the OS layer below are considered together as the operating system). Typical utilities include such programs as shells, text editors, compilers, and (sometimes) the file system. A shell is a program which serves as the primary interface between the user and the operating system. The shell is a ``command interpreter'', i.e. is prompts the user to enter commands for tasks which the user wants done, reads and interprets what the user enters, and directs the OS to perform the requested task. Such commands may call for the execution of another utility (such as a text editor or compiler) or a user program or application, the manipulation of the file system, or some system operation such as logging in or out. There are many variations on the types of shells available, from relatively simple command line interpreters (DOS) or more powerful command line interpreters (the Bourne Shell, sh, or C Shell, csh in the Unix environment), to more complex, but easy to use graphical user interfaces (the Macintosh or Windows). You should become familiar with the particular shell(s) available on the computer you are using, as it will be your primary means of access to the facilities of the machine. A text editor (as opposed to a word processor) is a program for entering programs and data and storing them in the computer. This information is organized as a unit called a file similar to a file in an office filing cabinet, only in this case it is stored on the disk. (Word processors are more complex than text editors in that they may automatically format the text, and are more properly considered applications than utilities). There are many text editors available (for example vi and emacs on Unix systems) and you should familiarize yourself with those available on your system. As was mentioned earlier, in today's computing environment, most programming is done in high level languages (HLL) such as C.However; the computer hardware cannot understand these languages directly. Instead, the CPU executes programs coded in a lower level language called the machine language. A utility called a compiler is program which translates the HLL program into a form understandable to the hardware. Again, there are many variations in compilers provided (for different languages, for example) as well as facilities provided with the compilers (some may have built-in text


editors or debugging features). Your system manuals can describe the features available on your system. Finally, another important utility (or task of the operating system) is to manage the file system for users. A file system is a collection of files in which a user keeps programs, data, text material, graphical images, etc. The file system provides a means for the user to organize files, giving them names and gathering them into directories (or folders) and to manage their file storage. Typical operations which may be done with files include creating new files, destroying, renaming, and copying files.

COMPUTER EVOLUTION 500 B.C. The 2/5 Abacus is invented by the Chinese. Find out more about the Abacus at "Abacus: The Art of Calculating with Beads" by Luis Fernandes.

1 A.D. The Antikythera Device, a mechanism that mimicked the actual movements of the sun, moon, and planets, past, present, and future. This technology was then lost for millennia.


1632

Wilhelm Schickard builds the first "automatic calculator", the "Calculating Clock" which was used for computing astronomical tables.

Wilhelm Schickard (born 1592 in Herrenberg - died 1635 in Tbingen) built the first automatic calculator in 1623. Contemporaries called this machine the Calculating Clock. It precedes the less versatile Pascaline of Blaise Pascal and the calculator of Gottfried Leibniz by twenty years. Schickard's letters to Johannes Kepler show how to use the machine for calculating astronomical tables. The machine could add and subtract six-digit numbers, and indicated an overflow of this capacity by ringing a bell; to aid more complex calculations, a set of Napier's bones were mounted on it. The designs were lost until the twentieth century; a working replica was finally constructed in 1960. Schickard's machine, however, was not programmable. The first design of a programmable computer came roughly 200 years later (Charles Babbage). And the first working program-controlled machine was completed more than 300 years later (Konrad Zuse's Z3, 1941). The Schickard crater on the moon is named after Schickard.

1642 Blaise Pascal, a French religious philosopher and mathematician, builds the first practical calculating machine. Thereby etching his name be resurrected later for the name of a, now programming language. 1830 The "Analytical Engine" is designed by Charles Babbage.

m echa nica l in history to a r c a n e ,

1850


Japanese refined the Abacus into the 1/5 with one bead on top deck and five on bottom deck. 1890 The U.S. Census Bureau adopts the Hollerith Punch Card, Tabulating Machine and Sorter to compile results of the 1890 census, reducing an almost 10-year process to 2 years, saving the government a whopping $5 million. Inventor Herman Hollerith, a Census Bureau statistician, forms the Tabulating Machine Company in 1896. The TMC eventually evolved into IBM. 1930 Abacus is again changed, to the 1/4 design. 1939 The first semi-electronic digital computing device is constructed by John Atanassoff. The "Mark I" Automatic Sequence Controlled Calculator, the first fully automatic calculator, is begun at Harvard by mathematician Howard Aiken. Its designed purpose was to generate ballistic tables for Navy artillery. 1941 German inventor Konrad Zuse produces the Z3 for use in aircraft and missile design but the German government misses the boat and does not support him. There is some debate as to whether the Mark I or the Z3 came first. 1943 English mathematician Alan Turing (bio by Andrew Hodges) begins operation of his secret computer for the British military. It was used by cryptographers to break secret German military codes. It was the first vacuum tube computer but its existence was not made public until decades later. 1946


Eniac (Electronic Numerical Integrator and Calculator), the first credited, all electronic computer is completed at the University of Pennsylvania. It used thousands of vacuum tubes. 1951 Seymour Cray gets his Masters degree in Applied Mathematics, soon after joins Engineering Research Associates and starts working on the 1100 series computers for what ended up being Univac. Remington's Univac I (Universal Automatic Computer), using a Teletype keyboard and printer for user interaction, and became the first commercially available computer. It could handle both numerical and alphabetic data.

1957 Bill Norris and friends start Control Data Corporation (CDC) bring Seymour Cray on-board and begin building Large Scale Scientific Computers. 1958 The first "integrated circuit" is designed by American Jack Kirby. It included resistors, capacitors and transistors on a single wafer chip. 1960 Digital Equipment delivers PDP-1, an interactive computer with CRT and keyboard. Its big screen inspires MIT students to write the world's first computer game. 1963 Sketchpad, first WYSIWYG interactive drawing tool, is published by Ivan Sutherland as his MIT doctoral thesis. 1965 Sutherland demonstrates first VR head-mounted 3-D display. Ted Nelson coins the terms hypertext and hypermedia in a paper at the Association for Computing Machinery's 20th national conference.


1968 Doug Engelbart demonstrates the first

mouse.

1970 First four nodes are established on Arpanet, precursor of the Internet and World Wide Web. 1971 IBM introduces the 3270 mainframe terminal; its character-based interface becomes the standard for business applications. The first "microprocessor" is produced by American engineer Marcian E. Hoff. 1972 First GUI appears as part of Xerox Parc's Smalltalk programming environment. Seymour Cray incorporates Cray Research. 1974 Xerox PARC researches create Alto, the first computer to use the WIMP interface. Altair 8800 microcomputer, based on Intel's 8080 processor; Interface uses toggle switches, LEDs.

1975 Bill Gates and Paul Allen create and license the first microcomputer version of Basic, for the Altair; Loads via a paper tape.


1977 Tandy (Radio Shack) produces the first practical personal computer, using a cassette tape drive for programs and storage. Apple ships Apple II, with integrated keyboard, 16-color graphics, and command-line disk operating system. 1978 At Apple Computer, Steve Jobs proposes a "next generation" business machine with graphical user interface. It becomes the Lisa project. Don Brickland and Bob Frankston's VisiCalc's text-based spreadsheet interface becomes the personal computer's first killer app, runs on Apple II. 1981 IBM releases the PC with 4.77 MHz, MS-DOS, command line interfaces, and monochrome block graphics.

1984 Apple ships the Macintosh, the first mass-market computer with a monochrome desktop GUI, plug and play, and suite of GUI productivity applications. 1985 Microsoft ships Windows 1.0, its first graphical environment.

1990 Microsoft announces Windows 3.0; adds 3-D look and feel, Program Manager and File Manager.

1992


Apple announces Newton PDA with pen-based user interface. 1993 Early Web Browsers: ECP Web browser for Macintosh released. NCSA releases Marc Andreessen's Mosaic Web browser for X Window. 1995 Microsoft introduces Bob, industry's first "Social User Interface", and featuring animated "assistants." Bob bombs. Watch the "Remembering the Bob" at Tech TV. Microsoft ships Windows 95, regarded by many as the release that offers features comparable with Apple's Mac. It's the fastest-selling operating system ever shipped. 1997 Microsoft Active Desktop integrates the Web with Windows. Netscape Communicator and Constellation combine Web and desktop GUI. Microsoft invests $150,000,000 in Apple Computers.

1998 Windows 98 released. A good portion of the world still using the abacus, maybe 2 people using the TRS-80.

Defining

the

Terms

Architecture,

Design,

and

Implementation

Introduction Over the past 10 years many practitioners and researchers have sought to define software architecture. At the SEI, we use the following definition: The software architecture of a program or computing system is the structure or structures of the system, which comprise software elements, the externally visible properties of those elements, and the relationships among them. However, we are interested not only in understanding the term software architecture but in clarifying the difference between architecture and other related terms such as design and implementation. The lack of a clear distinction among these terms


is the cause of much muddy thinking, imprecise communication, and wasted, overlapping effort. For example, architecture is often used as a mere synonym for design (sometimes preceded with the adjective high-level). And many people use the term architectural patterns as a synonym for design patterns. Confusion also stems from the use of the same specification language for both architectural and design specifications. For example, UML is often used as an architectural description language. In fact, UML has become the industry de facto standard for describing architectures, although it was specifically designed to manifest detailed design decisions (and this is still its most common use). This merely contributes to the confusion, since a designer using UML has no way (within UML) of distinguishing architectural information from other types of information. Confusion also exists with respect to the artifacts of design and implementation. UML class diagrams, for instance, are a prototypical artifact of the design phase. Nonetheless, class diagrams may accumulate enough detail to allow code generation of very detailed programs, an approach that is promoted by CASE tools such as Rational Rose and System Architect. Using the same specification language further blurs the distinction between artifacts of the design (class diagrams) and artifacts of the implementation (source code). Having a unified specification language is, in many ways, a good thing. But a user of this unified language is given little help in knowing if a proposed change is architectural or not. Why are we interested in such distinctions? Naturally, a well-defined language improves our understanding of the subject matter. With time, terms that are used interchangeably lose their meaning, resulting inevitably in ambiguous descriptions given by developers, and significant effort is wasted in discussions of the form by design I meanand by architecture I mean Seeking to separate architectural design from other design activities, definers of software architecture in the past have stressed the following: 1. Architecture is concerned with the selection of architectural elements, their interaction, and the constraints on those elements and their interactionsDesign is concerned with the modularization and detailed interfaces of the design elements, their algorithms and procedures, and the data types needed to support the architecture and to satisfy the requirements. 2. Software architecture is concerned with issues...beyond the algorithms and data structures of the computation. 3. Architectureis specifically not aboutdetails of implementations (e.g., algorithms and data structures.)Architectural design involves a richer collection of abstractions than is typically provided by OOD (object-oriented design).


In suggesting typical architectures and architectural styles, existing definitions consist of examples and offer anecdotes rather than providing clear and unambiguous notions. In practice, the terms architecture, design, and implementation appear to connote varying degrees of abstraction in the continuum between complete details (implementation), few details (design), and the highest form of abstraction (architecture). But the amount of detail alone is insufficient to characterize the differences, because architecture and design documents often contain detail that is not explicit in the implementation (e.g., design constraints, standards, performance goals). Thus, we would expect a distinction between these terms to be qualitative and not merely quantitative. The ontology that we provide below can serve as a reference point for these discussions. The Intension/Locality Thesis To elucidate the relationship between architecture, design, and implementation, we distinguish at least two separate interpretations for abstraction in our context: 1. Intensional (vs. extensional) design specifications are abstract in the sense that they can be formally characterized by the use of logic variables that range over an unbounded domain. For example, a layered architectural pattern does not restrict the architect to a specific number of layers; it applies equally well to 2 layers or 12 layers. 2. Non-local (vs. local) specifications are abstract in the sense that they apply to all parts of the system (as opposed to being limited to some part thereof). Both of these interpretations contribute to the distinction among architecture, design, and implementation, summarized as the intension/locality thesis: 1. Architectural specifications are intensional and non-local 2. Design specifications are intensional but local 3. Implementation specifications are both extensional and local

Table 1 summarizes these distinctions. Table 1. The Intension/Locality Thesis Architecture Design Implementation Intensional Intensional Extensional Non-local Local Local


Implications What are the implications of such definitions? They give us a firm basis for determining what is architectural (and hence crucial for the achievement of a systems quality attribute requirements) and what is not. Consider the concept of a strictly layered architecture (an architecture in which each layer is allowed to use only the layer immediately below it). How do we know that the architectural style layered is really architectural? To answer that we need to answer whether this style is intentional and whether it is local or non-local. First of all, are there an unbounded number of implementations that qualify as layered? Clearly there are. Secondly, is the layered style local or non-local? To answer that, we need only consider a violation of the style, where a layer depends on a layer above it, or several layers below it. Since this would be a violation wherever it occurred, the notion of a layered architecture must be non-local. What about a design pattern, such as the factory pattern? This is intensional, because there may be an unbounded number of realizations of a factory design pattern within a system. But is it local or non-local? One may use a design pattern in some corner of the system and not use it (or even violate it) in a different portion of the same system. So design patterns are local. Similarly, it is simple to show that the term implementation refers only to artifacts that are extensional and local.

Conclusions Since the inception of architecture as a distinct field of study, there has been much confusion about what the term architecture means. Similarly, the distinction between architecture and other forms of design artifacts has never been clear. The intension/locality thesis provides a foundation for determining the meaning of the terms architecture, design, and implementation that accords not only with intuition but also with best industrial practices. A more formal and complete treatment of this topic can be found in our paper, Architecture, Design, Implementation. But what are the consequences of precisely knowing the differences among these terms? Is this an exercise in definition for definitions sake? We think not. Among others, these distinctions facilitate 1. determining what constitutes a uniform program (e.g., a collection of modules that satisfy the same architectural specifications) 2. determining what information goes into architecture documents and what goes into design documents


3. determining what to examine and what not to examine in an architectural evaluation or a design walkthrough 4. understanding the distinction between local and non-local rules (i.e., between the design rules that are enforced throughout a project versus those that are of a more limited domain, because the architectural rules define the fabric of the system and how it will meet its quality attribute requirements, and the violation of architectural rules typically has more far-reaching consequences than the violation of a local rule) Furthermore, in the industrial practice of software architecture, many statements that are said to be architectural are in fact local (e.g., both tasks A and B execute on the same node, or task A controls B). Instead, a truly architectural statement would be, for instance, for each pair of tasks A,B that satisfy some property X, A and B will execute on the same node and the property Control(A,B) holds. More generally, for each specification we should be able to determine whether it is a design statement, describing a purely local phenomenon (and hence of secondary interest in architectural documentation, discussion, or analysis), or whether it is an instance of an underlying, more general rule. This is a powerful piece of information.

How you understand difference between architecture and design? I'd say that architecture is a view of software that's at a higher level than design, i.e. more abstract and less connected with the actual implementation. The architecture gives structure to the design elements, while the design elements give structure to the implemented code. The software architecture of a program or computing system is the structure or structures of the system, which comprise software elements, the externally visible properties of those elements, and the relationships among them. Design -- The process of defining the architecture, components, interfaces, and other characteristics of a system or component. So, Design is a process of producing an instance of Software architecture. Software architecture is a domain of knowledge about abstract models and organization. Software architecture is not a low-level design. I would add that architecture is design, but not all design is architecture.


LESSON II Combination Logic Introduction Digital electronics is classified into combinational logic and sequential logic. Combinational logic output depends on the inputs levels, whereas sequential logic output depends on stored levels and also the input levels.

The memory elements are devices capable of storing binary info. The binary info stored in the memory elements at any given time defines the state of the sequential circuit. The input and the present state of the memory element determine the output. Memory elements next state is also a function of external inputs and present state. A sequential circuit is specified by a time sequence of inputs, outputs, and internal states.


There are two types of sequential circuits. Their classification depends on the timing of their signals: Synchronous sequential circuits Asynchronous sequential circuits Asynchronous sequential circuit This is a system whose outputs depend upon the order in which its input variables change and can be affected at any instant of time. Gate-type asynchronous systems are basically combinational circuits with feedback paths. Because of the feedback among logic gates, the system may, at times, become unstable. Consequently they are not often used.

Synchronous sequential circuits This type of system uses storage elements called flip-flops that are employed to change their binary value only at discrete instants of time. Synchronous sequential circuits use logic gates and flip-flop storage devices. Sequential circuits have a clock signal as one of their inputs. All state transitions in such circuits occur only when the clock value is either 0 or 1 or happen at the rising or falling edges of the clock depending on the type of memory elements used in the circuit. Synchronization is achieved by a timing device called a clock pulse generator. Clock pulses are distributed throughout the system in such a way that the flip-flops are affected only with the arrival of the synchronization pulse. Synchronous sequential circuits that use clock pulses in the inputs are called clocked-sequential circuits. They are stable and their timing can easily be broken down into independent discrete steps, each of which is considered separately.


A clock signal is a periodic square wave that indefinitely switches from 0 to 1 and from 1 to 0 at fixed intervals. Clock cycle time or clock period: the time interval between two consecutive rising or falling edges of the clock. Clock Frequency = 1 / clock cycle time (measured in cycles per second or Hz) Example: Clock cycle time = 10ns clock frequency = 100Mhz Concept of Sequential Logic A sequential circuit as seen in the last page is combinational logic with some feedback to maintain its current value, like a memory cell. To understand the basics let's consider the basic feedback logic circuit below, which is a simple NOT gate whose output is connected to its input. The effect is that output oscillates between HIGH and LOW (i.e. 1 and 0). Oscillation frequency depends on gate delay and wire delay. Assuming a wire delay of 0 and a gate delay of 10ns, then oscillation frequency would be (on time + off time = 20ns) 50Mhz. The basic idea of having the feedback is to store the value or hold the value, but in the above circuit, output keeps toggling. We can overcome this problem with the circuit below, which is basically cascading two inverters, so that the feedback is in-phase, thus avoids toggling. The equivalent circuit is the same as having a buffer with its output connected to its input.

But there is a problem here too: each gate output value is stable, but what will it be? Or in other words buffer output can not be known. There is no way to tell. If we could know or set the value we would have a simple 1-bit storage/memory element.


The circuit below is the same as the inverters connected back to back with provision to set the state of each gate (NOR gate with both inputs shorted is like an inverter). I am not going to explain the operation, as it is clear from the truth table. S is called set and R is called Reset.

S 0 0 0 1 1

R 0 0 1 0 1

Q 0 1 X X X

Q+ 0 1 0 1 0

There still seems to be some problem with the above configuration, we can not control when the input should be sampled, in other words there is no enable signal to control when the input is sampled. Normally input enable signals can be of two types. Level Sensitive or ( LATCH) Edge Sensitive or (Flip-Flop) Level Sensitive: The circuit below is a modification of the above one to have level sensitive enable input. Enable, when LOW, masks the input S and R. When HIGH, presents S and R to the sequential logic input (the above circuit two NOR Gates). Thus Enable, when HIGH, transfers input S and R to the sequential cell transparently, so this kind of sequential circuits are called transparent Latch. The memory element we get is an RS Latch with active high Enable.


Edge Sensitive: The circuit below is a cascade of two level sensitive memory elements, with a phase shift in the enable input between first memory element and second memory element. The first RS latch (i.e. the first memory element) will be enabled when CLK input is HIGH and the second RS latch will be enabled when CLK is LOW. The net effect is input RS is moved to Q and Q' when CLK changes state from HIGH to LOW, this HIGH to LOW transition is called falling edge. So the Edge Sensitive element we get is called negative edge RS flip-flop.

Now that we know the sequential circuits basics, let's look at each of them in detail in accordance to what is taught in colleges. You are always welcome to suggest if this can be written better in any way.

Latches and Flip-Flops There are two types of sequential circuits. Asynchronous Circuits. Synchronous Circuits. As seen in last section, Latches and Flip-flops are one and the same with a slight variation: Latches have level sensitive control signal input and Flip-flops have edge sensitive control signal input. Flip-flops and latches which use this control signals are called synchronous circuits. So if they don't use clock inputs, then they are called asynchronous circuits.


RS Latch RS latch have two inputs, S and R. S is called set and R is called reset. The S input is used to produce HIGH on Q (i.e. store binary 1 in flip-flop). The R input is used to produce LOW on Q (i.e. store binary 0 in flip-flop). Q' is Q complementary output, so it always holds the opposite value of Q. The output of the S-R latch depends on current as well as previous inputs or state, and its state (value stored) can change as soon as its inputs change. The circuit and the truth table of RS latch are shown below. (This circuit is as we saw in the last page, but arranged to look beautiful :-)).

S 0 0 0 1 1

R 0 0 1 0 1

Q 0 1 X X X

Q+ 0 1 0 1 0

The operation has to be analyzed with the 4 inputs combinations together with the 2 possible previous states. When S = 0 and R = 0: If we assume Q = 1 and Q' = 0 as initial condition, then output Q after input is applied would be Q = (R + Q')' = 1 and Q' = (S + Q)' = 0. Assuming Q = 0 and Q' = 1 as initial condition, then output Q after the input applied would be Q = (R + Q')' = 0 and Q' = (S + Q)' = 1. So it is clear that when both S and R inputs are LOW, the output is retained as before the application of inputs. (i.e. there is no state change). When S = 1 and R = 0: If we assume Q = 1 and Q' = 0 as initial condition, then output Q after input is applied would be Q = (R + Q')' = 1 and Q' = (S + Q)' = 0.


Assuming Q = 0 and Q' = 1 as initial condition, then output Q after the input applied would be Q = (R + Q')' = 1 and Q' = (S + Q)' = 0. So in simple words when S is HIGH and R is LOW, output Q is HIGH. When S = 0 and R = 1: If we assume Q = 1 and Q' = 0 as initial condition, then output Q after input is applied would be Q = (R + Q')' = 0 and Q' = (S + Q)' = 1. Assuming Q = 0 and Q' = 1 as initial condition, then output Q after the input applied would be Q = (R + Q')' = 0 and Q' = (S + Q)' = 1. So in simple words when S is LOW and R is HIGH, output Q is LOW. When S = 1 and R =1: No matter what state Q and Q' are in, application of 1 at input of NOR gate always results in 0 at output of NOR gate, which results in both Q and Q' set to LOW (i.e. Q = Q'). LOW in both the outputs basically is wrong, so this case is invalid. The waveform below shows the operation of NOR gates based RS Latch.

It is possible to construct the RS latch using NAND gates (of course as seen in Logic gates section). The only difference is that NAND is NOR gate dual form (Did I say that in Logic gates section?). So in this case the R = 0 and S = 0 case becomes the invalid case. The circuit and Truth table of RS latch using NAND is shown below.


S 1 1 0 1 0

R 1 1 1 0 0

Q 0 1 X X X

Q+ 0 1 0 1 1

If you look closely, there is no control signal (i.e. no clock and no enable), so these kinds of latches or flip-flops are called asynchronous logic elements. Since all the sequential circuits are built around the RS latch, we will concentrate on synchronous circuits and not on asynchronous circuits. RS Latch with Clock We have seen this circuit earlier with two possible input configurations: one with level sensitive input and one with edge sensitive input. The circuit below shows the level sensitive RS latch. Control signal "Enable" E is used to gate the input S and R to the RS Latch. When Enable E is HIGH, both the AND gates act as buffers and thus R and S appears at the RS latch input and it functions like a normal RS latch. When Enable E is LOW, it drives LOW to both inputs of RS latch. As we saw in previous page, when both inputs of a NOR latch are low, values are retained (i.e. the output does not change).


Setup and Hold Time For synchronous flip-flops, we have special requirements for the inputs with respect to clock signal input. They are Setup Time: Minimum time period during which data must be stable before the clock makes a valid transition. For example, for a posedge triggered flip-flop, with a setup time of 2 ns, Input Data (i.e. R and S in the case of RS flip-flop) should be stable for at least 2 ns before clock makes transition from 0 to 1. Hold Time: Minimum time period during which data must be stable after the clock has made a valid transition. For example, for a posedge triggered flip-flop, with a hold time of 1 ns. Input Data (i.e. R and S in the case of RS flip-flop) should be stable for at least 1 ns after clock has made transition from 0 to 1.

If data makes transition within this setup window and before the hold window, then the flip-flop output is not predictable, and flip-flop enters what is known as meta stable state. In this state flip-flop output oscillates between 0 and 1. It takes some time for the flip-flop to settle down. The whole process is called metastability. You could refer to tidbits section to know more information on this topic. The waveform below shows input S (R is not shown), and CLK and output Q (Q' is not shown) for a SR posedge flip-flop.


D Latch The RS latch seen earlier contains ambiguous state; to eliminate this condition we can ensure that S and R are never equal. This is done by connecting S and R together with an inverter. Thus we have D Latch: the same as the RS latch, with the only difference that there is only one input, instead of two (R and S). This input is called D or Data input. D latch is called D transparent latch for the reasons explained earlier. Delay flip-flop or delay latch is another name used. Below is the truth table and circuit of D latch. In real world designs (ASIC/FPGA Designs) only D latches/Flip-Flops are used.

D 1 0

Q X X

Q+ 1 0


Below is the D latch waveform, which is similar to the RS latch one, but with R removed.

JK Latch The ambiguous state output in the RS latch was eliminated in the D latch by joining the inputs with an inverter. But the D latch has a single input. JK latch is similar to RS latch in that it has 2 inputs J and K as shown figure below. The ambiguous state has been eliminated here: when both inputs are high, output toggles. The only difference we see here is output feedback to inputs, which is not there in the RS latch.

J 1 1 1

K 1 1 0

Q 0 1 1


0 T Latch

1

0

When the two inputs of JK latch are shorted, a T Latch is formed. It is called T latch as, when input is held HIGH, output toggles.

T 1 1 0 0 JK Master Slave Flip-Flop

Q 0 1 1 0

Q+ 1 0 1 0

All sequential circuits that we have seen in the last few pages have a problem (All level sensitive sequential circuits have this problem). Before the enable input changes state from HIGH to LOW (assuming HIGH is ON and LOW is OFF state), if inputs changes, then another state transition occurs for the same enable pulse. This sort of multiple transition problem is called racing. If we make the sequential element sensitive to edges, instead of levels, we can overcome this problem, as input is evaluated only during enable/clock edges.


In the figure above there are two latches, the first latch on the left is called master latch and the one on the right is called slave latch. Master latch is positively clocked and slave latch is negatively clocked.

Sequential Circuits Design We saw in the combinational circuits section how to design a combinational circuit from the given problem. We convert the problem into a truth table, then draw K-map for the truth table, and then finally draw the gate level circuit for the problem. Similarly we have a flow for the sequential circuit design. The steps are given below. Draw state diagram. Draw the state table (excitation table) for each output. Draw the K-map for each output. Draw the circuit.


Looks like sequential circuit design flow is very much the same as for combinational circuit. State Diagram The state diagram is constructed using all the states of the sequential circuit in question. It builds up the relationship between various states and also shows how inputs affect the states. To ease the following of the tutorial, let's consider designing the 2 bit up counter (Binary counter is one which counts a binary sequence) using the T flip-flop. Below is the state diagram of the 2-bit binary counter.

State Table The state table is the same as the excitation table of a flip-flop, i.e. what inputs need to be applied to get the required output. In other words this table gives the inputs required to produce the specific outputs. Q1 0 0 1 1 K-map The K-map is the same as the combinational circuits K-map. Only difference: we draw K-map for the inputs i.e. T1 and T0 in the above table. From the table we deduct that we Q0 0 1 0 1 Q1+ 0 1 1 0 Q0+ 1 0 1 0 T1 0 1 0 1 T0 1 1 1 1


don't need to draw K-map for T0, as it is high for all the state combinations. But for T1 we need to draw the K-map as shown below, using SOP.

Circuit There is nothing special in drawing the circuit; it is the same as any circuit drawing from K-map output. Below is the circuit of 2-bit up counter using the T flip-flop.


OPERATING MANUAL FOR LOGIC BASIC SERIES ELECTRONIC INDICATORS Choice of Three Power Sources 1. Batteries A set of two Manganese Dioxide Lithium batteries will operate this electronic indicator for approximately 250 hours of normal usage. Because milliampere hour ratings vary widely with manufacturers, normal usage time is very hard to predict. The lithium battery used in this indicator is an IEC standard, type CR2450. The indicators are shipped with the batteries not installed, and should not be installed until battery operation is desired. NOTE: This indicator has an .AUTO-OFF. feature to conserve battery life. After 10 minutes of .no activity. (no key presses or spindle movement), the gage will turn itself off. This feature may be disabled if continuous operation is desired; see .AUTO-OFF On/Off. instructions in this book. Installing Batteries


Using a narrow screwdriver, gently pry under the tab on the left side of plastic bezel and slide out the battery tray as you turn the indicator face side down. Insert two batteries, .+. side up, into tray cavities, then slide the tray back into its bezel slot, taking care that the batteries stay in proper position.

AC Adapter AC adapters (providing 9VDC at 30ma. maximum to the indicator from a 115 or 230 VAC, 50/60 Hz line source) may be purchased from CDI. Although other 9V AC adapters with a 3/32. (2.5mm) mini-plug (center +) may be used, CDI adapters are recommended because they include current limiting to prevent damage from line fluctuations. For 115 V (USA) operation - Order CDI Part #G11-0012 For 230 V (Europe) operation - Order CDI Part #G11-0014 First insert the mini-plug into the socket on the lower left side of the bezel (see drawing on page 2), then plug the adapter into a wall outlet. After turning the indicator .ON., disable the .AUTO-OFF. feature; see .AUTO OFF On/Off.

2. Data I/O Connector Power also may be provided through the data I/O connector, applications where the indicator is integrated with another ripple-free 5 VDC (4.9 to 5. 7 V) regulated voltage source #G13-0034 or a custom variation of another CDI data cable must Contact CDI for full information.

for special featuring or piece of equipment A is required. CDI Cable be used.


Button Functions NOTE: Most functions are active on release of button(s). Key Function Controlled OFF . Press & Release: Turns indicator off ON/CLR - Press & Release: Turns indicator on, clears/resets indicator. With HOLD off: Clears display to .0. With MAX HOLD on: Clears display to spindle position, leaves HOLD on. -Press & Hold (For longer than 5 seconds): Enter/Exit display and key test mode. HOLD . Press & Release: Turns hold function on/off and cancels last selection. 2ND . Press & Hold (for more than 2 seconds until 2ND is displayed): Enables 2ND and 3RD functions such as TR REV (Travel Reverse), IN/MM and AUTO OFF. CHNG - Used with 2ND key to activate selectable resolution.

or


Display-Operating Prompts & Conditions

Operating Instructions


To Turn AUTO OFF On/Off - Press and hold "2ND" 2ND appears at bottom of display then release. and release "OFF" within 3 seconds. NOTE: An hourglass appears at left side of AUTO OFF is active. TO Clear Display . to zero and release "ON/CLR".

until - Press

display if - Press

To Verify DATA I/0 FORMAT To view the current output format. - Press and release "2ND", until the 2ND appears in display, then "ON/CLR" and "2ND" in sequence. Format information is displayed for about 3 seconds, then indicator automatically returns to normal operation. Format information is displayed as: RS232 MTI compatible CDI mux BCD Bypass =SEr =rS232 =Cdi =bP

To Use HOLD To select type of HOLD - Freeze, Minimum or Maximum: -Press and hold "HOLD" until cursor moves under desired type of hold; FRZ, MIN or then release. To turn HOLD On/Off: . Press and release "HOLD" . MAX HOLD - Holds and displays highest reading. . MIN HOLD - Holds and displays lowest reading. . FREEZE HOLD - Freezes display when "HOLD" button is pressed. NOTE: Pressing CLR button resets indicator to spindle position.

MAX,

To Change INCH/MILLIMETER To change from one to the other: - Press and hold "MOVE/2ND" until 2ND appears at bottom of display then release. - Press and release "TOL" within 3 seconds. NOTE: MM or IN will appear at bottom of display.


To Turn INDICATOR ON Press "ON/CLR" and release when clr display To Turn INDICATOR OFF- Press "OFF" appears on and release

TO Reset to DEFAULT A total reset: clears all user settings and returns to factory-set defaults. 1. Press and hold "2ND" until 2ND appears at bottom of display, then release. 2. Press and release "ON/CLR" within 3 seconds. 3. Press and release "CHNG" within 3 seconds. NOTE: Cannot be done if Lock feature is on.

To Change RESOLUTION -Press and hold "2ND" until 2ND appears at bottom of display then release. - Press and release "ON/CLR" within 3 seconds. - Press and release "HOLD" within 3 seconds. Use "CHNG" key to step through available resolution selections: 1 = .00005" (.001mm) 2 = .0001" (.002mm) 3 = .00025" (.005mm) 4 = .0005" (.O1mm) 5 = .001" (.02mm) Press and release "CHNG" and "2ND" simultaneously to save. Note: Only resolutions coarser than indicator resolution-as-purchased are available. To Enter TEST MODE Press and hold (for more than 5 seconds) "ON/CLR" to enter display and key test mode. To Exit


TEST MODE Press and hold (for more than 5 seconds) "ON/CLR" to exit display and key test mode.

To Change TRAVEL DIRECTION - Press and hold "2ND" until 2ND appears at bottom of display then release. - Press and release "HOLD" within 3 seconds. Note: Arrow in upper right corner will show positive direction of spindle travel. NOTE: Most functions are active on release of key(s). Internal Memory "LOGIC" Series indicators and remote displays include internal non-volatile memory to store all factory default and user settings. When the indicator is turned on, user settings and preset numbers will be the same as when the indicator was turned off. NOTE: Many of the user settings are stored when the indicator is turned .Off. by using the "OFF" key, or when the indicator turns itself off (AUTO OFF). However, if the indicator is turned off by removing power (by disconnecting the AC adapter or cutting power through the Data 1/0 connector), some or all of the user settings and/or changes may be lost! Operating Precautions 1. Do not use the bottom of the spindle stroke as a base of measurement reference, as it is protected with a rubber shock absorber to prevent shock to the internal mechanism. The spindle should be offset .005.-.010" (.12 -.25 mm) from the bottom of travel. 2. Use of CDI type MS-10 or similar sturdy stands or fixtures for indicator mounting, where the base plate and indicator are mounted to a common post, is highly recommended for accurate and repeatable readings. The indicator must be mounted with the spindle perpendicular to the reference or base plate. If the indicator is stem-mounted, protect the indicator from attempted rotation, and from being stuck or bumped, to prevent stem/case mechanical alignment damage. Do not over-tighten the mounting mechanism, and use clamp mounting rather than set screws if at all possible, to prevent damage to the stem. 3. The bezel face can be rotated from its normal horizontal position for convenient viewing. Rotation is limited to 270 degrees and attempts to force it past its internal stop may damage the indicator. 4. Frequently clean the spindle to prevent sluggish or sticky movement. Dry wiping with a lint-free cloth usually will suffice, but isopropyl alcohol may be used to remove gummy


deposits. Do not apply any type of lubricant to the spindle. Spindle dust caps and spindle boots are available for operation in dirty or abrasive environments. 1" Spindle dust cap Order CDI Part #A21.0131 l. Spindle boot - Order CDI Part #CD170-1 Use a soft cloth dampened with a mild detergent to clean the bezel and front face of the indicator. Do not use aromatic solvents as they may cause damage. 5. Extremely high electrical transients - from nearby arc welders, SCR motor/lighting controls, radio transmitters, etc. - may cause malfunctions of the indicators internal circuitry or ERROR 1 indications, even through the electronic design was created to minimize such problems. If at all possible, do not operate the indicator in plant areas subject to these transients. Turning the indicator OFF for a few seconds, then back ON from time-to-time may eliminate any problems. Also, use of an isolated AC line (for AC adapter operated indicators and AC powered remote displays), or an AC line filter - plus solid grounding of stands and fixtures - is recommended in these conditions. Additional Display-Operating Prompts & Conditions FLASHING DIGIT or +/- sign - Digit or sign affected by .CHNG. key when setting or changing preset numbers. FLASHING READING, with HIGH or LOW displayed Reading is out of tolerance, to the high or low side. ERROR 1 - Spindle speed too fast, high electrical noise, etc. ERROR 2 - Counter overflow, i.e. counter number (spindle + preset number) out of counter range. ERROR 3 - Improper tolerance combination, i.e. both "HIGH" and LOW" set to O or same number, or "LOW set to a higher number than HIGH. Occurs only when TOL is on. ERROR 4 - Display overflow, i.e. number too large to be properly displayed. Moving spindle to acceptable range eliminates error message. Data Output LOGIC Series indicators and remote displays provide users with multiple data output formats. The cable attached to the indicator when it is turned on determines the output format in use. Cables for each format can be purchased from CDI. These cables also provide remote control of ON/CLR and HOLD functions, plus +5v regulated power input. For special applications, an ERROR FLAG output and/or custom cables also can be provided; contact CDI for information. CAUTION: Use of cables other than those provided or approved by CDI can cause irreparable damage to the indicator or data output port, and such damage is not covered by the CDI Limited Warranty.


Standard RS232 Format - Communications protocol is 1200 baud, no parity, 8 data bits, and 1 stop bit. RS232 can be read by any IBM PC-compatible computer, RS232 serial printer or other device, provided the device can be set to this protocol. A DB25 pin adapter may be necessary for non-standard devices. "WINDOWS" terminal and other communications software, "WEDGE" software, etc., may be used with this format. Cables Required: CDI #GO3-0018 - For IBM Compatible PC (CDI indicator to DB25F) CDI #GO3-0021 - For CDI serial printer types G19-0001/Gl9- 0002 & G19-0003 (CDI indicator to DB25M) MITUTOYO Compatible Format - Use with MITUTOYO compatible printers, collection devices, etc. Cable Required: CDI #G03-0019 - CDI indicator to MTI 10 pin CDI (Multiplexed BCD) Format - Furnished with pigtails one end. Cable Required: CDI #Gl3-0034 - Also may be used for remote control of ON/CLR or HOLD functions, or external power (+5V regulated) input. (CDI indicator to pigtail wires.) BYPASS FORMAT - Permits indicator to be used as a probe for the CDI remote display: bypasses raw unprocessed signals from the detector system directly to the data output connector. In this operation mode, power for the indicator is supplied by the remote display. Cable Required: CDI #Gl3-0022 - CDI indicator to 6-pin DIN IMPORTANT- Indicator and remote display must be of same base resolution. If the two (2) are different base resolutions, you will experience compatibility problems. Limited Warranty "PLUS SERIES" INDICATORS ARE WARRANTED FOR A PERIOD OF ONE YEAR AGAINST DEFECTIVE MATERIALS OR WORKMANSHIP. THIS WARRANTY DOES NOT APPLY TO PRODUCTS THAT ARE MISHANDLED, MISUSED, ETCHED, STAMPED, OR OTHERWISE MARKED OR DAMAGED, NOR DOES IT APPLY TO DAMAGE OR ERRONEOUS OPERATION CAUSED BY USER TAMPERING OR ATTEMPTS TO MODIFY THE INDICATOR. UNITS FOUND TO BE DEFECTIVE WITHIN THE WARRANTY PERIOD WILL BE REPAIRED OR REPLACED FREE OF CHARGE AT THE OPTION OF CDI. A NOMINAL CHARGE WILL BE MADE FOR NON-WARRANTY REPAIRS, PROVIDED THE UNIT IS NOT DAMAGED BEYOND REPAIR.

Boolean algebra


For a basic introduction to sets, Boolean operations, Venn diagrams, truth tables, and Boolean applications, see Boolean logic. For an alternative perspective see Boolean algebras canonically defined. In abstract algebra, a Boolean algebra is an algebraic structure (a collection of elements and operations on them obeying defining axioms) that captures essential properties of both set operations and logic operations. Specifically, it deals with the set operations of intersection, union, complement; and the logic operations of AND, OR, NOT. For example, the logical assertion that a statement a and its negation a cannot both be true,

Boolean lattice of subsets parallels the set-theory assertion that a subset A and its complement AC have empty intersection,

Because truth values can be represented as binary numbers or as voltage levels in logic circuits, the parallel extends to these as well. Thus the theory of Boolean algebras has many practical applications in electrical engineering and computer science, as well as in mathematical logic. A Boolean algebra is also called a Boolean lattice. The connection to lattices (special partially ordered sets) is suggested by the parallel between set inclusion, A B, and ordering, a b. Consider the lattice of all subsets of {x,y,z}, ordered by set inclusion. This Boolean lattice is a partially ordered set in which, say, {x} {x,y}. Any two lattice elements, say p = {x,y} and q = {y,z}, have a least upper bound, here {x,y,z}, and a greatest lower bound, here {y}. Suggestively, the least upper bound (or join or supremum) is denoted by the same symbol as logical OR, pq; and the greatest lower bound (or meet or infimum) is denoted by same symbol as logical AND, pq.


The lattice interpretation helps in generalizing to Heyting algebras, which are Boolean algebras freed from the restriction that either a statement or its negation must be true. Heyting algebras correspond to intuitionist (constructivist) logic just as Boolean algebras correspond to classical logic.

Formal definition A Boolean algebra is a set A, supplied with two binary operations (called AND), (called OR), a unary operation (called NOT) and two distinct elements 0 (called zero) and 1 (called one), such that, for all elements a, b and c of set A, the following axioms hold: associativity commutativity absorption distributivity complements The first three pairs of axioms above: associativity, commutativity and absorption, mean that (A, , ) is a lattice. If A is a lattice and one of the above distributivity laws holds, then the second distributivity law can be proven. Thus, a Boolean algebra can also be equivalently defined as a distributive complemented lattice. From these axioms, one can show that the smallest element 0, the largest element 1, and the complement a of any element a are uniquely determined. For all a and b in A, the following identities also follow: idempotency bounded ness 0 and 1 are complements De Morgan's laws involution Examples


The simplest Boolean algebra has only two elements, 0 and 1, and is defined by the rules: 0 1 0 0 0 1 0 1 0 1 0 0 1 1 1 1 a 0 1

a 1 0

It has applications in logic, interpreting 0 as false, 1 as true, as and, as or, and as not. Expressions involving variables and the Boolean operations represent statement forms, and two such expressions can be shown to be equal using the above axioms if and only if the corresponding statement forms are logically equivalent. The two-element Boolean algebra is also used for circuit design in electrical engineering; here 0 and 1 represent the two different states of one bit in a digital circuit, typically high and low voltage. Circuits are described by expressions containing variables, and two such expressions are equal for all values of the variables if and only if the corresponding circuits have the same input-output behavior. Furthermore, every possible input-output behavior can be modeled by a suitable Boolean expression. The two-element Boolean algebra is also important in the general theory of Boolean algebras, because an equation involving several variables is generally true in all Boolean algebras if and only if it is true in the two-element Boolean algebra (which can always be checked by a trivial brute force algorithm). This can for example be used to show that the following laws (Consensus theorems) are generally valid in all Boolean algebras: (a b) (a c) (b c) (a b) (a c) (a b) (a c) (b c) (a b) (a c) Starting with the propositional calculus with sentence symbols, form the Lindenbaum algebra (that is, the set of sentences in the propositional calculus modulo tautology). This construction yields a Boolean algebra. It is in fact the free Boolean algebra on generators. A truth assignment in propositional calculus is then a Boolean algebra homomorphism from this algebra to {0,1}. The power set (set of all subsets) of any given nonempty set S forms a Boolean algebra with the two operations := (union) and := (intersection). The smallest element 0 is the empty set and the largest element 1 is the set S itself. The set of all subsets of S that are either finite or cofinite is a Boolean algebra.


For any natural number n, the set of all positive divisors of n forms a distributive lattice if we write a b for a | b. This lattice is a Boolean algebra if and only if n is square-free. The smallest element 0 of this Boolean algebra is the natural number 1; the largest element 1 of this Boolean algebra is the natural number n. Other examples of Boolean algebras arise from topological spaces: if X is a topological space, then the collection of all subsets of X which are both open and closed forms a Boolean algebra with the operations := (union) and := (intersection). If R is an arbitrary ring and we define the set of central idempotents by A = { e R: e2 = e, ex = xe, x R } then the set A becomes a Boolean algebra with the operations e f := e + f ef and e f := ef. Certain LindenbaumTarski algebras. Order theoretic properties

Boolean lattice of subsets Like any lattice, a Boolean algebra (A, by defining a b precisely when a = a (which is also equivalent to b = a b b). , ) gives rise to a partially ordered set (A, )

In fact one can also define a Boolean algebra to be a distributive lattice (A, ) (considered as a partially ordered set) with least element 0 and greatest element 1, within which every element x has a complement x such that x x = 0 and x x = 1


Here and are used to denote the infimum (meet) and supremum (join) of two elements. Again, if complements in the above sense exist, then they are uniquely determined. The algebraic and the order theoretic perspective can usually be used interchangeably and both are of great use to import results and concepts from both universal algebra and order theory. In many practical examples an ordering relation, conjunction, disjunction, and negation are all naturally available, so that it is straightforward to exploit this relationship. Principle of duality One can also apply general insights from duality in order theory to Boolean algebras. Especially, the order dual of every Boolean algebra, or, equivalently, the algebra obtained by exchanging and , is also a Boolean algebra. In general, any law valid for Boolean algebras can be transformed into another valid, dual law by exchanging 0 with 1, with , and with . Other notation The operators of Boolean algebra may be represented in various ways. Often they are simply written as AND, OR and NOT. In describing circuits, NAND (NOT AND), NOR (NOT OR) and XOR (exclusive OR) may also be used. Mathematicians, engineers, and programmers often use + for OR and for AND (since in some ways those operations are analogous to addition and multiplication in other algebraic structures and this notation makes it very easy to get sum of products form for people who are familiar with normal algebra) and represent NOT by a line drawn above the expression being negated. Sometimes, the symbol ~ or ! is used for NOT. Here we use another common notation with "meet" NOT. Homomorphisms and isomorphisms A homomorphism between the Boolean algebras A and B is a function f : A B such that for all a, b in A: f(a f(a f(0) f(1) b) = f(a) b) = f(a) =0 =1 f(b) f(b) for AND, "join" for OR, and for

It then follows that f(a) = f(a) for all a in A as well. The class of all Boolean algebras, together with this notion of morphism, forms a category. An isomorphism from A to B is a homomorphism from A to B which is bijective. The inverse of an isomorphism is also an isomorphism, and we call the two Boolean algebras A and B isomorphic. From the


standpoint of Boolean algebra theory, they cannot be distinguished; they differ only in the notation of their elements. Boolean rings, ideals and filters Every Boolean algebra (A, , ) gives rise to a ring (A, +, *) by defining a + b = (a b) (b a) (this operation is called "symmetric difference" in the case of sets and XOR in the case of logic) and a * b = a b. The zero element of this ring coincides with the 0 of the Boolean algebra; the multiplicative identity element of the ring is the 1 of the Boolean algebra. This ring has the property that a * a = a for all a in A; rings with this property are called Boolean rings. Conversely, if a Boolean ring A is given, we can turn it into a Boolean algebra by defining x y = x + y + xy and x y = xy. Since these two operations are inverses of each other, we can say that every Boolean ring arises from a Boolean algebra, and vice versa. Furthermore, a map f : A B is a homomorphism of Boolean algebras if and only if it is a homomorphism of Boolean rings. The categories of Boolean rings and Boolean algebras are equivalent. An ideal of the Boolean algebra A is a subset I such that for all x, y in I we have x y in I and for all a in A we have a x in I. This notion of ideal coincides with the notion of ring ideal in the Boolean ring A. An ideal I of A is called prime if I A and if a b in I always implies a in I or b in I. An ideal I of A is called maximal if I A and if the only ideal properly containing I is A itself. These notions coincide with ring theoretic ones of prime ideal and maximal ideal in the Boolean ring A. The dual of an ideal is a filter. A filter of the Boolean algebra A is a subset p such that for all x, y in p we have x y in p and for all a in A if a x = a then a in p. Representing Boolean algebras It can be shown that every finite Boolean algebra is isomorphic to the Boolean algebra of all subsets of a finite set. Therefore, the number of elements of every finite Boolean algebra is a power of two. Stone's celebrated representation theorem for Boolean algebras states that every Boolean algebra A is isomorphic to the Boolean algebra of all closed-open sets in some (compact totally disconnected Hausdorff) topological space. Axiomatics for Boolean algebras Let the unary functional symbol n be read as 'complement'. In 1933, the American mathematician Edward Vermilye Huntington (18741952) set out the following elegant axiomatization for Boolean algebra: 1. Commutativity: x + y = y + x.


2. Associativity: (x + y) + z = x + (y + z). 3. Huntington equation: n(n(x) + y) + n(n(x) + n(y)) = x. Herbert Robbins immediately asked: If the Huntington equation is replaced with its dual, to wit: 4. Robbins Equation: n(n(x + y) + n(x + n(y))) = x, do (1), (2), and (4) form a basis for Boolean algebra? Calling (1), (2), and (4) a Robbins algebra, the question then becomes: Is every Robbins algebra a Boolean algebra? This question remained open for decades, and became a favorite question of Alfred Tarski and his students. In 1996, William McCune at Argonne National Laboratory, building on earlier work by Larry Wos, Steve Winker, and Bob Veroff, answered Robbins's question in the affirmative: Every Robbins algebra is a Boolean algebra. Crucial to McCune's proof was the automated reasoning program EQP he designed. For a simplification of McCune's proof, see Dahn (1998). Boolean algebra (After the logician George Boole) 1. Commonly, and especially in computer science and digital electronics, this term is used to mean two-valued logic. 2. This is in stark contrast with the definition used by pure mathematicians who in the 1960s introduced "Boolean-valued models" into logic precisely because a "Boolean-valued model" is an interpretation of a theory that allows more than two possible truth values! Strangely, a Boolean algebra (in the mathematical sense) is not strictly an algebra, but is in fact a lattice. A Boolean algebra is sometimes defined as a "complemented distributive lattice". Boole's work which inspired the mathematical definition concerned algebras of sets, involving the operations of intersection, union and complement on sets. Such algebras obey the following identities where the operators ^, V, - and constants 1 and 0 can be thought of either as set intersection, union, complement, universal, empty; or as two-valued logic AND, OR, NOT, TRUE, FALSE; or any other conforming system. a^b=bâ aVb = bVa (commutative laws) (a ^ b) ^ c = a ^ (b ^ c) (a V b) V c = a V (b V c) (associative laws) a ^ (b V c) = (a ^ b) V (a ^ c) a V (b ^ c) = (a V b) ^ (a V c) (distributive laws) aâ = a aVa = a (idempotence laws)


--a = a -(a ^ b) = (-a) V (-b) -(a V b) = (-a) ^ (-b) a ^ -a = 0 a V -a = 1 a^1 = a aV0 = a a^0 = 0 aV1 = 1 -1 = 0 -0 = 1

(de Morgan's laws)

There are several common alternative notations for the "-" or logical complement operator. If a and b are elements of a Boolean algebra, we define a

Computer System and Network

Documents