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4.1
Lecture8
BinaryArithmetic
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4.2
The1-bitAdderCircuit(half-adder)
A B BA +A
B
Sum
CarryOut
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4.3
The1-bitAdderCircuit(full-adder)
A B BA +A
B
Sum
CarryOut
CarryIn
b
CarryOut
a
CarryIn
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4.4
Then-bitAdder
+CarryOut
CarryIn
+CarryOut
CarryIn
+CarryOut
0A 0B1nB
1nA 2nA 2nB
1
n
Sum2
n
Sum0
Sum
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4.5
Operationson2sComplement
Subtraction: Notethat(A-B)isthesameas
(A+(-B)),sothisoperationcanbedonein
twosteps:asigninversionandanaddition.Justasinaddition,overflow canoccur:
overflow,0if0,0,
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4.6
ALU:ArithmeticLogicUnit
b
0
2
Result
Operation
a
1
CarryIn
CarryOut
1-bitversion
Notehowitdoesall
threeoperationsin
parallel,whetherit
isrequiredornot.
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4.7
ALU:ArithmeticLogicUnit
32-bitversion
Result31
a31
b31
Result0
CarryIn
a0
b0
Result1
a1
b1
Result2
a2
b2
Operation
ALU0
CarryIn
CarryOut
ALU1
CarryIn
CarryOut
ALU2
CarryIn
CarryOut
ALU31
CarryIn
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4.8
Operationson2sComplement
Multiplication: Trivialwhenmultiplierisa
powerof2(useashift-registertodoleft
shifts).Otherwise,wehavetodefinean
algorithm
Example:
210 101111 ==A
210 111014 ==B
bitsBAC8*
=
1011
1110
00001011
1011
101110011010
x
+
102 15410011010 =
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4.9
SigningTheResultofUnsigned
MultiplicationandDivision
Thealgorithmswellseeaheadcomputetheunsignedproduct
orquotientoftwooperands.Todosigned multiplication
anddivision,wecanrecordthesignsoftheoperands,do
theunsignedoperationandthencorrectthesignofthe
result.
0
1
1
0
XOR
SA,SB
+(0)- (1)- (1)
- (1)+(0)- (1)
- (1)- (1)+(0)
+(0)+(0)+(0)
SC=Sign(C)
result
SB=Sign(B)
operand2
SA=Sign(A)
operand1
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4.10
Multiplication: Ingeneral,ifthemultiplicand
hasnbitsandthemultiplierhasmbits,the
productwillhave(n+m)bits.
Notewhatsgoingon:wegothrougheachbitin
themultiplierandperformingasequenceof
left-shiftsandadditions.Thisisanindication
thattoimplementmultiplicationinhardware,
oneneedsashift-registerandanadder.
Whataboutthesignsoftheoperandsandthe
signoftheresult?
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4.11
AnAlgorithm
forMultiplication
Bothoperandsare32-bitslong.
Whatisthesizeoftheproduct?
Howmanyregistersareneeded
toimplementthisinhardware?
Ingeneral,howmany
repetitionsareneededbythis
algorithm?
Done
1. TestMultiplier0
1a. Add multiplicand to product andplace the result in Product register
2. Shift the Multiplicand register left 1 bit
3. Shift the Multiplier register right 1 bit
32nd repetition?
Start
Multiplier0 = 0Multiplier0 = 1
No: < 32 repetitions
Yes: 32 repetitions
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4.12
ASimpler(?)Flowchartforthe
BasicMultiplicationAlgorithm
test
start
0B
C=C+A
A1
reps?
done
1 0
no
yes
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4.13
AnotherAlgorithm
for
Multiplication
Done
1. Test
Multiplier0
1a. Add multiplicand to the left half ofthe product and place the result inthe left half ofthe Product register
2. Shift the Product register right 1 bit
3. Shift the Multiplier register right 1 bit
32nd repetition?
Start
Multiplier0 = 0Multiplier0 = 1
No: < 32 repetitions
Yes: 32 repetitions
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4.14
TheMultiplicationHardwareforthe
SecondMultiplicationAlgorithm
MultiplierShift right
Write
32 bits
64 bits
32 bits
Shift right
Multiplicand
32-bit ALU
Product Control test
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4.15
Operationson2sComplement
Division: Trivialwhenmultiplierisapower
of2(useashift-registertodorightshifts).
Otherwise,wehavetodefineanalgorithm,
butfirst,letsthinkabit.
Quotient: Howmanytimesdoesthedivisorfit
intothedividend?
Remainder: Afteramultipleofthedivisorhas
beensubtractedfromthedividend,whats
left?
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4.16
Division:
1000 1001010
-1000
1010-1000
10
1001
Wedosubtractions
andshifts
Done
Test Remainder
2a. Shift the Quotient register to the left,setting the new rightmost bit to 1
3. Shift the Divisor register right 1 bit
33rd repetition?
Start
Remainder < 0
No: < 33 repetitions
Yes: 33 repetitions
2b. Restore the original value by addingthe Divisor register to the Remainder
register and place the sum in theRemainder register. Also shift the
Quotient register to the left, setting thenew least significant bit to 0
1. Subtract the Divisor register from theRemainder register and place theresult in the Remainder register
Remainder > 0
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4.17
TheDivisionHardware
64-bit ALU
Control
test
Quotient
Shift left
Remainder
Write
Divisor
Shift right
64 bits
64 bits
32 bits
