Computer Science 210 Computer Organization Sequential Circuits Finite State Machines
Jan 02, 2016
Computer Science 210Computer Organization
Sequential Circuits
Finite State Machines
State Machine
• A type of sequential circuit– Combinational logic + storage– Remembers state– Changes output and state based in inputs and
current state State Machine
CombinationalLogic Circuit
StorageElements
Inputs Outputs
Combinational or Sequential?
4 1 8 4
30
15
5
1020
25
CombinationalSuccess depends only onthe values, not the order in which they are set.
SequentialSuccess depends onthe sequence of values(e.g, R-13, L-22, R-3).
States of Sequential LockOur lock example has four different states,labeled A-D:
A: The lock is not open,and no relevant operations have been performed.
B: The lock is not open,and the user has completed the R-13 operation.
C: The lock is not open,and the user has completed R-13, followed by L-22.
D: The lock is open.
30
15
5
1020
25
R-13, L-22, R-3
State Diagram
Shows states andactions that causetransitions betweenstates
30
15
5
1020
25
R-13, L-22, R-3
Finite State Machine (FSM)
• A finite number of states
• A finite number of inputs
• A finite number of outputs
• A finite number of state transitions
• Actions that specify output values
The Clock
“1”
“0”
timeOneCycle
The clock cycle triggers a transition between states
Problem
• Memory circuits (latches) maintain the states
• Current state must be sent from latch to a combinational circuit, which uses it to compute the next state
• Next state is fed back as input to latch
• Isn’t this circular?
Solution: Master/Slave FlipflopA pair of gated D-latches, to isolate next state from current state.
During 1st phase (clock=1),previously-computed statebecomes current state and issent to the logic circuit.
During 2nd phase (clock=0),next state, computed bylogic circuit, is stored inLatch A.
Storage
• Each flipflop stores one state bit
• Number of flipflops is determined by number of states
• Sequential lock had four states, so two bits
Blinking Traffic SignA blinking traffic sign
• No lights on
• 1 & 2 on
• 1, 2, 3, & 4 on
• 1, 2, 3, 4, & 5 on
• (repeat as long as switchis turned on)
DANGERMOVERIGHT
1
2
3
4
5
Traffic Light State Diagram
State bit S1 State bit S0
Switch onSwitch off
Outputs
Transition on each clock cycle.
Truth TablesOutputs(depend only on state: S1S0)
S1 S0 Z Y X
0 0 0 0 0
0 1 1 0 0
1 0 1 1 0
1 1 1 1 1
Lights 1 and 2
Lights 3 and 4
Light 5
Next State: S1’S0’(depend on state and input)
In S1 S0 S1’ S0’
0 X X 0 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 1
1 1 1 0 0
Switch
Whenever In=0, next state is 00.
Traffic Light Circuit
Master-slaveflipflop