Computer Interfacing for Fourth Year Class Medical Control Engineering Branch. This course is intended to introduce hardware and software design techniques to solve the issues that surround the operation of digital control and data acquisition systems through interfacing signals coming from sensing devices to personal computers and microcontrollers using analogue and digital circuit design techniques, while at the same time using the same control platform to drive actuators to interact with working environment by designing drive electronic circuits suitable to the implemented actuators and using electrical isolation techniques where necessary. Course Loading: o 1 lecture each week (two hours lecture). o 1 tutorial session each week (one hour tutorial session). o 1 lab demonstration every third week with lab homework. o 1 Assignment due on the last day of 15 weeks course. References: o Kevin James,” PC interfacing and Data Acquisition”, 1 st edition, Newnes, 2000, U.K. o Steven E. Derenz,” Practical Interfacing in the Laboratory” 1 st Edition, Cambridge University Press, 2003, U.K. o Jan Axelson, “Parallel port complete”, 4 th Edition, Lakeview Reseach inc., 2000, USA.
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Computer Interfacing for Fourth Year Class Medical Control Engineering Branch.
This course is intended to introduce hardware and software design techniques to solve the
issues that surround the operation of digital control and data acquisition systems through
interfacing signals coming from sensing devices to personal computers and
microcontrollers using analogue and digital circuit design techniques, while at the same
time using the same control platform to drive actuators to interact with working
environment by designing drive electronic circuits suitable to the implemented actuators
and using electrical isolation techniques where necessary.
Course Loading:
o 1 lecture each week (two hours lecture).
o 1 tutorial session each week (one hour tutorial session).
o 1 lab demonstration every third week with lab homework.
o 1 Assignment due on the last day of 15 weeks course.
References:
o Kevin James,” PC interfacing and Data Acquisition”, 1st edition, Newnes,
2000, U.K.
o Steven E. Derenz,” Practical Interfacing in the Laboratory” 1st Edition,
Cambridge University Press, 2003, U.K.
o Jan Axelson, “Parallel port complete”, 4th
Edition, Lakeview Reseach inc.,
2000, USA.
University of Technology Control and System Engineering Department
Medical Engineering Branch
Computer Interfacing for Medical Engineering
4th Year Class
1st Semester
2016 / 2017
Lecture 1
2
Computer interfacing
To learn how to connect computers and microcontrollers to various physical sensors
and actuators.
Overall view: a typical data
acquisition and control system
Sensor Signal
conditioning A/D
Computer
D/A Power
Drive
circuit
Mechanical
device
Timer
Sample
&
Hold
Digital control
circuit
Pre-
Amplifier
Signal conditioning circuits
Op Amps and Analog Interfacing
Analog interfacing techniques
op-amps (v.5f) 6
Operational Amplifier choices (op
amp)
• Why use op amp?
• What kinds of inputs/outputs required?
• What frequency responses desired?
• What type of op amp suits the application?
(Bipolar , Bi-FET, MOS/CMOS)
Biasing
• {Biasing in electronics is the method of establishing predetermined voltages or currents at various points of an electronic circuit for the purpose of establishing proper operating conditions in electronic components},
op-amps (v.5f) 7
Direct Current (DC) amplifier
• Example: use power op amp (or transistor) to control
the DC motor operation.
• Need to maintain the output voltage at a certain level
for a long time.
• All DC (biased) levels must be designed accurately .
• Circuit design is more difficult.
op-amps (v.5f) 8
Op-
amp
DC
Sourc
e
Load:
DC
motor
Alternating Current (AC) amplifier • Example: Microphone
amplifier, signal is AC and
is changing at a certain
frequency range. Current
is alternating not stable.
• Use capacitors to connect
different stages, so no
need to consider biasing
problems.
op-amps (v.5f) 9
Op-
amp
AC
Sourc
e
Load
Each stage can have its
owe biasing level. A
capacitor is an isolator, so
the circuit is easier to be
designed.
Biased at
Vcc
Biased at
Vcc/2
Vcc/2=2.5V
Factors for choosing an
amplifier • Source DC or AC ?
– DC(static or slow changing input, without decoupling capacitors)
– AC(for fast changing input, use decoupling capacitors)
• Input range, biased : absolute min, max voltage
• Output range, biased : absolute min, max voltage
• Frequency: range, allowed attenuation in dB
• Noise tolerance
• Power – output current/output impedance.
• DC-direct current amplifier
• AC-alternating current amplifier
Op-
amp
DC
Source
Load
Op-
amp
AC
Source
Load
Input impedance (Rin) and
Output impedance (Rout)
• Why do we prefer High Rin and Low Rout?
• Because it is more efficient.
• To maximize Vin2 (input voltage driving stage 2)
Rout1must be made lower, Rin2 higher.
• Good choice: Rin1M or over, Rin 10
Stage1(sensor)
Vout1
Rout1
Stage
2
Rin2
Rout
1
Vout1 Rin2
Vin2=
Vout1*Rin2/(Rout1+Rin2)
Vin2
Is
equivalent
to
Meaning of power gain in dB
(Decibel)
• Vout=output
• Vin=input
• Voltage gain =Vout/Vin
• Power gain =(Vout)2/ (Vin)2
• Power gain in dB=10*log10(Power gain )
• =20* Log10|(Vout/Vin)|=20*Log10|G|,
• where G= Voltage gain
• When power gain=(Vout/Vin)2=1, voltage_gain=1,
power_gain is 0dB
• When power gain=(Vout/Vin)2=0.5,
voltage_gain=(0.5)1/2=0.707, power_gain is -3dB
Frequency-gain plot When power gain=(Vout/Vin)2=1, voltage_gain=1, power_gain is
0dB
When power gain=(Vout/Vin)2=0.5, voltage_gain=(0.5)1/2=0.707,
power_gain is -3dB
• An amplifier frequency-gain is important to understand
its chartered at different frequencies.
• Horizontal axis is frequency (log scale) in Hz,
• Vertical axis is gain in dB
Log
Frequency
Power
Gain (dB)
0dB
-3dB
Gain is -3dB
Power gain is 0.5 Gain is 0dB
Power gain is 1
Slope:
20
dB/decad
e
drop
One decade = one number is 10 times of the other number
14
Operational amplifiers (op-amps)
– ideal op-amps
– inverting amplifier
– non-inverting amplifier
– voltage follower
– current-to-voltage amplifier
– summing amplifier
– full-wave rectifier
– instrumental amplifier
Ideal Vs. realistic
op-amp
• Ideal Realistic Rin
• A= infinite 105->108
• Zin= infinite 106(bipolar input)
1012(FET input)
output offset exists
V0=A(V+-V-) V-
V+ +
_ 2
3
6 LM741
Inverting amplifier
• Gain(G) = -R2/R1
• For min. output offset, set R3 = R1 // R2
• Rin=R1
• Question:
– If R1=1K, R2=10K, find G and Rin
+
_
R2
R1
R3
V0 V1
Virtual-ground,V2
A Input
Output
Non-inverting amplifier
_ V0
V1
R1
R2
• Voltage Gain(G) 1 + (R2/R1)
• For min. offset output , set R1//R2=Rsource
• High input resistance
• Question:
– If R1=1K, R2=10K, find G and Rin
+
V2
A Input Output
Differential amplifier
• V0=(R2/R1)(V2-V1)
• Minimum output offset R1 //R2 =R3 //R4
_ V0
R2
+
R1 V1
R3 V2
R4
A Input Output
Exercise
• A temperature sensor has an offset of 100mV
(produces an output of 100mV at 0 °C-degrees
Celsius), and the gradient is 10 mV per °C. The
temperature to be measured is ranging from 0 to 50 °C.
• The required ADC input range is 0 to 9Volts.
• Given that the power supply is +/-9V, design a
differential amplifier for this application.
Voltage follower (Unit voltage gain,
high current gain, high input impedance)
• Gain=1,
• Rin=high
• For minimum output offset R=Rsource
_ V0=V1
V1 +
R
A
Current to voltage converter:
Application to photo detector – no loading
effect for the light detector
_ V0
I R
• V0=I R
• I should not be too large otherwise
offset voltage will be too high.
+
A
Photodiode
Light
detector
Summing amplifier
_ V0
R
+
• V0 = -{(V1/R1)+(V2/R2)+(V3/R3)}R
R1
R2
R3
I1
I1+I2+I3
V1
V2
V3
Inputs
Output
Integrator
Differentiator
Op-amp characteristics
• Input and output offset voltages
– It is affected by power supply variations,
temperature, and unequal resistance paths.
– Some op-amps have offset setting inputs.
– Unequal resistance paths and bias currents
on inverting and non-inverting inputs
• Temperature variations
Op-amp dynamic response
• Slew rate -- the maximum rate of output
change (V/us) for a large input step
change.
– A741 slew rate=0.5V/ s. Fast slew rate is
important in video circuits , fast data
acquisition etc.
• Gain bandwidth product
– higher gain --> lower frequency response
– lower gain --> higher frequency response
Common mode gain
• If the two inputs (V+,V-) are connected together
and is given Vc, output is found to be Vo.
– ideal differential amplifier only amplifies the voltage
difference between its two inputs, so Vo should be 0.
• But in practice it is not.
• This deficiency can be measured by the
• Common_mode_gain=Gc=Vo/Vc.
op-amps (v.5f)
Diagram of gain bandwidth product
•
Hz
op-amps (v.5f)
Instrumentaiton amplifier
To make a better DC amplifier from op-amps
Diagram of instrumentation amplifier
Applications: Bridge amplifiers, amplifiers in
medical measurement systems
Instrumentation amplifier • It has all the advantages of an amplifier.
• Gain(G)=V0/(V+-V-)
• =(R4/R3)[1+(2R2/R1)] (typically 10 to 1000)
• Even V+=V-= Vc , there is a slight output
because of the Common Mode
Gain=Gc=V0/Vc
• Therefore, V0= G(V+-V-)+GcVc
• To measure this imperfection, Common Mode
rejection ratio (CMRR)=G/Gc (typically 103 to
107, or 60 to 140 dB)is used , the bigger the
better.
Comparing amplifiers
• Op Inv. Noninv. Diff. Instu.
• Amp Amp Amp Amp Amp
• High Rin Yes No Yes No Yes
• Diff’tial Yes No No Yes Yes
• input
• Defined No Yes Yes Yes Yes
• gain
op-amps (v.5f) 32
Operational amplifier selection
techniques and keywords • National semiconductor is the main manufacturer: See
– Generates Digital output by counting pulses over a fixed interval of time
• Low Speed
• Good Noise Immunity
• High resolution
– For slow varying signal
– With long conversion time
• Applicable to remote data sensing in noisy environments
– Digital transmission over a long distance
Parallel or Flash ADC
• Very High speed conversion
– Up to 100MHz for 8 bit resolution
– Video, Radar, Digital Oscilloscope
• Single Step Conversion
– 2n –1 comparator
– Precision Resistive Network
– Encoder
• Resolution is limited
– Large number of comparator in IC
Software Implementation
• Implementation with software using microprocessor
– Counting
– Shifting
– Inverting
– Code Conversion
• Limited Practical Use
– Availability of Good performance with very reasonable Cost
Shaft Encoder
• Elctromechanical ADC
– Convert shaft angle to digital output
• Encoding
– Optical or Magnetic Sensor
• Applications
– Machine tools, Industrial robotics, Numerical control
• Binary Encoder
– Misalignment of mechanism causes large error
• Ex: 011 111 (180deg)
• Gray Encoder
– Misalignment causes 1 LSB error
Interfacing the ADC to the IBM PC
• Interface Operations
– Most-recent-data Scheme
• At end of conversion it updates an output FIFO
• Automatically start new conversion
• CPU read FIFO to acquire most recent data
– Start-and-wait Scheme
• CPU initiate conversion every time it needs new data
• CPU check EOC until conversion is finished
– Using CPU Interrupt
• CPU initiate conversion every time it needs new data
• CPU can proceed to do other thing
• ADC interrupt CPU when conversion is complete
• CPU goes to ISR
– Information about the PIC 8259A is required .
Interface Software
• Memory Mapped Transfers
– ADC is assigned in Memory Space
• MRD, MWR signal
• MOV instruction
– More complex decoding logic
• I/O Mapped Transfers
– ADC is in I/O Space
• IOR, IOW signal
• IN, OUT instruction
– More Simple decoding logic
• DMA (Direct Memory Access)
– CPU release system bus by the request of DMA
– DMA controller carried out data transfer by generating the required addresses and control signals
– The system bus control reverts back to CPU when data transfer is finished
• DMA is useful
– High Speed
– High volume data transfer • Disk Drive interface
Interface Hardware
• Parallel Data Format
– Three state output buffer in ADC
– To Interface ADC
• CPU + Decoding logic
– To generate Chip Select signal
– To generate Start Signal
– To Check EOC signal
• Serial Data Format – Asynchronous Serial
transmission to send data over long distance to a monitoring station • UART is commonly used
• Interfacing 10 or 12 bit ADC – Transfer data in chunks of 8
bits one after another
DAS (Data Acquisition System)
• DAS performs the complete function of converting the raw outputs from one or more sensors into equivalent digital signals usable for further processing, control, or displaying applications
• Applications
– Simple monitoring of a single analog variable
– Control and Monitoring of hundreds of parameters in a nuclear plant
Single Channel System
• Transducer
– Generate signal of low amplitude, mixed with undesirable noise
• Amplifier, Filters
– Amplify
– Remove noise
– Linearize
• S/H (Sample and Hold)
– Reduce uncertainty error in the converted output when input changes are fast compared to the conversion time
– In Multi-channel system
• To hold a sample from one channel while multiplexer proceed to sample next one
• Simultaneous sampling of two signal
Sample and Hold Circuits
• Care in selecting hold capacitor Ch
– Low Value
• Reduces acquisition time
• Increase Droop
– High Value
• Minimize Droop
• Increase acquisition time
– Choose capacitor to get a best acquisition time while keeping the droop per conversion below 1 LSB
Commercially Available S/H
Multi-channel System
• Analog multiplexer and a ADC
– Low cost
• Local ADCs and digital multiplexer
– Higher sampling rate
How to select and use an ADC
• Range of commercially available ADCs
• Guidelines for using ADCs – Use the full input range of
the ADC
– Use a good source of reference signal
– Look out for fast input signal changes
– Keep analog and digital grounds separate
– Minimize interference and loading problem
Commercially available monolithic ADCs
Commercially available hybrid ADCs
A low cost DAS for the IBM PC
• Multi-channel system
– Less than $100
– ADC0816 from National Semiconductor
– Constant, repetitive rate
• 1000 samples/s
• Generating clock
– For starting ADC conversion
– For causing interrupt
– Make a pulse stream from TCLK with short pulses of duration = ½ x BCLK/4
• TCLK from 8253 Timer/Counter
– Wide pulse
ADC circuit for PC prototype
board SCSLCT
(Start Conversion SeLeCT)
: Latched trough port 30CH
SCSLCT = H
Selection of 30AH (/E10)
start conversion
SCSLCT = L
TCLK’ start conversion
INTSLCT
(INTerrupt SeLeCT)
: Latched trough port 30CH
INTSLCT = H
EOC cause IRQ2
INTSLCT = L
No Interrupt
CPU read Status register
(Port 309H) to check EOC
Status Register
• For polling TCLK and EOC signal
• Port 309H (/E9)
• Polling of EOC results in a low level after the data from ADC have been read
Throughput rate calculation
4.77MHz / 8
= 596KHz
Chap 0 37
Accuracy Calculation
• Better than 1% accuracy is ensured
• Actual accuracy with smooth input signal at room temperature will be better than 0.5%
END
University of Technology Control and System Engineering Department
Medical Engineering Branch
Computer Interfacing Techniques for Fourth year
Class Medical Engineering
1st Semester
2016 / 2017
Lecture 4
Digital to Analogue
Converters
3
Outline
• Purpose
• Types
• Performance Characteristics
• Applications
4
Purpose
• To convert digital values to analog voltages
• Performs inverse operation of the Analog-to-Digital Converter (ADC)
University of Technology Control and System Engineering Department
Medical Engineering Branch
Computer Interfacing Techniques for Fourth year
Class Medical Engineering
1st Semester
2016 / 2017
Lecture 5
I/O Buses and Interfaces
“I/O bus” “Bus interface” “CPU bus”
or “System bus”
CPU-Memory-I/O Architecture
CPU I/O module
Memory
I/O device
I/O Buses and Interfaces
• There are many “standards” for I/O buses and interfaces
• Standards allow “open architectures”
– Many vendors can provide peripheral (I/O) devices for many different systems
• Most systems support several I/O buses and I/O interfaces
Examples
• Expansion buses or “slots”
• Disk interfaces
• External buses
• Communications interfaces
Expansion Buses
• These are “slots” on the motherboard • Examples
– ISA – Industry Standard Architecture – PCI – Personal Component Interconnect – EISA – Extended ISA – SIMM – Single Inline Memory Module – DIMM – Dual Inline Memory Module – MCA – Micro-Channel Architecture – AGP – Accelerated Graphics Port – VESA – Video Electronics Standards Association – PCMCIA – Personal Computer Memory Card International
Association (not just memory!)
3 ISA slots
5 PCI slots Pentium CPU 6 SIMM slots
2 DIMM slots
Disk Interfaces
• Examples – ATA – AT Attachment (named after IBM PC-AT)
– IDE – Integrated Drive Electronics (same as ATA)
– Enhanced IDE • Encompasses several older standards (ST-506/ST-412, IDE, ESDI,
ATA-2, ATA-3, ATA-4)
– Floppy disk
– SCSI – Small Computer Systems Interface
– ESDI – Enhanced Small Device Interface (mid-80s, obsolete)
– PCMCIA
External Buses
• Examples
– Parallel – sometimes called LPT (“line printer”)
– Serial – typically RS232C (sometimes RS422)
– PS/2 – for keyboards and mice
– USB – Universal Serial Bus
– IrDA – Infrared Device Attachment
– FireWire – new, very high speed, developed by IEEE
Communications Buses
• For connecting systems to systems
• Parallel/LPT – special purpose, e.g., using special software
(Laplink) to transfer data between systems
• Serial/RS232C – To connect a system to a voice-grade modem
• Ethernet – To connect a system to a high-speed network
A Computer System Consists of Multiple Buses
• An I/O module is an interface between the system bus and an I/O bus
• An I/O module may also interface an I/O bus to an I/O bus
Motherboard PCMCIA bus
CPU/system bus
PCMCIA bus
SCSI bus
RS232C bus
CPU I/O
module I/O
module Disk
Disk
PCMCIA slot
PCMCIA SCSI card
I/O module
PCMCIA serial card
I/O module
PCMCIA slot
Modem
Memory
A Detailed Look to Computer Busses
• The following interface buses and ports are common in computer systems
– ISA
– PCI
– AGP
– Serial
– Parallel
– SCSI
– Ethernet
– USB
ISA (1 of 3)
• Industry Standard Architecture
• History – Originally introduced in the IBM PC (1981) as an 8 bit
expansion slot • Runs at 8.3 MHz with data rate of 7.9 Mbytes/s
– 16-bit version introduced with the IBM PC/AT • Runs at 15.9 MHz with data rate of 15.9 Mbytes/s (?)
• Sometimes just called the “AT bus”
– Today, all ISA slots are 16 bit
• Configuration – Parallel, multi-drop
ISA (2 of 3)
• Used for… – Just about any peripheral (sound cards, disk drives, etc.)
• PnP ISA – In 1993, Intel and Microsoft introduced “PnP ISA”, for plug-
and-play ISA – Allows the operating system to configure expansion boards
automatically
• Form factor – Large connector in two segments – Smaller segment is the 8-bit interface (36 signals) – Larger segment is for the 16-bit expansion (62 signals) – 8-bit cards only use the smaller segment
ISA (3 of 3)
• Advancements – EISA
• Extended ISA
• Design by nine IBM competitors (AST, Compaq, Epson, HP, NEC, Olivetti, Tandy, WYSE, Zenith)
• Intended to compete with IBM’s MCA
• EISA is hardware compatible with ISA
– MCA • Micro Channel Architecture
• Introduced by IBM in 1987 as a replacement for the AT/ISA bus
– EISA and MCA have not been successful!
PCI (1 of 2)
• Peripheral Component Interconnect – Also called “Local Bus”
• History – Developed by Intel (1993)
– Very successful, widely used
– Much faster than ISA
– Gradually replacing ISA
• Configuration – Parallel, multi-drop
PCI (2 of 2)
• Used for… – Just about any peripheral
– Can support multiple high-performance devices
– Graphics, full-motion video, SCSI, local area networks, etc.
• Specifications – 64-bit bus capability
– Usually implemented as a 32-bit bus
– Runs at 33 MHz or 66 MHz
– At 33 MHz and a 32-bit bus, data rate is 133 Mbytes/s
AGP
• Accelerated Graphics Port
• History
– First appeared on Pentium II boards
– Developed just for graphics (especially 3D graphics)
• Configuration
– Parallel, point-to-point (only one AGP port / system)
• Specifications
– Data rates up to 532 Mbytes/s (that’s 4x PCI!)
Identifying ISA, PCI, & AGP slots
– Here’s an image to help in identifying slots
AGP slot
PCI slot
ISA slot
Back of
computer
Serial Interfaces
• On PCs, a “serial interface” implies a “COM port”, or “communications port”
– COM1, COM2, COM3, etc.
• COM ports conform to the RS-232C interface standard, so…
RS-232C
• History – Well-established standard, developed by the EIA
(Electronics Industry Association) in 1960s – Originally intended as an electrical specification to connect
computer terminals to modems
• Defines the interface between a DTE and a DCE – DTE = Data Terminal Equipment (terminal) – DCE = Data Communications Equipment (modem) – A “modem” is sometimes called a “data set” – A “terminal” is anything at the “terminus” of the
connection • VDT (video display terminal), computer, printer, etc.
“Traditional” Configuration
RS-232C RS-232C Telephone network
DTE DCE DCE DTE
RS-232C Specifications
• Data rate
– Maximum specified data rate is 20 Kbits/s with a maximum cable length of 15 meters
– However… • It is common to “push” an RS-232C interface to higher data rates
• Data rates to 1 Mbit/s can be achieved (with short cables!)
• Configuration
– Serial, point-to-point
Serial Data Transmission
• Two modes
– Asynchronous • The transmitting and receiving devices are not synchronized
• A clock signal is not transmitted along with the data
– Synchronous • The transmitting and receiving devices are synchronized
• A clock signal is transmitted along with the data (and is used to synchronized the devices)
– Most (but not all) RS-232C interfaces are asynchronous!
Asynchronous Data Transmission
• Data are transmitted on the TD (transmit data) line in packets, typically, of 7 or 8 bits
• Each packet is “framed” by a “start bit” (0) at the beginning, and a “stop bit” (1) at the end
• Optionally, a “parity bit” is inserted at the end of the packet (before the stop bit)
• The parity bit establishes either “even parity” or “odd parity” with the data bits in the packet – E.g., even parity: the total number of bits “equal to 1”
(including the data bits and the parity bit) is an “even number
1’s and 0’s in RS-232C
• A “1” is called a “mark”
• A “0” is called a “space”
• The idle state for an RS-232C line is a 1 (“mark”) – Idle state is called “marking the line”
• Voltages on an RS-232C line – Well… that’s another story, and it’s not really a
concern to us
Data Transmission Example
• Plot of the asynchronous RS-232C transmission of the ASCII character ‘a’ with odd parity:
0 1 0 0 0 0 1 1 0 1
Idle state
Stop bit
Start bit
Idle state
ASCII character ‘a’ • 7 bits • LSB first
Parity bit
time
TD
Exercise – RS-232C
• Plot the transmission of the ASCII character “X” over an asynchronous RS-232C channel with 7 data bits and even parity
Exercise – RS-232C
• Plot the transmission of the ASCII character “X” over an asynchronous RS-232C channel with 7 data bits and even parity
0 0 0 0 1 1 0 1 1 1
time
Answer
TD
RS-232C Connectors
• The original standard specified a 25-pin connector
• Today, a 9-pin connector is more common
• E.g., DB9P
Note: •P = “pin” •Sometimes called a “male” connector •The mate for this is a DP25S, or
“socket” connector – the “female”
RS-232C Connectors
DB25P
DB9P
DB25S
DB9S
Where is pin 1? Where are pins 2, 3, 4, etc.?
Pin 1
Pin 1 Pin 1
Pin 1
RS-232C Pin Numbers 1 2 3 4 5
9 8 7 6
DB9P
RS-232C Pins, Signals, Directions
DB25 1 2 3 4 5 6 7 8
20 22
Signal Name
CD Chassis Ground
TD Transmit Data
RD Receive Data
RTS Request To Send
CTS Clear To Send
DSR Data Set Ready
SG Signal Ground
DCD Data Carrier Detect
DTR Data Terminal Ready
RI Ring Indicator
Direction -
DTE DCE DTE DCE DTE DCE DTE DCE DTE DCE
- DTE DCE DTE DCE DTE DCE
DB9
2 3 7 8 6 5 1 4 9
Pin
Parallel Interfaces
• History – In the context of PCs, a “parallel interface” implies a
Centronics-compatible printer interface – Originally developed by printer company, Centronics – Introduced on the IBM PC (1981) as an LPT (“line printer”)
port – Improvements
• EPP (Enhanced Parallel Port), development by Intel, Xircom, Xenith • Enshrined in the standard IEEE-1284 (1994)
– “Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers”
• Also called LPT, has four modes of operation: 1. Standard Parallel Printer Port, controlled via three I/O ports starting
with address 278H, or 378H, or 3BCH. The first is called the data port (output), the second is called the control port (output), and the third is called the status port (input). Data rate about 150 KB/sec.
2. Bidirectional Printer Port, found on the IBM PS/2 models and modern compatibles. The data bus is bidirectional.
3. Enhance Parallel Printer Port (EPP), has a higher data rate than SPP and Bidirectional mode 9 up to 1MB/sec.).
4. Extended capabilities Printer Port (ECP) introduced by Hewlett-Packard, can Address more than one device.
1. • Configuration
– Parallel data transfer, point-to-point (except in ECP where multiple devices can be addressed)
Typical Printer Cable
DB25P (male) • Connects to PC
Centronics male • 36 pins • Connects to printer
Pinouts (for SPP)
Direc-
tion
out out out out out out out out out in in in in out in out out -
low pulse (>0.5 µs) to send LSB . . . . . . MSB Low pulse ack. (~5 µs) High for busy/offline/error High for out of paper High for printer selected Low to autofeed one line Low for Error Low pulse (>50 s) to init Low to select printer
-
Small Computer System Interface (SCSI) (1 of 2)
• History – Developed by Shugart Associates (1981)
– Originally called Shugart Associates Systems Interface (SASI, pronounced “sassi”)
– Scaled down version of IBM’s System 360 Selector Channel
– Became an ANSI standard in 1986
• Used for… – Disk drives, CD-ROM drives, tape drives, scanners, printers,