Compula Manual

Lab Session 1

Objectives:

At the end of the session, the student should be

1. To be able to enter a schematic diagram into a Multisim worksheet.

2. To be able to perform basic analog simulation of a common-emitter amplifier.

3. Familiarize with the use of the following virtual instruments:

a. multimeter

b. oscilloscope

c. bode plotter

d. frequency generator

4. To be able to make voltage and time measurements using the virtual oscilloscope

5. To be able to plot the frequency response of a circuit using the Bode plotter

6. To be able to perform basic analog simulation of a non-inverting or inverting

operational amplifier

Guided Exercise:

Simulating a C-E BJT Amplifier:

1) Open up a blank worksheet in Multisim and use the schematic editor to enter the

following schematic diagram:

See the "Multisim Equipment Guide" for a reference on the icons used for identifying the

virtual equipment. Save the file as session01-1.msm.

Simulation:

1. Output display using an AC input signal

a. Double-click the signal generator and configure as

b. Double-click the oscilloscope and configure as

c. Flick on the power switch to begin the simulation session. You should get a

display similar to

d. Try setting the trigger control to Normal and Auto.

How would you differentiate the effect of the three trigger modes on the output waveform

as displayed in the screen?

e. Measure the peak amplitude of the output waveform by moving a cursor so that it

intersects the point in the waveform that you wish to measure. Using Cursor 1, for

example,

The peak amplitude is the value across VA1 given that the waveform is centered at 0

volts. If Cursor 2 was used, read VA2 instead.

f. Position so that Cursor 1 coincides with a peak and Cursor2 with the next peak.

This sets up the measurement of the period.

What is the measured period of the waveform? ______

g. Try increasing the value of the trigger level by increments of 1V. For each change

in trigger level, reset the simulation by turning off and on the power switch.

At what trigger level voltage will the display disappear? _____ Why?

Given the output waveform, what range of trigger level voltage do you expect to

see an output display?

2. Determining the Gain of the amplifier using oscilloscope measurements

a. Get the peak amplitude of the output signal.

b. Get the peak amplitude of the input signal by using the B Channel of the

oscilloscope.

c. Calculate the gain.

Gain = Vo / Vi = ____

3. Determining the bias conditions of the amplifier

a. Disconnect the signal generator from the input of the amplifier.

b. Connect a multimeter across the collector and emitter terminals of the transistor

and measure the DC voltage.

Vce = _____

c. Connect a multimeter in series with the R2 and the 12-volt supply and measure

the DC current.

Ic = _____

4. Determining the frequency response of the amplifier using the Bode plotter

a. Modify the circuit to the one shown below

Save the file as session01-2.msm.

b. Configure the Bode plotter as

c. Turn the power switch on to begin the simulation. The Bode plotter should

display

d. Use the cursor to determine half-power cut-off frequency.

cut-off freq = _____

What is the phase angle at the cut-off frequency?

angle = _____ degrees

- Put all the data asked by the procedures into a notepad file named as session01-1.txt.

- You need to submit the two multisim files and the notepad file.

Exercise:

Design a non-inverting amplifier using an LM324 opamp with a gain the same as the C-E

amplifier in the guided exercise. Verify the design using multisim.

In addition, set-up a multisim circuit so that a Bode plot covering a frequency range of

1Hz and 5MHz can be viewed when the simulation is run.

You also need to submit one multisim file (session01-3.msm) for the gain performance

verification, a notepad file (session01-2.txt) containing the design and performance info

for the opamp circuit, and one multisim file (session01-4.msm) for the plotting of the

frequency response.

Lab Session 2:

Objectives:

At the end of the session, the student should be able to use the following instruments

1. oscilloscope

2. bode plotter

3. wattmeter

4. multimeter

5. distortion meter

Guided Exercise:

1. Open up a blank worksheet in Multisim and use the schematic editor to enter the

following schematic diagram:

See the "Multisim Equipment Guide" for a reference on the icons used for identifying

the virtual equipment. Save the file as session02-1.msm.

Simulation:

Do the measurements specified below. Write down all the required data or answers to an

MS Word file. If you see [cap] beside an instruction relating to a virtual instrument, you

need to do a screen capture of the instrument window/display and paste it in your MS

Word document.

1. Using the Oscilloscope

a. Display the input and output waveforms. [cap]

b. Measure the voltage across the load resistor (R5) can calculate the rms

power dissipated.

c. Display Channel A waveform versus Channel B waveform (ie. Voltage vs

Voltage, not voltage vs time) [cap]

Make an observation relating to the transfer function of the CE amplifier

based on the resulting display. You should consider questions like "Does

the circuit introduce phase shifts?" or "Is the amplification process linear?"

and the whys.

2. Using the Multimeter

Measure the voltage and the current at the load resistor and calculate the power.

3. Using the Bode Plotter

a. Display the frequency response of the circuit. Make the necessary

adjustment to produce a relevant and appropriate display. [cap]

b. Determine the cut-off frequency (-3db from the passband level)

4. Using the Distortion Analyzer

Measure the Total Harmonic Distortion at the following levels of input

a. 50 mVrms

b. 100 mVrms

c. 200 mVrms

5. Using the Wattmeter

Measure the power dissipated by load at the following levels of input

a. 50 mVrms

b. 100 mVrms

c. 200 mVrms

Measure the power dissipated by the load at the following THD levels

d. 3%

e. 10%

Put all the data asked by the procedures into a MS Word file named as session02.doc.

You need to submit the one multisim file (session02-1.ms7) and the MS Word file.

(session02-1.doc)

Exercise:

Create a new multisim file for the schematic shown below and apply the same

measurements that you did in the guided exercise to this circuit.

The files to be submitted are:

• session02-2.ms7 [multisim file of the power amp circuit]

• session02-2.doc [MS word file containing the screen capture and data]

Lab Session 3

Objectives:

At the end of the session, the student should be familiar with the basics of using the

various analyses available with Multisim for simulating a circuit.

Guided Exercises:

Device Under Test 1:

Use this circuit to for the Spice analyses demonstrated on this page:

The circuit is an Audio Power Amplifier. Click on the schematic for a larger graphic.

A Multisim 2001 schematic file can be obtained at this link or link.

DC Bias Analysis:

The DC operating point analysis determines the DC operating point of a circuit. For DC

analysis,

AC sources are zeroed out and steady state is assumed, that is, capacitors are open

circuits

and inductors are short circuits.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->DC Operating

Point.

A window similar to the following will pop-up

2. Under the "Output Variables" tab, select all the items from the list of variables in the

circuit (list on left) and click on the "Plot during simulation button.

3. Click on the "simulate" button to start the analysis. [Exercise note: capture results]

A sample result if Vcc = 48volts is

The first column lists the node numbers in the circuit and the second column indicates the

voltages at the nodes. "#branch" indicates current.

AC Analysis:

The AC analysis calculates the AC circuit response as a function of frequency. This is the

method at work when using the Bode Plotter.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->AC Analysis.

2. Under the "Output Variables" tab, select node 2 for analysis.

3. Under the "Frequency Settings" tab, specify the following

4. Begin simulation. [Exercise note: capture result]

The following figure is a sample graph with node 18 selected and the grid option

of the analysis graph enabled

Transient Analysis:

In transient analysis, also called time-domain transient analysis, Multisim computes the

circuit’s

response as a function of time. This is the core functionality behind the virtual

oscilloscope.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->Transient

Analysis. 2. Under the "Output Variables" tab, select node 18 for analysis.

3. Under the "Analysis Parameters" tab, specify the following


A sample output looking at node 2 is


Use this circuit to for the Spice analyses demonstrated on this page.


A Multisim 2001 schematic file can be obtained at this link or this.

Fourier analysis:

Fourier analysis is a method of analyzing complex periodic waveforms. Each frequency

component (or term) of the response is produced by the corresponding harmonic of the

periodic waveform.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->Fourier Analysis .



4. Set the output of the input source to 800mVpk.


A sample result using node 2 for analysis is given by

DC Sweep:

The DC sweep analysis computes the DC operating point of a node in the circuit for

various values of one or two DC sources in the circuit. Using a DC sweep analysis, you

can quickly verify the DC operating point of your circuit by simulating it across a range

of values for one or two DC voltage or current sources.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->DC Sweep .

2. Under the "Output Variables" tab, select noded 10, 11, and 12 for analysis.

3. Under the "Analysis Settings" tab, specify the following


The following figure is a sample graph with node 18 selected and the grid option

of the analysis graph enabled

Sensitivity Analysis:

Sensitivity analyses help to identify the components which affect a circuit's DC bias point

the most. Sensitivity analyses calculate the sensitivity of an output node voltage or

current with respect to the parameters of all components (DC sensitivity) or one

component (AC sensitivity) in your circuit. Sensitivity analyses produce the relevant

parameters with their original values and their sensitivities. Sensitivity is expressed as the

change in output per unit change of input both in values and percentages.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->Sensitivity

Analysis. 2. Under the "Output Variables" tab, select all resistor variables for analysis.



A sample output looking at node 18 is

4. This sample result shows that changing resistor R1 has the greatest effect on the

DC Bias at node 18.


Use this circuit to for the Spice analyses demonstrated on this page.


A Multisim 2001 schematic file can be obtained at this link or this.

Parameter Sweep:

Using parameter sweep analysis, you can quickly verify the operation of your circuit by

simulating

it across a range of values for a component parameter.

Procedure:

1. From the Multisim menu, click on the Simulate->Analyses->Parameter Sweep .



This settings specifies that the capacitance of C6 will be set to each of the values listed in

"Points to sweep"

4. Click on the "More" button and specify the following

This selects transient analysis to be done for each value of C6 specified in the previous

step.

5. Click on the "Edit Analysis" button an specify the following

This configures the transient analysis to be done under parameter sweep. The time plot

will start after 10 milliseconds from time zero and stops 2 milliseconds after. A zero

value was not chosen as the starting time to bypass startup effects.

6. Set the output of the input source to 600mVpk.


This simulation should give you an output similar to the following

This result shows that the value of C6 has an effect on the clipping level of positive half-

cycle of the output signal. The output clips sooner if the value of C6 is lower. This is

expected because C6 is placed in the circuit precisely to reduce clipping in the positive

half-cycle. The process is called bootstrapping.

Other Analyses:

Explore the other analyses available in multisim by perusing the User's Guide or Help

facility as well as the sample files provided with Multisim (version 7 comes with samples

of using the analyses

Analyses Graph:

Explore all the options that allow that manipulation of the Analyses Graph.

Place all the data asked by the procedures into a MS Word file named as session03.doc.

You need to submit the one multisim file (session03-1.ms7) and the MS Word file

(session03-1.doc). When you save the multisim file, all the analyses settings will be

retained.

Application Exercise:

For each of the following. use the amplifier circuit in the guided exercise. You are not

allowed to use any of the virtual instruments. You must make all the necessary

measurements using the analyses only. All measurements that you supply as a response to

a query must be accompanied by a screen capture of the corresponding Analysis Graph

display.

The files to be submitted are:

• session03-2.ms7 [multisim file of the power amp circuit]

• session03-2.doc [MS word file containing the screen capture and data]

1. With the input voltage set at 500 mVrms, what is the amplitude of the output at

time t=3 ms?

2. Which unwanted harmonic component is greatest at the output when the input is

set to 1Vrms?

3. Produce a single graph showing the effects on the output of having C4 assume

these values: 5.1pF, 5.1 microFarad and 5.1 milliFarad.

4. Which of the capacitors in the circuit affect the low frequency cut-off? (use

qualitative analysis to eliminate the capacitors which do not have an effect)

5. Which of the capacitors in the circuit affect the high-frequency cut-off?e

qualitative analysis to eliminate the capacitors which do not have an effect)/li>

6. What are the values of the emitter current of Q5 if its temperature becomes 25,

100, and 150 degrees centigrade? What is the significance of the results for the

circuit designer?

7. Output waveform clipping during the positive half-cycle occurs because of at

least two reasons:

a. insufficient voltage at the base of Q3 (dependent on Vcc)

b. short-circuit protection activating

Short-circuit protection for the positive half-cycle is implemented by diodes D1a

D1b and D2b together with the base of Q3 and R10. During overload conditions,

this setup limits the voltage across R10 to around 1.2 volts thereby limiting the

current going to the load.

Identify using simulation if the clipping that occurs during the following cases is

due to "a" or "b" above:

- RL=3ohms, Vin=600mVrms

- RL=8ohms, Vin=800mVrms

8. Does changing the value of C6 alter the frequency response of the circuit?

Lab Session 4

At the end of the session, the student should be familiar with

• the use of hierarchical blocks

• measuring current at any circuit branch

• the use of interactive components during simulation

• the fault simulation facility of multisim

Hierarchical Blocks:

Hierarchical blocks allow circuits or subcircuits to be represented as a block. This

simplifies large and complicated circuits.

Circuits:

Circuit 1. Original Power Amplifier Circuit (link 1 or link 2)

Circuit 2. Modified Power Amp Circuit.

Circuit 3. Using the power amp block.

Procedures:

A. Circuit Preparation for Heirarchical Block Representation

To be able to represent a circuit as a block, the pin-outs of the block should be defined.

Transform the power amp circuit in Circuit 1 to that shown in Circuit 2. Save the

modified circuit as "pamp01-block.msm".

B. Using a Circuit as a Block element

1. Open a blank worksheet.

2. From "Place" menu item, click on "Place Heirarchical Block" to begin placing a

block element on the worksheet.

3. Select "pamp01-block.msm".

4. Place the the resulting block symbol into the worksheet.

5. Complete the schematic shown in Circuit 3 and save as "pamp01-block-

example.msm".

C. Verify the Circuit Operation

1. Display a time-domain waveform of the output signal and a frequency response

graph of Circuit 3. [cap]

2. Do the same for Circuit 1. [cap]

3. Compare the results for both circuits. Are the results identical?

Various Topics Set 1

Circuits:

Circuit 1. Voltage Regulator Circuit (link 1 or link 2).

Interactive Components:

Multisim has "interactive" components that allow their state to be changed while

simulation is in progress. Two examples are switches and potentiometers.

1. Open Circuit 1 in multisim. Adjust the wiper position of R5 to 37% by pressing 'a'

or 'A'.

2. Verify that the circuit file is in order by performing a dc sweep analysis of the

output node with V1 as the sweep source. V1 should increase from 0 volt to 50

volts. The resulting analysis graph should be identical to

• What is the input voltage (V1) required by the circuit to begin regulating at the rated

output voltage?

What is the change in the output voltage if the input voltage is changed from 20 volts to

50 volts?

• Click the simulation button and observe the reading of the voltmeter connected to the

output node.

• While the simulation is in progress, adjust the wiper position of R5 to 26%.

What is the voltmeter reading at the output node?

• Turn off the simulation button.

• Perform a dc sweep analysis of the output node with R5 at 26%. [cap]

Measurement Technique:

Task: Perform a dc sweep analysis on the current through R9.

Problem: There is no variable referring to the current at R9.

Solution: Add a 0-volt source.

1. Insert a 0-volt dc source in series with R9.

2. Perform a dc sweep analysis of the current through R9 with V1 as the sweep

source (0-50volts). [cap]

3. Determine the change in the R9 current when the input voltage is changed from

20 to 30 volts.

Fault Simulation and Troubleshooting

Multisim allows device faults to be simulated. This facility allows the user to observe the

effects of fault conditions on one or more components.

Circuits:

Circuit 1. Power Amplifier Circuit (link 1 or link 2).

Click on the schematic for a larger graphic.

Fault Simulation:

1. Open Circuit 1 in multisim.

2. Provide a reference set of measurements of the circuit when all components are in

proper working condition. Measure

o Time-domain waveform [cap]

o Frequency Response [cap]

o DC Operating Point (all variables) [list table contents]

for three nodes in the circuit including the output node.

3. Introduce a fault to Q3 in the form a short between the collector to emitter

junction. This can be done by double-clicking on Q3, selecting the "fault" tab,

selecting "short", and specifying the collector and the emitter pins.

4. Observe the effect on the following data:

o Time-domain waveform [cap]

o Frequency Response [cap]

o DC Operating Point (all variables) [list table contents]

at three nodes (same set as before) in the circuit, including the output node.

Note: After the above steps, don't forget to remove the fault.

Troubleshooting:

Multisim has a feature where it randomly selects a fault in the circuit. This is useful for

practicing troubleshooting techniques.

1. From the "Simulate" menu item, click on "Auto-fault".

2. Specify one unit of shorted component.

3. Using the multimeter, determine which component is defective and which of its

pins are involved. Specify the steps/measurements undertaken leading to the

isolation of the defective component.

4. Modify the "auto-fault" settings so that instead of a shorted component, one "any"

fault condition is selected.

5. Repeat step 3.

Issues:

• Often, more than one device is defective because when one breaks down, others

may break as well.

• Resistance checks often necessitates the removal of the component being checked

from circuit.

• Exhaustive checking of pairs of pins is very time consuming if done manually and

in many cases, analytical exploration of the circuit behaviour is preferred.

• It is the usual case that the type of fault condition is unknown.

Put all the data asked by the procedures into a MS Word file named as session04-1.doc.

You need to submit the followig multisim files:

• pamp01-block.ms*

• pamp01-block-example.ms*

• vreg01.ms*

• pamp01.ms* [fault/troubleshooting]


1. Set up an equivalent circuit for vreg01.msm using a heirarchical block and verify

identical results for both versions. Provide data for the verification measurements.

Files: session04-2-1.doc, vreg01-block.ms*, vreg01-block-ex01.ms*

2. Apply one "any" auto-fault condition on the vreg01.msm circuit and identify

which component is defective. Provide the step by step procedures (with

measurement data) how the faulty component is identified.

Files: session04-2-2.doc, vreg01-2.ms*

Lab Session 5

Objectives:

At the end of the session, the student is able to

1. Use the Logic Converter for

a. designing gate-level combinational circuits from truthtables

b. deriving the truthtable from a schematic of a combinational circuit

c. converting between truthtables and equivalent boolean expressions, and

vice-versa

d. doing the above for both single and multiple-output digital circuits

2. Use the Logic Analyzer for displaying the timing diagram/input-output signals of

digital circuits.

Guided Exercise:

1. Logic Analyzer

File Description

logic_analyzer_1.doc covers all steps/parts

updwncounter2.ms7 all steps/parts

Using the Logic Analyzer with Internal Triggering

Task: Produce a timing diagram of the outputs of a 2-stage up-down BCD counter.

1. Open the "updwncounter.ms7" file from the "Program Files/Multisim 7

Demo/Samples/Educational Demo Circuits/Digital Circuits" folder and modify it

to match the following schematic diagram:

Save the file as "updwncounter2.ms7".

In the modified circuit, a logic analyzer is added. See the Multisim help to get

information on how to use the logic analyzer.

2. Make sure that the displays are set to zero. If they are not at zero, start the simulation

and press "c" to set the clear switch position to ground. Stop Simulation.

3. Press "c" to set the "clear" input to high (5 volts). Press "e" to set the "enable" input to

low (ground).

4. Double-click on the logic analyzer, click on the "Set..." button under the "clock" panel

and adjust the settings to match the following:

then close the "clock setup" window.

5. Click "Set..." button under the "Trigger" panel and adjust the settings to match the

following:

then close the "Trigger Settings" window.

5. Start the simulation.

6. Adjust the "clocks/div" to 10.

7. Wait for the logic analyzer to stop capturing then stop the simulation.

Capture the logic analyzer window.

8. Scroll the logic analyzer display so the 0 can be seen on the Time scale.

Capture the logic analyzer window.

9. Answer the following questions:

How many cycles of the internal clock are there within one cycle of the

source V2? Which of the analyzer setting does this relate to?

How many cycles of the Internal clock are there before the first positive

edge of the source V2 from time 0? Which of the analyzer setting does this

relate to?

What is the total number of cycles of V2 were captured by the logic

analyzer?

2. Logic Converter

File Description

logic_converter_1.doc covers all steps/parts

logic_converter_1_d.ms7 part D

logic_converter_1_e.ms7 part E

logic_converter_1_f.ms7 part F

A. Deriving the boolean expression from a Truthtable with a Single Output Variable

Demo Problem: Determine the Boolean expression of a 2:1 multiplexer

1. Place a logic converter into a worksheet and double-click on it.

2. Specify the 2:1 multiplexer truthtable from the logic converter panel

a. Click on A, B and C to specify the three multiplexer inputs (A and B are

the two channels and C is the selector).

b. For each row of input, specify the appropriate output value by clicking on

the row item on the rightmost column one or three times as necessary.

You should get something like

Click on the button to get the equivalent unsimplified boolean

expression.

Do this: List the boolean expression.

5. Close the Logic Converter window.

B. Deriving the Truthtable of a Circuit with a Single Output

Demo Problem: Given a circuit schematic, determine its truthtable

1. Open a new worksheet.

2. Enter the following schematic diagram

Note: The last pin (on the right) is where the output of the circuit is connected to.

3. Click on the button.

Exercise: Capture the truthtable.

C. Converting a Boolean Expression into a Truthtable

Demo Problem: Given a boolean expression, AC'+BC, determine the equivalent

truthtable.

1. Place a new Logic Converter into the worksheet and double-click on it.

2. Type the expression "AC'+BC" into the textbox at the bottom of the Logic

Converter window.

3. Click on the button

Exercise: Capture the truthtable.

D. Converting a Boolean Expression to a Circuit

Demo Problem: Given a boolean expression, find the equivalent circuit using any

type of gate device.

1. Continuing from step C.3, click on the button

2. Click and drag the resulting circuit in an empty part of the worksheet.

Exercise: List the type of gates and the number of units per type contained in the

equivalent circuit.

E. Converting a Boolean Expression to a Circuit using on NAND gates

Demo Problem: Given a boolean expression, find the equivalent circuit using any type of

gate device.

1. Continuing from step D.2, click on the button.

2. Click and drag the resulting circuit in an empty part of the worksheet.

Exercise: List down how many nand gates were required.

F. Deriving the Circuit from a Truthtable with Multiple Outputs

Demo Problem: Given the truthtable of a BCD-to-Gray-Code converter, specify a circuit

that implements it. The truthtable for the converter is

Approach: Do the procedure for getting the circuit of a single output truthtable to each

output of the multiple output table and put the generated subcircuits together.

1. Create a new worksheet and place a logic converter in it.

2. Specify the truthtable entries for the first output

3. Get the simplified boolean expression (click on ).

4. Get the equivalent circuit (click on ) and place it somewhere in

the worksheet.

5. Repeat steps 1 to 4 for each of the remaining outputs.

6. After all circuits for all outputs have been generated, edit them so that the

corresponding input lines from each circuit are tied up together.

7. Verify using the circuit-to-truthtable function if the each output is generated

correctly for each set of inputs.


Do the following application exercises:

1. Using the logic converter, specify the circuit that will implement a BCD-to-seven-

segment-display (common-cathode) decoder. Modify the circuit so that it can be

imported as a hierarchical block element. Finally, produce a separate worksheet

that will test the block element on a 7-segment device without a built-in decoder

using a word generator for the inputs.

The truthtable for the converter has four inputs and seven outputs and is of the

form

using the following segment designations

The 7-segment device to be used has a pin for every segment plus the cathode. The

multisim v7 installed in at V301 has such a device available for simulation use.

Files to upload:

• one multisim file for the decoder ready for use as a hierarchical block element

[7segment-block.ms7]

• one multisim file for testing the decoder imported as a block element on a 7-

segment device [7segment.ms7].

Lab Session 6:

Demo Exercises:

Demo Exercise 1 (Word Generator):

Enter the following schematic:

2. Double-click on the word generator. You should start with the following settings

3. Click on the "Set" button and duplicate the following settings

then press "Accept".

4. Click on "Burst".

Demo Exercise 2 (Word Generator):

This exercise looks as the following items:

• The use of a "bus" in wiring circuits.

• The use of the "ready" output of the word generator to sync some operations in a

circuit

• The use of patterns defined outside of multisim.

Note: Not all details in using the above functionalities are not provided. You are expected

to refer to the help facility of multisim [The objective is not to make your life difficult but

to train you in navigating through the software including the help facility; Very detailed

step-by-step manuals are not always available and exploration is a must].


Save the file as "wordgen-dx2.ms7" [for upload].

2. Open a Notepad window and type the following:

Save as "wordgen02.dp".

3. Double-click the word generator and click on the "Set" button.

4. Select "Load" then click on "Accept".

5. From the resulting "Open Patterns" dialog box, choose the "wordgen02.dp" file you

created with notepad.

6. Click on the "burst" to run the simulation and have the word generator sequence

through the loaded word patterns.

What is the correlation between what is displayed in the hex indicators and the word

patterns that were outputted?

7. Double-click on the Logic Analyzer and set the clocks/div to 14.

Capture the analyzer display.

Exercise 1 (Observing Glitches):


2. Click on the simulate button and double-click on the logic analyzer. Stop simulation

when the trace display reaches the last division before the 1ms mark.

Do you see the expected waveforms? Why or why not? Can you identify any glitch or

unwanted circuit behaviour?

Capture the display.

3. Click on "Set" and adjust the clock rate to 4Mhz and then repeat step 2 but stop

simulation when the trace just reaches 2.5us.

4. Click on "Set" and adjust the clock rate to 100Mhz and then repeat step 2 but stop

simulation when the trace just reaches 2.5us and set the clocks/div to 25.

Lab Session 7:

Demo Exercise:

Demo Exercises

A. Frequency Translation Demo 1

1. Open a new Commsim worksheet at enter the following diagram

Click on image to view a larger image.

Note: The display on the plot windows will appear after running the

simulation.

The instruments used are:

Save the file as Session07.vsm [upload]

2. Double-click on the first Complex Spectrum Block and set its parameters

to

3. Repeat the same thing for the second Complex Spectrum Block

4. Double-click on the first Plot Window and set parameters to

5. Double-click on the third Plot Windows and set the following

6. In the simulate>Simulation Properties menu item, set "end" to 0.001, "frequency" to

50000000.

7. Run the simulation and then double-click on the second Plot Window and set the

following

8. Answer the following question:

The circuit multiplies a 50khz sinusoid with a 455khz sinusoid. The product is

multiplied again with the same 455khz signal.

What are the frequency components of the first product? The second product?

Why are there three components in the second product?

B. Frequency Translation Demo 2

1. Open a new worksheet and set up the following diagram

Save the file as Session07b.vsm.

2. Make the necessary adjustments to the component parameters so that the displays

shown in the figure are reproduced.

Note: Under "Simulation Properties" , set "end" to 0.2 and "frequency" to 700000.

C. AM Modulation

1. Open the commsim file at this link.

2. Configure the components to reproduce the following plots

What does the spectrum plot represent? Is it the spectrum of the amplitude modulated

signal (shown in red)?

Files to upload:

Session07.vsm

Session07b.vsm

Session07.doc


Do the following Application Exercises:

1. Modify the diagram in Demo Exercise B so that the following spectrum plot is

produced

• Save the file as Session07-app-01.vsm [upload]

2. Modify the circuit in Demo Exercise C so that the amplitude modulated signal (in

red) is demodulated using the square-law approach.

Capture plots of the demodulated signal and the modulating signal.

Save the diagram as Session07-app-02.vsm. [upload]

3. Set up a diagram that will do frequency shift keying based on the following plots

3. Save the circuit as Session07-app-03.vsm. [upload]

Files to upload:

Session07-app.doc

Session07-app-1.vsm

Session07-app-2.vsm

Session07-app-3.vsm

Lab Session 8:

Topic: EYE DIAGRAM, HISTOGRAM

Exercise 1:

1. Recreate the diagram shown in the following figure

Exercise 2:

In this section, the following will be covered:

1. Using the Analog-to-Digital Converter Block to capture and quantize analog

signals

2. Using the Export block to store signal data to a file

3. Using the step simulation control

Procedures:

1. Recreate the diagram shown in the figure

Move the mouse over the blocks to see information about the block.

Fix the bounds of the Plot window axes as shown.

Note: Ignore what is displayed in the signal consumer windows in the figure.

Save the diagram as adc01.vsm.

2. Set the simulation sampling frequency to 20khz, start=0, end=1msec.

3. Click on the simulate button and observe what happens. [no need to record

observation]

4. Double-click the "export" block and set the delta time to 0.0001. Click on OK.

5. Click on F10 (simulation stepping) once. Observe the effect.

6. Click on F10 in succession until a complete cycle of the input sinusoid is displayed.

Questions:

How many presses of F10 is required to complete one cycle? How does this relate to the

sampling frequency?

What is the most significant bit, the uppermost or lowermost light?

7. Double-click on the "export" block and click on "Browse". [This opens up the file to

which data has been written to]

Copy the file contents and paste into your word document.

Question: What do these numbers mean?

8. Connect the terminal labeled A1 to the other inputs of the "export" block. Click on the

simulate button and repeat step 6.

Exercise 3:

TOPICS: FSK Modulation and Demodulation, File data source and File Export, Parallel-

to-Serial, Serial-to-Parallel, Compound Blocks

1. Download the file at this link and open it in Commsim.

2. Open a Notepad file and type the following in:

0

244

100

23

125

45

77

165

90

11

105

Save the file as fsk_in.dat.

3. Configure the file data source in the diagram to open fsk_in.dat.

4. Configure the export block to use the file fsk_out.dat.

5. Run the simulation.

6. Inspect both fsk_out.dat and fsk_in.dat.

Questions:

Are the contents of the two files the same?

Why do you think is the use of adding 2 to the output of the parallel to serial

converter before connecting to the plot window?

7. Modify the diagram so that compound blocks are used as shown in this figure

7. To group a set of block elements into a compound block, select the elements to be

included then click on Edit->Create compound block. Specify the name of the

compound block.

Save the modified diagram as fsk01-compund.vsm.

Exercise 4:

TOPICS: Constellation Diagrams

1. Open the sample file DQPSK_Modulator.vsm found under the

"Commsim\Commsim_ex\modulators" folder.

2. Run the simulation and study the diagram, simulation setup and results.

3. Using the diagram in the file BER_Control.vsm (found in

"Commsim\Commsim_ex\Estimators") as reference, apply the setup found in

DQPSK_Modulator.vsm to a QPSK modulator - demodulator instead of DQPSK

and produce the corresponding constellation diagram.

Save the file as QPSK-constellation.vsm.

Exercise 5:

TOPIC: Bit Error Rate

1. Open the sample file BER_Control.vsm found under the

"Commsim\Commsim_ex\Estimators" folder.

2. Run the simulation and study the diagram, simulation setup and results.

3. Using the diagram in the file DQPSK_Modulator.vsm as reference, apply the

setup found in BER_Control.vsm to a DQPSK modulator - demodulator instead

of QPSK and produce the corresponding Bit Error vs ES/No plot.

Save the file as DQPSK-biterror.vsm.


1. Determine the frequency spectrum of the following encoding methods:

a. Non-return to zero (NRZ)

b. Manchester Encoding

c. Aternate Mark Inversion (AMI)

d. Bipolar 8 zero subsitition (B8ZS)

e. Hi-density bipolar 3 zeros. (HDB3)

Capture the spectrum display and submit the file for each. The default data

rate is 1 kbps.

Files: NRZ.vsm, Manchester.vsm, AMI.vsm, B8ZS.vsm, HDB3.vsm

2. Set up a simulation of a communication system that will satisfy the following:

A 1 khz sinusoid with 1Vpp amplitude is to be transmitted digitally through a

channel corrupted by gaussian noise to a receiver that will restore the signal back

to original form. The input signal is first digitized using 8-bit PCM. The data for

each sample is then transmitted serially using Manchester encoding. The encoded

signal then modulates a carrier using 8-QAM before transmission through the

channel. The receiver side should demodulate, decode and convert data back to

analog form.

You can choose the carrier frequency to use as long as the communication occurs

in real-time.

File: comsystem.vsm

Lab Session 9:

Ping:

• Verifies IP-level connectivity to another TCP/IP computer by sending Internet

Control Message Protocol (ICMP) Echo Request messages.

• The receipt of corresponding Echo Reply messages are displayed, along with

round-trip times.

• Ping is the primary TCP/IP command used to troubleshoot connectivity,

reachability, and name resolution.

1. From the command prompt, type ping /? and press the <enter> key.

2. From the command prompt, type ping localhost then press the <enter> key. Get a

text capture of the command results.

What ip address does ping tell you?

[sample ping here]

Note: Pinging the localhost is a simple test to determine if TCP/IP is properly

configured on the local computer. If your computer does not respond, it may

mean that there is a configuration problem. Using a hostname instead of an ip

3. Ping 10.2.151.244. Capture the text output of the command.

What is the average round trip time reported by ping for the target host?

4. Repeat step 3 for www.dlsu.edu.ph.

Is this host ping-able?

If a host does not respond, does it mean that it is down? In the case of

www.dlsu.edu.ph, if it does not respond to ping, how do you distinguish between

it being not ping-able or it being down or unreachable (may be due to network

connectivity problems)?

5. Repeat step 3 for www.altavista.com.

Is this host ping-able? Why or why not?

6. Type ping -t localhost.

What makes this type of ping different from that of step 2?

Ipconfig:

• isplays all current TCP/IP network configuration values and refreshes Dynamic

Host Configuration Protocol (DHCP) and Domain Name System (DNS) settings.

• Used without parameters, ipconfig displays the IP address, subnet mask, and

default gateway for all adapters.

1. Type ipconfig from the command prompt and press <enter>. Capture the text

output.

[Sample ping output here.]

How many Ethernet adapters does your computer have? What are the ip address

of each of these adapters?

2. Type ipconfig /all and press <enter>.

What is the hostname of your computer? What are the physical address of the

adapters?

3. Take note the info from previous step then execute ipconfig /renew. Wait for the

command to finish (ie. wait for the command prompt to return). Then execute

ipconfig /all again.

Is there any difference between the results now and in step 2? If yes, what is

different? What is the significance of of ipconfig /renew?

Telnet 1

• Telnet allow you to connect to a remote computer and run commands on it. The

commands are native to the telnet server and the operating system of the server.

• The telnet commands allow you to communicate with a remote computer that is

using the Telnet protocol.

• You can run telnet without parameters in order to enter the telnet context,

indicated by the Telnet prompt (telnet>).

• Telnet can be used to check if certain TCP/IP services on a remote host are

available.

1. Type telnet server and press <enter> (alternatively, start->run->telnet, type open

server) then log in using

username: guest password: guest

What is the starting directory?

[sample run here.]

2. Type dir and press <enter>.

What are listed?

3. Create a directory (named using your surname and initials without spaces) inside

the starting directory then cd to it.

4. Execute a pwd command.

What is returned by this command?

5. Execute ipconfig /all.

What is the mac address of the first adapter of the telnet host server?

6. Type exit to log out of the server.

7. Telnet to tinlibb.dlsu.edu.ph. Capture the resulting window.

What is the service offered by this host?

8. Go to the Personal Loan Information section. Enter the required username and

password. Then capture the resulting window.

9. Press <CTRL-]> to exit the session.

10. Try telnetting to www.altavista.com.

Can you connect? Assuming that there is no problem in the internet/network

connection, identify two possible reasons why you cannot connect via telnet to the

site?

Telnet 2

Telnet can be used to check on the availability of TCP services. This can be done by

telnetting to the host at the appropriate service port (HTTP:80, FTP:21, POP3:110, etc.)

and determining if there is a valid response. [samples here]

1. From a command prompt, type telnet www.dlsu.edu.ph and press <enter>. Copy

the text of the result (should be html info) to a notepad file and save as

htmltest.htm.

Note: This checks if there is a Web service at the server.

Can you view the contents of the file properly if opened using internet explorer?

2. Type telnet server 21 and press <enter>.

Note: This checks if an ftp service is available.

What is the response of the server?

3. Type telnet mail.manila-psi.dlsu.edu.ph 110 and press <enter>.

What is the response of the server?

4. Check if there is an ftp and pop3 services at www.dlsu.edu.ph.

Are there such services available?

FTP:

• Transfers files to and from a computer running a File Transfer Protocol (FTP)

server service such as Internet Information Services.

1. From a command prompt, type ftp server and press <enter> (alternatively, start-

>run->ftp, type open server). Use the following authentication information:

username: guest password: guest

[sample ftp session here]

Capture the post-login window.

2. Type help on the ftp command-line then press <enter>.

What commands are available? [capture the list]

3. Type help get to find out what the get command does.

What does get do?

4. Execute cd <your-remote-directory>. Then type dir to verify that you are indeed

in your remote directory (this is the same as you created during the telnet session

earlier).

5. Execute lcd c:\commsim to place your local directory.

6. Execute binary to prepare for a binary (as opposed to text) file transfer

7. Execute put comm45.hlp to send the named file to the remote directory.

How long did it take to complete the transfer? What is the rate of transfer?

8. Execute dir to verify if the file was sent successfully. Capture the resulting

directory listing.

9. Execute lcd c:\temp followed by get comm45.hlp to retrieve the file from the

remote server then copy it to the c:\temp directory.

10. Using your Internet Explorer, retrieve the url: ftp://guest:guest@server/<your-

remote-directory>/comm45.hlp (This may not work on the server. If this is the

case, ignore this step)

Netstat:

• Displays active TCP connections, ports on which the computer is listening,

Ethernet statistics, the IP routing table, IPv4 statistics (for the IP, ICMP, TCP, and

UDP protocols), and IPv6 statistics (for the IPv6, ICMPv6, TCP over IPv6, and

UDP over IPv6 protocols).

• Used without parameters, netstat displays active TCP connections.

1. Connect to tinlibb.dlsu.edu.ph via telnet.

2. Connect to server using ftp.

3. From a dos/NT command prompt, execute netstat. Capture the complete text

output to your MS Word document.

What is the proto/local-address/foreign-address of the entries identified as

"established"?

4. Execute netstat.

Does this list the same items that you identified as "established" in the previous

step?

5. Execute netstat -p tcp.

What type of entries are listed?

6. Execute netstat -p udp.

What type of entries are listed?

Compula Manual

Documents

dc operating

commsimcommsimexestimators

analysis graph

spice analyses

execute ipconfig

audio power

amplitude

ms word document