-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
1 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
1 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
1 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Intel Sandy/Ivy Bridge Processor with DDRIII + Panther Point
PCHQ5WV1 M/B Schematics Document
REV:0.3
Compal Confidential
2012-02-03b
Nvidia N13P GS/GL
Model Name :Q5WV1/Q5WS1
File Name : LA-7912P
Compal Confidential
Compal Project Name :
Part Number Description
DA60000SV00 PCB 0N4 LA-7912P REV0 M/B
MB PCB
Part Number Description
DA60000SV00 PCB 0N4 LA-7912P REV0 M/B
MB PCBZZZ2
X76344BOL01
1G@ZZZ2
X76344BOL01
1G@ ZZZ3
X76344BOL02
2G@ZZZ3
X76344BOL02
2G@
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
2 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
2 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
2 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
USB port 10USB port 11100MHz
33MHz
100MHz
LS-7911P
100MHz1GB/s x4
DMI x4
100MHz
FDI x8
page 41
port 5 port 1
Sub-board
page 39
page 13
SPISATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)
RTC CKT.page 13
3.3V 24MHz
LAN(GbE) & Card ReaderBCM57785
page 35,36
CMOS Camera
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)
Dual Channel
2.7GT/s
Power On/Off CKT.
Touch Pad
LPC BUS
page 41
Processor
Int.KBD
page 40
BANK 0, 1, 2, 3
USB 2.0 conn x2
ALC271X/281X
DC/DC Interface CKT.
Sandy/Ivy Bridge
3.3V 48MHz
RJ45
page 39
Fan Control
Power Circuit DC/DC
page 40
204pin DDRIII-SO-DIMM X2
page 43,44
Intel
BIOS ROM
1.5V DDRIII 1066/1333
page 40
HDA Codec
Memory BUS(DDRIII)
PCH
HD Audio
page 42
page 4~10
Panther Point-M
page 11,12
page 40
ENE KB930/KB9012
page 36
page 38page 38 page 31
rPGA989
Intel
Bluetooth Conn
port 2
SATA CDROM Conn.
page 34
SPI ROM (4M)x1SPI ROM (1M)x1
page 41
page 46~59
USBx14
page 13~21
port 0
page 34
SATA HDDConn.
USB 2.0/B 2PortUSB Port1,2
Int. Speaker Phone Jack x 2
USB port 1,2 onUSB/B
989pin BGA
x16 Gen3(N13P-GS)x16 Gen2(N13P-GL)x8 Gen2(N13M-GS) PER
LANE100MHz
133MHz
LVDS Conn.page 31
CRT Conn.page 32
NvidiaN13P GS/GL N13M-GS
page22~30
PEG(DIS)
page 33
HDMI Conn.
CRT(UMA/OPTIMUS)LVDS(UMA/OPTIMUS)
TMDS(UMA/OPTIMUS)
USB 3.0
page 38
port 1
Card Reader Conn.
page 35,36
LS-7912P
page 41PWR/B
port 1
WLANmSATA(reserve)
page 34USB port 8
port 2
eDPpage31
USB3.0
USB 3.0 Fresco FL1009
USB3.0 Conn.
page 17
page 39
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
3 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
3 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
3 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
USB 2.0 USB 1.1 Port3 ExternalUSB Port
Camera
USB/B (Right Side)0123456789
10111213
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
EHCI1
EHCI2
USB Port Table
1101 0010b
ON OFF OFFBoard ID / SKU ID Table for AD channel
+0.75VS +0.75VP to +0.75VS switched power rail for DDR
terminator
+RTCVCC RTC power
+1.5VS
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH
& GPU
+3VS+5VALW
+3VALW +3VALW always on power rail
+VSB +VSBP to +VSB always on power rail for sequence control ON
ON*ONON
ONON BOARD ID Table
EC SM Bus1 addressDevice
OFF
DDR DIMM0 1001 000XbDDR DIMM2 1001 010Xb
+1.5V to +1.5VS switched power rail
+CPU_CORE
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re
Board ID Rb / Rd / Rf V min0123
08.2K +/- 5%
0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V
0.503 V0.819 V
0.538 V0.875 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.300 V
0 V 0 V
4567 NC
1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V
2.200 V3.300 V
2.341 V
1.185 V 1.264 V
Board ID01234567
PCB Revision
0.1
PCH SM Bus addressDeviceClock Generator
(9LVS3199AKLFT,RTM890N-631-VB-GRT)
Address
Address Address
Voltage Rails
VIN
B+
+1.05VS_VTT
Adapter power supply (19V)
AC or battery power rail for power circuit.Core voltage for
CPU
+1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU
ONOFF
ON
Note : ON* means that this power plane is ON only with AC power
available, otherwise it is OFF.
ON
ONON ON*
OFF
OFF
0.2
BTO Option TableBTO Item BOM Structure
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
ON ON*
ON OFF OFF
+3VALW_PCH+3V_LAN
+3VALW to +3VALW_PCH power rail for PCH (Short Jumper)+3VALW to
+3V_LAN power rail for LAN
ON ONON ON
S1
+5VALW_PCH
S3 S5
ONON
ON ON
OFF
N/A N/A N/A
N/AN/AN/A
Power Plane Description
EC SM Bus2 addressDevice
Smart Battery
OFFOFF
+1.5VP to +1.5V power rail for DDRIII ON ON OFF
0.3
0001 011X b
ON*
OFF
DIS@Dis with OPTIMUSBlue Tooth BT@
Mini Card 1(WLAN)
+1.5V
+1.05VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for
GPUON OFF OFF
+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCHON OFF
OFF
+VGA_CORE
ON OFF OFF
Core voltage for GPU+VGFX_CORE Core voltage for UMA graphic ON
OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON
OFF OFF
+3VALW_EC +3VALW always to KBC ON ON ON*
ON*+3VALW to +3VS power rail +5VALWP to +5VALW power rail +5VALW
to +5VALW_PCH power rail for PCH (Short resister)
+5VS +5VALW to +5VS switched power rail OFFON OFFON*
UMAO@UMA Only
+1.8VSDGPU +1.8VS to +1.8VSDGPU switched power rail for GPU ON
OFF OFF
Internal USB 3.0 PUSB3@
0.4
GS@N13P-GSN13P-GL GL@
Unpop
VRAMCONN@Connector@
X76@
Win8
Audio ALC281X271X@Win8@
Audio ALC271X281X@
PCH HM65 HM65@PCH HM76 HM76@
BlueTooth
USB/B (Right Side)
USB3.0 colay USB2.0 Conn
eDP eDP@
Internal USB 2.0 PUSB@USB 2.0 flag PUSB2@
N13P-GS & GL GSGL@N13M-GS GM@
4319IDBOL01SMT MB A7912 Q5WV1 HM77 QC UMA 3
4319IDBOL02SMT MB A7912 Q5WV1 HM77 QC 13PGL1G 3
4319IDBOL03SMT MB A7912 Q5WV1 HM77 QC 13PGL2G 3
4319IDBOL04SMT MB A7912 Q5WV1 HM77 QC 13PGS1G 3
4319IDBOL05SMT MB A7912 Q5WV1 HM77 QC 13PGS2G 3
4319IDBOL06SMT MB A7912 Q5WV1 HM77 DC UMA 2
4319IDBOL07SMT MB A7912 Q5WV1 HM77 DC UMA 3
4319IDBOL08SMT MB A7912 Q5WV1 HM77 DC 13PGL1G 2
4319IDBOL09SMT MB A7912 Q5WV1 HM77 DC 13PGL1G 3
4319IDBOL10SMT MB A7912 Q5WV1 HM77 DC 13PGL2G 2
4319IDBOL11SMT MB A7912 Q5WV1 HM77 DC 13PGL2G 3
4319IDBOL12SMT MB A7912 Q5WV1 HM77 DC 13MGS1G 2
4319IDBOL13SMT MB A7912 Q5WV1 HM77 DC 13MGS1G 3
4319IDBOL14SMT MB A7912 Q5WV1 HM77 DC 13PGS2G 3
support AC functionno AC function
AC@NOAC@
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EDP_COMP
PEG_COMP
PEG_GTX_C_HRX_N0 PEG_GTX_HRX_N0PEG_GTX_C_HRX_N1
PEG_GTX_HRX_N1PEG_GTX_C_HRX_N2 PEG_GTX_HRX_N2PEG_GTX_C_HRX_N3
PEG_GTX_HRX_N3PEG_GTX_C_HRX_N4 PEG_GTX_HRX_N4PEG_GTX_C_HRX_N5
PEG_GTX_HRX_N5PEG_GTX_C_HRX_N6 PEG_GTX_HRX_N6PEG_GTX_C_HRX_N7
PEG_GTX_HRX_N7PEG_GTX_C_HRX_N8 PEG_GTX_HRX_N8PEG_GTX_C_HRX_N9
PEG_GTX_HRX_N9PEG_GTX_C_HRX_N10 PEG_GTX_HRX_N10PEG_GTX_C_HRX_N11
PEG_GTX_HRX_N11PEG_GTX_C_HRX_N12 PEG_GTX_HRX_N12PEG_GTX_C_HRX_N13
PEG_GTX_HRX_N13PEG_GTX_C_HRX_N14 PEG_GTX_HRX_N14PEG_GTX_C_HRX_N15
PEG_GTX_HRX_N15
PEG_GTX_HRX_P0PEG_GTX_C_HRX_P0PEG_GTX_HRX_P1PEG_GTX_C_HRX_P1PEG_GTX_HRX_P2PEG_GTX_C_HRX_P2PEG_GTX_HRX_P3PEG_GTX_C_HRX_P3PEG_GTX_HRX_P4PEG_GTX_C_HRX_P4PEG_GTX_HRX_P5PEG_GTX_C_HRX_P5PEG_GTX_HRX_P6PEG_GTX_C_HRX_P6PEG_GTX_HRX_P7PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_P8 PEG_GTX_HRX_P8PEG_GTX_C_HRX_P9
PEG_GTX_HRX_P9PEG_GTX_C_HRX_P10 PEG_GTX_HRX_P10PEG_GTX_C_HRX_P11
PEG_GTX_HRX_P11PEG_GTX_C_HRX_P12 PEG_GTX_HRX_P12PEG_GTX_C_HRX_P13
PEG_GTX_HRX_P13PEG_GTX_C_HRX_P14 PEG_GTX_HRX_P14
PEG_GTX_HRX_P15PEG_GTX_C_HRX_P15
PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0PEG_HTX_GRX_N1
PEG_HTX_C_GRX_N1PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2PEG_HTX_GRX_N3
PEG_HTX_C_GRX_N3PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4PEG_HTX_GRX_N5
PEG_HTX_C_GRX_N5PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6PEG_HTX_GRX_N7
PEG_HTX_C_GRX_N7PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8PEG_HTX_GRX_N9
PEG_HTX_C_GRX_N9PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10PEG_HTX_GRX_N11
PEG_HTX_C_GRX_N11PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12PEG_HTX_GRX_N13
PEG_HTX_C_GRX_N13PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14PEG_HTX_GRX_N15
PEG_HTX_C_GRX_N15
PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0PEG_HTX_GRX_P1
PEG_HTX_C_GRX_P1PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2PEG_HTX_GRX_P3
PEG_HTX_C_GRX_P3PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4PEG_HTX_GRX_P5
PEG_HTX_C_GRX_P5PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6PEG_HTX_GRX_P7
PEG_HTX_C_GRX_P7PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8PEG_HTX_GRX_P9
PEG_HTX_C_GRX_P9PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10PEG_HTX_GRX_P11
PEG_HTX_C_GRX_P11PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12PEG_HTX_GRX_P13
PEG_HTX_C_GRX_P13PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14PEG_HTX_GRX_P15
PEG_HTX_C_GRX_P15
EDP_HPD#
DMI_CTX_PRX_P0
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_P3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC0FDI_FSYNC1
FDI_INT
FDI_LSYNC0FDI_LSYNC1
PEG_GTX_HRX_N[0..15]
PEG_HTX_C_GRX_P[0..15] PEG_HTX_C_GRX_N[0..15]
PEG_GTX_HRX_P[0..15]
EDP_HPD#
EDP_AUXPEDP_AUXN
EDP_TXP0EDP_TXP1
EDP_TXN0EDP_TXN1
+1.05VS_VTT
+1.05VS_VTT
+1.05VS_VTT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
4 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
4 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
4 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
Typ- suggest 220nF. The change in AC capacitorvalue from 100nF
to 220nF is to enablecompatibility with future platforms having
PCIEGen3 (8GT/s)
eDP_COMPIO and ICOMPO signals shouldbe shorted near balls,Trace
Width for EDP_COMPIO=4mils,EDP_ICOMPO=12mils,and both length less
than 500 mils...should not be left floating,even if disable eDP
function...
PEG_ICOMPI and PEG_RCOMPO signals should beshorted and
routed,max length = 500 mils,trace width=4mils PEG_ICOMPO signals
should be routed with - maxlength = 500 mils,trace
width=12milsspacing =15mils
Add eDP circuit
C533 0.22U_0402_10V6KGSGL@C533 0.22U_0402_10V6KGSGL@1 2
C93 0.22U_0402_10V6KDIS@C93 0.22U_0402_10V6KDIS@1 2
C548 0.22U_0402_10V6KDIS@C548 0.22U_0402_10V6KDIS@1 2
C544 0.22U_0402_10V6KGSGL@C544 0.22U_0402_10V6KGSGL@1 2
C529 0.22U_0402_10V6KGSGL@C529 0.22U_0402_10V6KGSGL@1 2
C560 0.22U_0402_10V6KDIS@C560 0.22U_0402_10V6KDIS@1 2
C550 0.22U_0402_10V6KDIS@C550 0.22U_0402_10V6KDIS@1 2
C53 0.22U_0402_10V6KGSGL@C53 0.22U_0402_10V6KGSGL@1 2
C539 0.22U_0402_10V6KGSGL@C539 0.22U_0402_10V6KGSGL@1 2
C552 0.22U_0402_10V6KDIS@C552 0.22U_0402_10V6KDIS@1 2
C553 0.22U_0402_10V6KDIS@C553 0.22U_0402_10V6KDIS@1 2
C520 0.22U_0402_10V6KGSGL@C520 0.22U_0402_10V6KGSGL@1 2
C547 0.22U_0402_10V6KDIS@C547 0.22U_0402_10V6KDIS@1 2
R8091K_0402_5%EDP@R8091K_0402_5%EDP@
12
R14524.9_0402_1%R14524.9_0402_1%
12 C558 0.22U_0402_10V6KDIS@C558 0.22U_0402_10V6KDIS@1 2
C46 0.22U_0402_10V6KGSGL@C46 0.22U_0402_10V6KGSGL@1 2
C546 0.22U_0402_10V6KDIS@C546 0.22U_0402_10V6KDIS@1 2
C536 0.22U_0402_10V6KGSGL@C536 0.22U_0402_10V6KGSGL@1 2
C125 0.22U_0402_10V6KDIS@C125 0.22U_0402_10V6KDIS@1 2
C100 0.22U_0402_10V6KDIS@C100 0.22U_0402_10V6KDIS@1 2
C113 0.22U_0402_10V6KDIS@C113 0.22U_0402_10V6KDIS@1 2
C515 0.22U_0402_10V6KGSGL@C515 0.22U_0402_10V6KGSGL@1 2
C60 0.22U_0402_10V6KGSGL@C60 0.22U_0402_10V6KGSGL@1 2
C557 0.22U_0402_10V6KDIS@C557 0.22U_0402_10V6KDIS@1 2
C71 0.22U_0402_10V6KGSGL@C71 0.22U_0402_10V6KGSGL@1 2
C561 0.22U_0402_10V6KDIS@C561 0.22U_0402_10V6KDIS@1 2C559
0.22U_0402_10V6KDIS@C559 0.22U_0402_10V6KDIS@1 2
C81 0.22U_0402_10V6KGSGL@C81 0.22U_0402_10V6KGSGL@1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2013620-2_IVY BRIDGECONN@
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2013620-2_IVY BRIDGECONN@
DMI_RX#[0]B27DMI_RX#[1]B25DMI_RX#[2]A25DMI_RX#[3]B24
DMI_RX[0]B28DMI_RX[1]B26DMI_RX[2]A24DMI_RX[3]B23
DMI_TX#[0]G21DMI_TX#[1]E22DMI_TX#[2]F21DMI_TX#[3]D21
DMI_TX[0]G22DMI_TX[1]D22
DMI_TX[3]C21DMI_TX[2]F20
FDI0_TX#[0]A21FDI0_TX#[1]H19FDI0_TX#[2]E19FDI0_TX#[3]F18FDI1_TX#[0]B21FDI1_TX#[1]C20FDI1_TX#[2]D18FDI1_TX#[3]E17
FDI0_TX[0]A22FDI0_TX[1]G19FDI0_TX[2]E20FDI0_TX[3]G18FDI1_TX[0]B20FDI1_TX[1]C19FDI1_TX[2]D19FDI1_TX[3]F17
FDI0_FSYNCJ18FDI1_FSYNCJ17
FDI_INTH20
FDI0_LSYNCJ19FDI1_LSYNCH17
PEG_ICOMPI J22PEG_ICOMPO J21
PEG_RCOMPO H22
PEG_RX#[0] K33PEG_RX#[1] M35PEG_RX#[2] L34PEG_RX#[3]
J35PEG_RX#[4] J32PEG_RX#[5] H34PEG_RX#[6] H31PEG_RX#[7]
G33PEG_RX#[8] G30PEG_RX#[9] F35
PEG_RX#[10] E34PEG_RX#[11] E32PEG_RX#[12] D33PEG_RX#[13]
D31PEG_RX#[14] B33PEG_RX#[15] C32
PEG_RX[0] J33PEG_RX[1] L35PEG_RX[2] K34PEG_RX[3] H35PEG_RX[4]
H32PEG_RX[5] G34PEG_RX[6] G31PEG_RX[7] F33PEG_RX[8] F30PEG_RX[9]
E35
PEG_RX[10] E33PEG_RX[11] F32PEG_RX[12] D34PEG_RX[13]
E31PEG_RX[14] C33PEG_RX[15] B32
PEG_TX#[0] M29PEG_TX#[1] M32PEG_TX#[2] M31PEG_TX#[3]
L32PEG_TX#[4] L29PEG_TX#[5] K31PEG_TX#[6] K28PEG_TX#[7]
J30PEG_TX#[8] J28PEG_TX#[9] H29
PEG_TX#[10] G27PEG_TX#[11] E29PEG_TX#[12] F27PEG_TX#[13]
D28PEG_TX#[14] F26PEG_TX#[15] E25
PEG_TX[0] M28PEG_TX[1] M33PEG_TX[2] M30PEG_TX[3] L31PEG_TX[4]
L28PEG_TX[5] K30PEG_TX[6] K27PEG_TX[7] J29PEG_TX[8] J27PEG_TX[9]
H28
PEG_TX[10] G28PEG_TX[11] E28PEG_TX[12] F28PEG_TX[13]
D27PEG_TX[14] E26PEG_TX[15] D25
eDP_AUXC15eDP_AUX#D15
eDP_TX[0]C17eDP_TX[1]F16eDP_TX[2]C16eDP_TX[3]G15
eDP_TX#[0]C18eDP_TX#[1]E16eDP_TX#[2]D16eDP_TX#[3]F15
eDP_COMPIOA18
eDP_HPD#B16eDP_ICOMPOA17
C542 0.22U_0402_10V6KGSGL@C542 0.22U_0402_10V6KGSGL@1 2
C516 0.22U_0402_10V6KGSGL@C516 0.22U_0402_10V6KGSGL@1 2
C534 0.22U_0402_10V6KGSGL@C534 0.22U_0402_10V6KGSGL@1 2
C51 0.22U_0402_10V6KGSGL@C51 0.22U_0402_10V6KGSGL@1 2
C144 0.22U_0402_10V6KDIS@C144 0.22U_0402_10V6KDIS@1 2C129
0.22U_0402_10V6KDIS@C129 0.22U_0402_10V6KDIS@1 2
C555 0.22U_0402_10V6KDIS@C555 0.22U_0402_10V6KDIS@1 2
C75 0.22U_0402_10V6KGSGL@C75 0.22U_0402_10V6KGSGL@1 2
C545 0.22U_0402_10V6KGSGL@C545 0.22U_0402_10V6KGSGL@1 2
C138 0.22U_0402_10V6KDIS@C138 0.22U_0402_10V6KDIS@1 2
C68 0.22U_0402_10V6KGSGL@C68 0.22U_0402_10V6KGSGL@1 2
C102 0.22U_0402_10V6KDIS@C102 0.22U_0402_10V6KDIS@1 2
C66 0.22U_0402_10V6KGSGL@C66 0.22U_0402_10V6KGSGL@1 2
C528 0.22U_0402_10V6KGSGL@C528 0.22U_0402_10V6KGSGL@1 2
C111 0.22U_0402_10V6KDIS@C111 0.22U_0402_10V6KDIS@1 2
C52 0.22U_0402_10V6KGSGL@C52 0.22U_0402_10V6KGSGL@1 2
C92 0.22U_0402_10V6KDIS@C92 0.22U_0402_10V6KDIS@1 2
C538 0.22U_0402_10V6KGSGL@C538 0.22U_0402_10V6KGSGL@1 2
C541 0.22U_0402_10V6KGSGL@C541 0.22U_0402_10V6KGSGL@1 2
C135 0.22U_0402_10V6KDIS@C135 0.22U_0402_10V6KDIS@1 2
C82 0.22U_0402_10V6KGSGL@C82 0.22U_0402_10V6KGSGL@1 2
C50 0.22U_0402_10V6KGSGL@C50 0.22U_0402_10V6KGSGL@1 2
C119 0.22U_0402_10V6KDIS@C119 0.22U_0402_10V6KDIS@1 2
C47 0.22U_0402_10V6KGSGL@C47 0.22U_0402_10V6KGSGL@1 2
C549 0.22U_0402_10V6KDIS@C549 0.22U_0402_10V6KDIS@1 2
C56 0.22U_0402_10V6KGSGL@C56 0.22U_0402_10V6KGSGL@1 2
C556 0.22U_0402_10V6KDIS@C556 0.22U_0402_10V6KDIS@1 2
C49 0.22U_0402_10V6KGSGL@C49 0.22U_0402_10V6KGSGL@1 2
C551 0.22U_0402_10V6KDIS@C551 0.22U_0402_10V6KDIS@1 2
C89 0.22U_0402_10V6KDIS@C89 0.22U_0402_10V6KDIS@1 2
R51724.9_0402_1%
R51724.9_0402_1%
12
C105 0.22U_0402_10V6KDIS@C105 0.22U_0402_10V6KDIS@1 2
C543 0.22U_0402_10V6KGSGL@C543 0.22U_0402_10V6KGSGL@1 2
C554 0.22U_0402_10V6KDIS@C554 0.22U_0402_10V6KDIS@1 2
C117 0.22U_0402_10V6KDIS@C117 0.22U_0402_10V6KDIS@1 2C106
0.22U_0402_10V6KDIS@C106 0.22U_0402_10V6KDIS@1 2
C540 0.22U_0402_10V6KGSGL@C540 0.22U_0402_10V6KGSGL@1 2
C86 0.22U_0402_10V6KGSGL@C86 0.22U_0402_10V6KGSGL@1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CATERR#
CLK_CPU_DMI#CLK_CPU_DMI
H_THRMTRIP#
H_PROCHOT#_R
H_PM_SYNC
PM_DRAM_PWRGD_R
BUF_CPU_RST#
SM_RCOMP1SM_RCOMP2
SM_RCOMP0
SM_DRAMRST#H_PECI
H_PROCHOT#
BUFO_CPU_RST#PLT_RST#
H_CPUPWRGD
XDP_DBRESET#
TCKTMSTRST#
TDITDO
CLK_CPU_DPLLCLK_CPU_DPLL# CLK_CPU_DPLL
CLK_CPU_DPLL#
PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF
BUF_CPU_RST#BUF_CPU_RST#
H_PECI
H_SNB_IVB#
H_PM_SYNC
H_THRMTRIP#
H_CPUPWRGD
H_PROCHOT#
SM_DRAMRST#
CLK_CPU_DMI# CLK_CPU_DMI
PLT_RST#
XDP_DBRESET#
CLK_CPU_DPLL CLK_CPU_DPLL#
PM_DRAM_PWRGD
SYS_PWROK
+1.05VS_VTT
+3VS
+1.05VS_VTT
+3VS
+1.05VS_VTT
+3VALW+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
5 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
5 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
5 63Friday, February 10, 2012
2011/06/02 2012/06/02
DDR3 Compensation Signals
Processor Pullups
Compal Electronics, Inc.
SNB_IVB# had changed the name to PROC_SELCT#,function for future
platform,connect to the DF_TVS strap on the PCH
SM_DRAMPWROK:DRAM power ok
UNCOREPWRGOOD:非CORE外的電OK
Buffered reset to CPU
RESET#:都ok後請CPU做reset
For LVDS
If use External Graphic or use integrated without
eDPDPLL_REF_SSCLK PD 1K_5% to GNDDPLL_REF_SSCLK# PH 1K_5% to
+1.05VS_VTT
For eDP
R04 modify
R231 140_0402_1%R231 140_0402_1%12
T6 PAD@
T6 PAD@
R9075_0402_1%R9075_0402_1%
12
R401K_0402_5%R401K_0402_5%
12
C20900.1U_0402_16V4Z
C20900.1U_0402_16V4Z
1
2
C1620.1U_0402_16V4ZC1620.1U_0402_16V4Z
1
2
R880_0402_5%
@R880_0402_5%
@
12
R20339_0402_1%
@
R20339_0402_1%
@
12
R516 1K_0402_5%LVDS@R516 1K_0402_5%LVDS@ 12
R204 130_0402_5%R204 130_0402_5%1 2
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2013620-2_IVY BRIDGECONN@
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2013620-2_IVY BRIDGECONN@
SM_RCOMP[1] A5SM_RCOMP[2] A4
SM_DRAMRST# R8
SM_RCOMP[0] AK1
BCLK# A27BCLK A28
DPLL_REF_CLK# A15DPLL_REF_CLK A16
CATERR#AL33
PECIAN33
PROCHOT#AL32
THERMTRIP#AN32
SM_DRAMPWROKV8
RESET#AR33
PRDY# AP29PREQ# AP27
TCK AR26TMS AR27
TRST# AP30
TDI AR28TDO AP26
DBR# AL35
BPM#[0] AT28BPM#[1] AR29BPM#[2] AR30BPM#[3] AT30BPM#[4]
AP32BPM#[5] AR31BPM#[6] AT31BPM#[7] AR32
PM_SYNCAM34
SKTOCC#AN34
PROC_SELECT#C26
UNCOREPWRGOODAP33
R518 1K_0402_5%LVDS@R518 1K_0402_5%LVDS@ 12
R205
200_0402_1%
R205
200_0402_1%
12
C3070.1U_0402_16V4Z
C3070.1U_0402_16V4Z
1
2
R571 200_0402_1%R571 200_0402_1%12
R84 10K_0402_5%R84 10K_0402_5%12T70PAD @T70PAD @
U7
SN74LVC1G07DCKR_SC70-5
U7
SN74LVC1G07DCKR_SC70-5
NC1
A2 G3
Y 4
P5
T69PAD @T69PAD @
R566 25.5_0402_1%R566 25.5_0402_1%12
T68PAD @T68PAD @
R8743_0402_1%
R8743_0402_1%1 2
T67PAD @T67PAD @
U1174AHC1G09GW_TSSOP5U1174AHC1G09GW_TSSOP5
B1
A2 G3
O 4
P5
R91 62_0402_5%R91 62_0402_5%12 R9256_0402_5%
R9256_0402_5%
1 2
T66PAD @T66PAD @
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_D31
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_MA15
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5DDR_A_MA4
DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA9
DDR_A_MA7DDR_A_MA6
DDR_A_MA12DDR_A_MA13
DDR_A_MA8
DDR_A_MA11DDR_A_MA10
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
DDR_B_MA15
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS6
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14
DIMM_DRAMRST#_RSM_DRAMRST#
DDR_A_D[0..63]
DDR_A_BS0DDR_A_BS1DDR_A_BS2
DDR_A_WE#DDR_A_RAS#DDR_A_CAS#
SA_CLK_DDR0 SA_CLK_DDR#0 DDRA_CKE0_DIMMA
SA_CLK_DDR1 SA_CLK_DDR#1 DDRA_CKE1_DIMMA
DDRA_CS0_DIMMA# DDRA_CS1_DIMMA#
SA_ODT0 SA_ODT1
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
DDR_B_BS0DDR_B_BS1DDR_B_BS2
DDR_B_D[0..63]
DDR_B_WE#DDR_B_RAS#DDR_B_CAS#
DDRB_CS1_DIMMB#
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
SB_CLK_DDR0 SB_CLK_DDR#0 DDRB_CKE0_DIMMB
SB_CLK_DDR1
DDRB_CS0_DIMMB#
SB_ODT1 SB_ODT0
DDRB_CKE1_DIMMB SB_CLK_DDR#1
DDR_A_MA[0..15] DDR_B_MA[0..15]
DIMM_DRAMRST# SM_DRAMRST#
RST_GATE
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
6 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
6 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
6 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
CPU通知DIMM做reset
S0RST_GATE hgih ,MOS ONSM_DRAMRST# HIGH,DIMM_DRAMRST# HIGHDimm
not resetS3RST_GATE Low ,MOS OFFSM_DRAMRST# lo,DIMM_DRAMRST#
HIGHDimm not resetS4,5RST_GATE Low ,MOS OFFSM_DRAMRST#
lo,DIMM_DRAMRST# lowDimm reset
Follow CRB1.0
R02 modify for ESD
R1840_0402_5%@R1840_0402_5%@
1 2
G
DS
Q12S TR SSM3K7002F 1N SC59-3G
DS
Q12S TR SSM3K7002F 1N SC59-3
2
13
R1551K_0402_5%R1551K_0402_5%
1 2
R1864.99K_0402_1%
R1864.99K_0402_1%
12
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2013620-2_IVY BRIDGECONN@
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2013620-2_IVY BRIDGECONN@
SB_BS[0]AA9SB_BS[1]AA7SB_BS[2]R6
SB_CAS#AA10SB_RAS#AB8SB_WE#AB9
SB_CLK[0] AE2
SB_CLK[1] AE1
SB_CLK#[0] AD2
SB_CLK#[1] AD1
SB_CKE[0] R9
SB_CKE[1] R10
SB_ODT[0] AE4SB_ODT[1] AD4
SB_DQS[4] AN6
SB_DQS#[4] AN5
SB_DQS[5] AP8
SB_DQS#[5] AP9
SB_DQS[6] AK11
SB_DQS#[6] AK12
SB_DQS[7] AP14
SB_DQS#[7] AP15
SB_DQS[0] C7
SB_DQS#[0] D7
SB_DQS[1] G3
SB_DQS#[1] F3
SB_DQS[2] J6
SB_DQS#[2] K6
SB_DQS[3] M3
SB_DQS#[3] N3
SB_MA[0] AA8SB_MA[1] T7SB_MA[2] R7SB_MA[3] T6SB_MA[4] T2SB_MA[5]
T4SB_MA[6] T3SB_MA[7] R2SB_MA[8] T5SB_MA[9] R3
SB_MA[10] AB7SB_MA[11] R1SB_MA[12] T1SB_MA[13] AB10SB_MA[14]
R5SB_MA[15] R4
SB_DQ[0]C9SB_DQ[1]A7SB_DQ[2]D10SB_DQ[3]C8SB_DQ[4]A9SB_DQ[5]A8SB_DQ[6]D9SB_DQ[7]D8SB_DQ[8]G4SB_DQ[9]F4SB_DQ[10]F1SB_DQ[11]G1SB_DQ[12]G5SB_DQ[13]F5SB_DQ[14]F2SB_DQ[15]G2SB_DQ[16]J7SB_DQ[17]J8SB_DQ[18]K10SB_DQ[19]K9SB_DQ[20]J9SB_DQ[21]J10SB_DQ[22]K8SB_DQ[23]K7SB_DQ[24]M5SB_DQ[25]N4SB_DQ[26]N2SB_DQ[27]N1SB_DQ[28]M4SB_DQ[29]N5SB_DQ[30]M2SB_DQ[31]M1SB_DQ[32]AM5SB_DQ[33]AM6SB_DQ[34]AR3SB_DQ[35]AP3SB_DQ[36]AN3SB_DQ[37]AN2SB_DQ[38]AN1SB_DQ[39]AP2SB_DQ[40]AP5SB_DQ[41]AN9SB_DQ[42]AT5SB_DQ[43]AT6SB_DQ[44]AP6SB_DQ[45]AN8SB_DQ[46]AR6SB_DQ[47]AR5SB_DQ[48]AR9SB_DQ[49]AJ11SB_DQ[50]AT8SB_DQ[51]AT9SB_DQ[52]AH11SB_DQ[53]AR8SB_DQ[54]AJ12SB_DQ[55]AH12SB_DQ[56]AT11SB_DQ[57]AN14SB_DQ[58]AR14SB_DQ[59]AT14SB_DQ[60]AT12SB_DQ[61]AN15SB_DQ[62]AR15SB_DQ[63]AT15
RSVD_TP[11] AB2RSVD_TP[12] AA2RSVD_TP[13] T9
RSVD_TP[14] AA1RSVD_TP[15] AB1RSVD_TP[16] T10
SB_CS#[0] AD3SB_CS#[1] AE3
RSVD_TP[17] AD6RSVD_TP[18] AE6
RSVD_TP[19] AD5RSVD_TP[20] AE5
R2171K_0402_5%
R2171K_0402_5%
12
C20650.1U_0402_16V4Z
C20650.1U_0402_16V4Z
1
2
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2013620-2_IVY BRIDGECONN@
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2013620-2_IVY BRIDGECONN@
SA_BS[0]AE10SA_BS[1]AF10SA_BS[2]V6
SA_CAS#AE8SA_RAS#AD9SA_WE#AF9
SA_CLK[0] AB6
SA_CLK[1] AA5
SA_CLK#[0] AA6
SA_CLK#[1] AB5
SA_CKE[0] V9
SA_CKE[1] V10
SA_CS#[0] AK3SA_CS#[1] AL3
SA_ODT[0] AH3SA_ODT[1] AG3
SA_DQS[0] D4
SA_DQS#[0] C4
SA_DQS[1] F6
SA_DQS#[1] G6
SA_DQS[2] K3
SA_DQS#[2] J3
SA_DQS[3] N6
SA_DQS#[3] M6
SA_DQS[4] AL5
SA_DQS#[4] AL6
SA_DQS[5] AM9
SA_DQS#[5] AM8
SA_DQS[6] AR11
SA_DQS#[6] AR12
SA_DQS[7] AM14
SA_DQS#[7] AM15
SA_MA[0] AD10SA_MA[1] W1SA_MA[2] W2SA_MA[3] W7SA_MA[4]
V3SA_MA[5] V2SA_MA[6] W3SA_MA[7] W6SA_MA[8] V1SA_MA[9] W5
SA_MA[10] AD8SA_MA[11] V4SA_MA[12] W4SA_MA[13] AF8SA_MA[14]
V5SA_MA[15] V7
SA_DQ[0]C5SA_DQ[1]D5SA_DQ[2]D3SA_DQ[3]D2SA_DQ[4]D6SA_DQ[5]C6SA_DQ[6]C2SA_DQ[7]C3SA_DQ[8]F10SA_DQ[9]F8SA_DQ[10]G10SA_DQ[11]G9SA_DQ[12]F9SA_DQ[13]F7SA_DQ[14]G8SA_DQ[15]G7SA_DQ[16]K4SA_DQ[17]K5SA_DQ[18]K1SA_DQ[19]J1SA_DQ[20]J5SA_DQ[21]J4SA_DQ[22]J2SA_DQ[23]K2SA_DQ[24]M8SA_DQ[25]N10SA_DQ[26]N8SA_DQ[27]N7SA_DQ[28]M10SA_DQ[29]M9SA_DQ[30]N9SA_DQ[31]M7SA_DQ[32]AG6SA_DQ[33]AG5SA_DQ[34]AK6SA_DQ[35]AK5SA_DQ[36]AH5SA_DQ[37]AH6SA_DQ[38]AJ5SA_DQ[39]AJ6SA_DQ[40]AJ8SA_DQ[41]AK8SA_DQ[42]AJ9SA_DQ[43]AK9SA_DQ[44]AH8SA_DQ[45]AH9SA_DQ[46]AL9SA_DQ[47]AL8SA_DQ[48]AP11SA_DQ[49]AN11SA_DQ[50]AL12SA_DQ[51]AM12SA_DQ[52]AM11SA_DQ[53]AL11SA_DQ[54]AP12SA_DQ[55]AN12SA_DQ[56]AJ14SA_DQ[57]AH14SA_DQ[58]AL15SA_DQ[59]AK15SA_DQ[60]AL14SA_DQ[61]AK14SA_DQ[62]AJ15SA_DQ[63]AH15
RSVD_TP[1] AB4RSVD_TP[2] AA4
RSVD_TP[4] AB3RSVD_TP[5] AA3
RSVD_TP[3] W9
RSVD_TP[6] W10
RSVD_TP[7] AG1RSVD_TP[8] AH1
RSVD_TP[9] AG2RSVD_TP[10] AH2
C2930.047U_0402_16V7KC2930.047U_0402_16V7K
1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSAXG_VAL_SENSE
CFG4
CFG6
CFG5
CFG2
CFG7
VCC_VAL_SENSE
CFG2
CFG0
CFG4CFG5CFG6CFG7
VAXG_VAL_SENSE
VSS_VAL_SENSE
+CPU_CORE +VGFX_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
7 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
7 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
7 63Friday, February 10, 2012
2011/06/02 2012/06/02
AH27 change to VCC_DIE_SENSE
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately following xxRESETBde
assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device isconnected to the
Embedded Display Port
1 : Disabled; No Physical Display Portattached to Embedded
Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function 2
enabled)00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1: Normal Operation; Lane # definition matchessocket pin map
definition
*
*
*
AH26Sandy Ivy
VSS_DIE_SENSEGND
RSVD54 and RSVD55 had changed toBCLK_ITP and BCLK_ITP#
R1021K_0402_5%@R1021K_0402_5%@
12
R1081K_0402_5%@
R1081K_0402_5%@
12
R1091K_0402_5%
EDP@
R1091K_0402_5%
EDP@12
R1071K_0402_5%
GM@R107
1K_0402_5%
GM@ 12
T74PAD@ T74PAD@
R1121K_0402_5%R1121K_0402_5%
12
T8 PAD@
T8 PAD@
R810
49.9_0402_1%@
R810
49.9_0402_1%@
12
R812
49.9_0402_1%@
R812
49.9_0402_1%@
12
R813
49.9_0402_1%@R813
49.9_0402_1%@
12
RESERVED
CFG
JCPU1E
TYCO_2013620-2_IVY BRIDGECONN@
RESERVED
CFG
JCPU1E
TYCO_2013620-2_IVY BRIDGECONN@
CFG[0]AK28CFG[1]AK29CFG[2]AL26CFG[3]AL27CFG[4]AK26CFG[5]AL29CFG[6]AL30CFG[7]AM31CFG[8]AM32CFG[9]AM30CFG[10]AM28CFG[11]AM26CFG[12]AN28CFG[13]AN31CFG[14]AN26CFG[15]AM27CFG[16]AK31CFG[17]AN29
RSVD34 AM33RSVD35 AJ27
RSVD38 J16
RSVD_NCTF2 AT34
RSVD39 H16RSVD40 G16
RSVD_NCTF1 AR35
RSVD_NCTF3 AT33
RSVD_NCTF5 AR34
RSVD_NCTF11 AT2RSVD_NCTF12 AT1RSVD_NCTF13 AR1
RSVD_NCTF6 B34RSVD_NCTF7 A33RSVD_NCTF8 A34RSVD_NCTF9 B35
RSVD_NCTF10 C35
RSVD51 AJ32RSVD52 AK32
RSVD27J15
RSVD16C30RSVD15D23
RSVD17A31RSVD18B30
RSVD20D30RSVD19B29
RSVD22A30RSVD21B31
RSVD23C29
RSVD37 T8
RSVD8F25RSVD9F24
RSVD11D24RSVD12G25RSVD13G24RSVD14E23
RSVD32 W8
RSVD33 AT26
RSVD_NCTF4 AP35
RSVD10F23
RSVD5AJ26
VAXG_VAL_SENSEAJ31VSSAXG_VAL_SENSEAH31VCC_VAL_SENSEAJ33VSS_VAL_SENSEAH33
KEY B1
VCC_DIE_SENSE AH27
BCLK_ITP AN35BCLK_ITP# AM35
VSS_DIE_SENSE AH26
RSVD31 AK2RSVD30 AE7RSVD29 AG7RSVD28 L7
RSVD24J20RSVD25B18
T7PAD@ T7PAD@
R811
49.9_0402_1%@R811
49.9_0402_1%@
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSIO_SENSE
H_CPU_SVIDALRT#H_CPU_SVIDCLK
VSSSENSE_RVCCSENSE_R
H_CPU_SVIDDAT
VCCIO_SENSE
VCCSENSE VSSSENSE
VR_SVID_ALRT# VR_SVID_CLK VR_SVID_DAT
VSSIO_SENSE
+1.05VS_VTT+1.05VS_VTT
+CPU_CORE
+1.05VS_VTT
+CPU_CORE
+1.05VS_VTT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
8 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
8 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
8 63Friday, February 10, 2012
2011/06/02 2012/06/02
8.5A
QC 53ADC 53A
SV type CPU
Should change to connect formpower cirucit & layout
differentialwith VCCIO_SENSE.
Place the PUresistors close to CPU
VSSIO_SENSE change to VSS_SENSE_VCCIO
R910 10_0402_5%R910 10_0402_5%1 2
R44775_0402_5%R44775_0402_5%
12
R446 0_0402_5%R446 0_0402_5%1 2
R442100_0402_1%R442100_0402_1%
12
R450130_0402_1%
R450130_0402_1%
12
R445100_0402_1%R445100_0402_1%
12
R443 0_0402_5%R443 0_0402_5%1 2R444 0_0402_5%R444 0_0402_5%1
2
R44843_0402_1%
R44843_0402_1%1 2
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPU1F
TYCO_2013620-2_IVY BRIDGE CONN@
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPU1F
TYCO_2013620-2_IVY BRIDGE CONN@
VCC_SENSE AJ35VSS_SENSE AJ34
VIDALERT# AJ29VIDSCLK AJ30VIDSOUT AJ28
VSS_SENSE_VCCIO A10
VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26
VCCIO1 AH13
VCCIO12 J11
VCCIO18 G12VCCIO19 F14VCCIO20 F13VCCIO21 F12VCCIO22 F11VCCIO23
E14VCCIO24 E12
VCCIO2 AH10VCCIO3 AG10VCCIO4 AC10VCCIO5 Y10VCCIO6 U10VCCIO7
P10VCCIO8 L10VCCIO9 J14
VCCIO10 J13VCCIO11 J12
VCCIO13 H14VCCIO14 H12VCCIO15 H11VCCIO16 G14VCCIO17 G13
VCCIO25 E11
VCCIO32 C12VCCIO33 C11VCCIO34 B14VCCIO35 B12VCCIO36 A14VCCIO37
A13VCCIO38 A12VCCIO39 A11
VCCIO26 D14VCCIO27 D13VCCIO28 D12VCCIO29 D11VCCIO30 C14VCCIO31
C13
VCCIO_SENSE B10
VCCIO40 J23
R449 0_0402_5%R449 0_0402_5%1 2
R16310_0402_5%R16310_0402_5%
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_DIMM_VREFDQ
VCCIO_SEL
+V_SM_VREF
H_VCCSA_VID0H_VCCSA_VID1
SA_DIMM_VREFDQ
+VCCSA_SENSE+VCCSA
+VCCPLL
VCCIO_SEL
VCC_AXG_SENSE VSS_AXG_SENSE
+VCCSA_SENSE
H_VCCSA_VID1 H_VCCSA_VID0
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
+VGFX_CORE
+1.5VS
+1.5VS
+VGFX_CORE
+VCCSA
+1.8VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
9 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
9 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
9 63Friday, February 10, 2012
2011/06/02 2012/06/02
5A
QC 46ADC 33A
+V_SM_VREF shouldhave 20 mil trace width
1.2A
INTEL Recommend 1*330uF,3*10uFfrom CR PDDG 0.8
10
01
Sandy Ivy
V
V
V
VX
V
Vout
0.9V
0.8V
0.725V
VCCSA
VID0 VID1
0 0
6A
11 VX0.675V
*VCCIO_SEL For 2012 CPU support
1/NC : (Default) +1.05VS_VTT A19
0: +1.0VS_VTT
RSVD26 had changed the name to VCCIO_SELNeed PH +3VALW 10K at
+1.05VS_VTT source for 2012 processor +1.05V and +1.0V select
INTEL Recommend 1*330uF,1*10uF and 2*1uF(0402) from CR PDDG
0.8
INTEL Recommend 1*330uF,6*10uFfrom CR PDDG 0.8
R137 0_0402_5%@R137 0_0402_5%@1 2
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPU1G
TYCO_2013620-2_IVY BRIDGECONN@
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPU1G
TYCO_2013620-2_IVY BRIDGECONN@
SM_VREF AL1
VSSAXG_SENSE AK34VAXG_SENSE AK35VAXG1AT24
VAXG2AT23VAXG3AT21VAXG4AT20VAXG5AT18VAXG6AT17VAXG7AR24VAXG8AR23VAXG9AR21VAXG10AR20VAXG11AR18VAXG12AR17VAXG13AP24VAXG14AP23VAXG15AP21VAXG16AP20VAXG17AP18VAXG18AP17VAXG19AN24VAXG20AN23VAXG21AN21VAXG22AN20VAXG23AN18VAXG24AN17VAXG25AM24VAXG26AM23VAXG27AM21VAXG28AM20VAXG29AM18VAXG30AM17VAXG31AL24VAXG32AL23VAXG33AL21VAXG34AL20VAXG35AL18VAXG36AL17VAXG37AK24VAXG38AK23VAXG39AK21VAXG40AK20VAXG41AK18VAXG42AK17VAXG43AJ24VAXG44AJ23VAXG45AJ21VAXG46AJ20VAXG47AJ18VAXG48AJ17VAXG49AH24VAXG50AH23VAXG51AH21VAXG52AH20VAXG53AH18VAXG54AH17
VDDQ11 U4VDDQ12 U1VDDQ13 P7VDDQ14 P4VDDQ15 P1
VDDQ1 AF7VDDQ2 AF4VDDQ3 AF1VDDQ4 AC7VDDQ5 AC4VDDQ6 AC1VDDQ7
Y7VDDQ8 Y4VDDQ9 Y1
VDDQ10 U7
VCCPLL1B6VCCPLL2A6
VCCSA1 M27VCCSA2 M26VCCSA3 L26VCCSA4 J26VCCSA5 J25VCCSA6
J24VCCSA7 H26VCCSA8 H25
VCCSA_SENSE H23
VCCSA_VID[1] C24VCCPLL3A2VCCSA_VID[0] C22
SA_DIMM_VREFDQ B4SB_DIMM_VREFDQ D1
VCCIO_SEL A19
C655
10U_0603_6.3V6MC
65510U
_0603_6.3V6M
1
2
R90910K_0402_5%
R90910K_0402_5%
12
C214
10U_0603_6.3V6MC
21410U
_0603_6.3V6M
1
2
C362
10U_0603_6.3V6MC
36210U
_0603_6.3V6M
1
2
R903
10_0402_5%
R903
10_0402_5%
12
C828
10U_0603_6.3V6MC
82810U
_0603_6.3V6M
1
2
C363
10U_0603_6.3V6MC
36310U
_0603_6.3V6M
1
2
C219
10U_0603_6.3V6MC
21910U
_0603_6.3V6M
1
2
C6880.1U_0402_16V4Z
C6880.1U_0402_16V4Z
1
2
C653
1U_0402_6.3V6K
C653
1U_0402_6.3V6K
1
2
C213
10U_0603_6.3V6MC
21310U
_0603_6.3V6M1
2
C605
10U_0603_6.3V6MC
60510U
_0603_6.3V6M
1
2
R91310K_0402_5%
@R91310K_0402_5%
@
12
R904
10_0402_5%
R904
10_0402_5%
12
R5751K_0402_1%R5751K_0402_1%
12
C830
10U_0603_6.3V6MC
83010U
_0603_6.3V6M
1
2 R1380_0402_5%@
R1380_0402_5%@
12
+ C221
330U_D2_2V_Y@
+ C221
330U_D2_2V_Y@
1
2
R5821K_0402_1%R5821K_0402_1%
12
C829
10U_0603_6.3V6MC
82910U
_0603_6.3V6M
1
2
R528 0_0805_5%R528 0_0805_5%1 2
C654
1U_0402_6.3V6K
C654
1U_0402_6.3V6K
1
2
C831
10U_0603_6.3V6MC
83110U
_0603_6.3V6M
1
2
C364
10U_0603_6.3V6MC
36410U
_0603_6.3V6M
1
2
C341
10U_0603_6.3V6MC
34110U
_0603_6.3V6M
1
2
+
C355
330U_D
2_2V_Y
+
C355
330U_D
2_2V_Y
1
2
C365
10U_0603_6.3V6MC
36510U
_0603_6.3V6M
1
2
+
C664
330U_D
2_2V_Y
@+
C664
330U_D
2_2V_Y
@
1
2
C361
10U_0603_6.3V6MC
36110U
_0603_6.3V6M
1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
10 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
10 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
10 63Friday, February 10, 2012
2011/06/02 2012/06/02Compal Electronics, Inc.
VSS
JCPU1H
TYCO_2013620-2_IVY BRIDGECONN@
VSS
JCPU1H
TYCO_2013620-2_IVY BRIDGECONN@
VSS1AT35VSS2AT32VSS3AT29VSS4AT27VSS5AT25VSS6AT22VSS7AT19VSS8AT16VSS9AT13VSS10AT10VSS11AT7VSS12AT4VSS13AT3VSS14AR25VSS15AR22VSS16AR19VSS17AR16VSS18AR13VSS19AR10VSS20AR7VSS21AR4VSS22AR2VSS23AP34VSS24AP31VSS25AP28VSS26AP25VSS27AP22VSS28AP19VSS29AP16VSS30AP13VSS31AP10VSS32AP7VSS33AP4VSS34AP1VSS35AN30VSS36AN27VSS37AN25VSS38AN22VSS39AN19VSS40AN16VSS41AN13VSS42AN10VSS43AN7VSS44AN4VSS45AM29VSS46AM25VSS47AM22VSS48AM19VSS49AM16VSS50AM13VSS51AM10VSS52AM7VSS53AM4VSS54AM3VSS55AM2VSS56AM1VSS57AL34VSS58AL31VSS59AL28VSS60AL25VSS61AL22VSS62AL19VSS63AL16VSS64AL13VSS65AL10VSS66AL7VSS67AL4VSS68AL2VSS69AK33VSS70AK30VSS71AK27VSS72AK25VSS73AK22VSS74AK19VSS75AK16VSS76AK13VSS77AK10VSS78AK7VSS79AK4VSS80AJ25
VSS81 AJ22VSS82 AJ19VSS83 AJ16VSS84 AJ13VSS85 AJ10VSS86 AJ7VSS87
AJ4VSS88 AJ3VSS89 AJ2VSS90 AJ1VSS91 AH35VSS92 AH34VSS93 AH32VSS94
AH30VSS95 AH29VSS96 AH28VSS98 AH25VSS99 AH22
VSS100 AH19VSS101 AH16VSS102 AH7VSS103 AH4VSS104 AG9VSS105
AG8VSS106 AG4VSS107 AF6VSS108 AF5VSS109 AF3VSS110 AF2VSS111
AE35VSS112 AE34VSS113 AE33VSS114 AE32VSS115 AE31VSS116 AE30VSS117
AE29VSS118 AE28VSS119 AE27VSS120 AE26VSS121 AE9VSS122 AD7VSS123
AC9VSS124 AC8VSS125 AC6VSS126 AC5VSS127 AC3VSS128 AC2VSS129
AB35VSS130 AB34VSS131 AB33VSS132 AB32VSS133 AB31VSS134 AB30VSS135
AB29VSS136 AB28VSS137 AB27VSS138 AB26VSS139 Y9VSS140 Y8VSS141
Y6VSS142 Y5VSS143 Y3VSS144 Y2VSS145 W35VSS146 W34VSS147 W33VSS148
W32VSS149 W31VSS150 W30VSS151 W29VSS152 W28VSS153 W27VSS154
W26VSS155 U9VSS156 U8VSS157 U6VSS158 U5VSS159 U3VSS160 U2
VSS
JCPU1I
TYCO_2013620-2_IVY BRIDGECONN@
VSS
JCPU1I
TYCO_2013620-2_IVY BRIDGECONN@
VSS161T35VSS162T34VSS163T33VSS164T32VSS165T31VSS166T30VSS167T29VSS168T28VSS169T27VSS170T26VSS171P9VSS172P8VSS173P6VSS174P5VSS175P3VSS176P2VSS177N35VSS178N34VSS179N33VSS180N32VSS181N31VSS182N30VSS183N29VSS184N28VSS185N27VSS186N26VSS187M34VSS188L33VSS189L30VSS190L27VSS191L9VSS192L8VSS193L6VSS194L5VSS195L4VSS196L3VSS197L2VSS198L1VSS199K35VSS200K32VSS201K29VSS202K26VSS203J34VSS204J31VSS205H33VSS206H30VSS207H27VSS208H24VSS209H21VSS210H18VSS211H15VSS212H13VSS213H10VSS214H9VSS215H8VSS216H7VSS217H6VSS218H5VSS219H4VSS220H3VSS221H2VSS222H1VSS223G35VSS224G32VSS225G29VSS226G26VSS227G23VSS228G20VSS229G17VSS230G11VSS231F34VSS232F31VSS233F29
VSS234 F22VSS235 F19VSS236 E30VSS237 E27VSS238 E24VSS239
E21VSS240 E18VSS241 E15VSS242 E13VSS243 E10VSS244 E9VSS245 E8VSS246
E7VSS247 E6VSS248 E5VSS249 E4VSS250 E3VSS251 E2VSS252 E1VSS253
D35VSS254 D32VSS255 D29VSS256 D26VSS257 D20VSS258 D17VSS259
C34VSS260 C31VSS261 C28VSS262 C27VSS263 C25VSS264 C23VSS265
C10VSS266 C1VSS267 B22VSS268 B19VSS269 B17VSS270 B15VSS271
B13VSS272 B11VSS273 B9VSS274 B8VSS275 B7VSS276 B5VSS277 B3VSS278
B2VSS279 A35VSS280 A32VSS281 A29VSS282 A26VSS283 A23VSS284
A20VSS285 A3
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_DDR_REFA
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D18DDR_A_D19
DDR_A_D26DDR_A_D27
DDR_A0_DM0
DDR_A0_DM3
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_D17
DDR_A_D9
DDR_A_D16
DDR_A_D25DDR_A_D24
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_MA1DDR_A_MA3
DDR_A_MA5DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A0_DM5
DDR_A0_DM7
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_BS0
DDR_A_BS2
DDRA_CS1_DIMMA#
SA_CLK_DDR0SA_CLK_DDR#0
DDRA_CKE0_DIMMA
DDR_A_CAS#DDR_A_WE#
DDR_A_D33
DDR_A_D48
DDR_A_D36DDR_A_D37
DDR_A_D45
DDR_A_D46
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_MA2DDR_A_MA0
DDR_A_MA4DDR_A_MA6
DDR_A_MA7DDR_A_MA11
DDR_A_MA14
DDR_A0_DM4
DDR_A0_DM6
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_BS1
DDRA_CS0_DIMMA#
SA_CLK_DDR1SA_CLK_DDR#1
DDRA_CKE1_DIMMA
DDR_A_RAS#
D_CK_SDATAD_CK_SCLK
SA_ODT0
SA_ODT1
DDR_A_D63
DDR_A_MA15
+VREF_CA
DDR_A_D39
DDR_A_D54
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D21
DDR_A_D28DDR_A_D29
DDR_A0_DM1
DDR_A0_DM2
DDR_A_DQS0
DDR_A_DQS3
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_D23
DDR_A_D31
DDR_A_D13
DDR_A_D20
DDR_A_D30
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A0_DM5
DDR_A0_DM3
DDR_A0_DM7
DDR_A0_DM0DDR_A0_DM1
DDR_A0_DM6
DDR_A0_DM4
DDR_A0_DM2
DDR3_DRAMRST#
DDRA_CS1_DIMMA#
DDR_A_CAS#DDR_A_WE#
DDR_A_BS0
SA_CLK_DDR#0SA_CLK_DDR0
DDR_A_BS2
DDRA_CKE0_DIMMA DDRA_CKE1_DIMMA
SA_CLK_DDR1 SA_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDRA_CS0_DIMMA# SA_ODT0
SA_ODT1
D_CK_SDATA D_CK_SCLK
DIMM_DRAMRST#
RST_GATE
SA_DIMM_VREFDQ DDR_A_D[0..63]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..15]
+1.5V
+3VS
+0.75VS +0.75VS
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+0.75VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
11 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
11 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
11 63Friday, February 10, 2012
2011/06/02 2012/06/02
All VREF traces shouldhave 10 mil trace width
DIMM_1 Reserve H:8mm
M3 support
Layout Note:Place near JDIMM1.203,204
CHG C407 to oscon
Layout Note:Place near JDIMM1
R02 modify for ESD
C2066
0.1U_0402_16V4Z
C2066
0.1U_0402_16V4Z
1
2
C395
1U_0402_6.3V6K
C395
1U_0402_6.3V6K
1
2
C408
2.2U_0603_6.3V6K
C408
2.2U_0603_6.3V6K
1
2
G
DS
Q46S TR SSM3K7002F 1N SC59-3 @G
DS
Q46S TR SSM3K7002F 1N SC59-3 @
2
13
C409
1U_0402_6.3V6K
C409
1U_0402_6.3V6K
1
2
R3201K_0402_5%R3201K_0402_5%
12
R302
10K_0402_5%R
30210K_0402_5%
12
C404
0.1U_0402_16V4Z
C404
0.1U_0402_16V4Z
1
2
C384
10U_0603_6.3V6M
C384
10U_0603_6.3V6M
1
2
C378
10U_0603_6.3V6M
C378
10U_0603_6.3V6M
1
2
C411
0.1U_0402_16V4Z
C411
0.1U_0402_16V4Z
1
2
C412
10U_0603_6.3V6M
C412
10U_0603_6.3V6M
1
2
C373
0.1U_0402_16V4Z
C373
0.1U_0402_16V4Z
1
2
C416
2.2U_0603_6.3V6K
C416
2.2U_0603_6.3V6K
1
2
C385
1U_0402_6.3V6K
C385
1U_0402_6.3V6K
1
2
C415
10U_0603_6.3V6M
C415
10U_0603_6.3V6M
1
2
R301
10K_0402_5%R
30110K_0402_5%
12
C383
10U_0603_6.3V6M
@
C383
10U_0603_6.3V6M
@
1
2
R2671K_0402_5%R2671K_0402_5%
12
C372
2.2U_0603_6.3V6K
C372
2.2U_0603_6.3V6K
1
2
C371
1U_0402_6.3V6K
C371
1U_0402_6.3V6K
1
2
C414
10U_0603_6.3V6M
C414
10U_0603_6.3V6M
1
2
R2661K_0402_5%R2661K_0402_5%
12
C388
1U_0402_6.3V6K
C388
1U_0402_6.3V6K
1
2
JDIMM1
FOX_AS0A626-U8SN-7FCONN@
JDIMM1
FOX_AS0A626-U8SN-7FCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0
10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8
20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129
RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14
38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247
VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28
56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365
VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4
82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10
100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1
108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0
116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18
124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131
DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139
DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147
DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155
VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163
DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171
VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179
DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187
DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195
VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203
VTT2 204
G1205 G2 206
R1330_0402_5%@R1330_0402_5%@
1 2
C413
10U_0603_6.3V6M
C413
10U_0603_6.3V6M
1
2
C394
1U_0402_6.3V6K
C394
1U_0402_6.3V6K
1
2
+
C407
330U_D
2_2V_Y
@+
C407
330U_D
2_2V_Y
@1
2
C410
1U_0402_6.3V6K
C410
1U_0402_6.3V6K
1
2
C393
1U_0402_6.3V6K
C393
1U_0402_6.3V6K
1
2
R3191K_0402_5%R3191K_0402_5%
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_DDR_REFC
DDR_B0_DM5
DDR_B0_DM3
DDR_B0_DM7
DDR_B0_DM0DDR_B0_DM1
DDR_B0_DM6
DDR_B0_DM4
DDR_B0_DM2
D_CK_SDATAD_CK_SCLK
+VREF_CC
DDR_B0_DM0
DDR_B_D2DDR_B_D3
DDR_B_D1DDR_B_D0
DDR_B_D8DDR_B_D9
DDR_B_DQS#1DDR_B_DQS1
DDR_B_D10DDR_B_D11
DDR_B_D16DDR_B_D17
DDR_B_DQS#2DDR_B_DQS2
DDR_B_D18DDR_B_D19
DDR_B_D24DDR_B_D25
DDR_B0_DM3
DDR_B_D26DDR_B_D27
DDR_B_D5
DDR_B_DQS#0
DDR_B_D4
DDR_B_DQS0
DDR_B_D22
DDR_B_D20
DDR3_DRAMRST#DDR_B0_DM1
DDR_B_D23
DDR_B_D21
DDR_B_DQS#3
DDR_B_D14
DDR_B0_DM2
DDR_B_DQS3
DDR_B_D7DDR_B_D6
DDR_B_D15
DDR_B_D28DDR_B_D29
DDR_B_D30
DDR_B_D12
DDR_B_D31
DDR_B_D13
DDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
SB_CLK_DDR0SB_CLK_DDR#0
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_B_MA13DDRB_CS1_DIMMB#
DDR_B_D32DDR_B_D33
DDR_B_DQS#4DDR_B_DQS4
DDR_B_D34DDR_B_D35
DDR_B_D40DDR_B_D41
DDR_B0_DM5
DDR_B_D42DDR_B_D43
DDR_B_D48DDR_B_D49
DDR_B_DQS#6DDR_B_DQS6
DDR_B_D50DDR_B_D51
DDR_B_D56DDR_B_D57
DDR_B0_DM7
DDRB_CKE0_DIMMB
DDR_B_D58DDR_B_D59
DDR_B_MA15
DDR_B_MA7
SB_ODT0
DDR_B_MA14
DDR_B_MA6
DDRB_CKE1_DIMMB
DDR_B_MA4
DDR_B_BS1
SB_ODT1
SB_CLK_DDR1
DDR_B_RAS#
SB_CLK_DDR#1
DDR_B_MA2
DDR_B_MA11
DDR_B_MA0
DDRB_CS0_DIMMB#
DDR_B_D61
DDR_B_DQS#7DDR_B_DQS7
DDR_B_D62DDR_B_D63
DDR_B_D52
DDR_B_D36DDR_B_D37
DDR_B_D44
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_B_D45
DDR_B_D38
DDR_B_D55
DDR_B_D47
DDR_B0_DM6
DDR_B_DQS#5
DDR_B0_DM4
DDR_B_D60
DDR_B_D39
DDR_B_DQS5
D_CK_SDATA D_CK_SCLK
DIMM_DRAMRST#
DDRB_CS1_DIMMB#
DDR_B_CAS#DDR_B_WE#
DDR_B_BS0
SB_CLK_DDR#0SB_CLK_DDR0
DDRB_CKE0_DIMMB
DDR_B_BS2
SB_CLK_DDR#1
DDR_B_BS1 DDR_B_RAS#
DDRB_CS0_DIMMB# SB_ODT0
SB_ODT1
SB_CLK_DDR1
DDRB_CKE1_DIMMB
DDR_B_D[0..63]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA[0..15] RST_GATE
SB_DIMM_VREFDQ
+3VS
+0.75VS
+0.75VS
+0.75VS
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V +1.5V
+3VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
12 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
12 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
12 63Friday, February 10, 2012
2011/06/02 2012/06/02
All VREF traces shouldhave 10 mil trace width
Layout Note:Place near JDIMM2.203,204
Layout Note:Place near JDIMM2
DIMM_2 Reserve H:4mm
M3 support
CHG C359 to oscon
C451
2.2U_0603_6.3V6K
C451
2.2U_0603_6.3V6K
1
2 C440
1U_0402_6.3V6K
C440
1U_0402_6.3V6K
1
2
C427
1U_0402_6.3V6K
C427
1U_0402_6.3V6K
1
2
R345
10K_0402_5%R
34510K_0402_5%
12
JDIMM2
FOX_AS0A626-U4RN-7FCONN@
JDIMM2
FOX_AS0A626-U4RN-7FCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0
10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8
20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129
RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14
38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247
VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28
56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365
VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4
82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10
100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1
108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0
116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18
124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131
DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139
DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147
DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155
VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163
DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171
VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179
DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187
DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195
VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203
VTT2 204
G1205 G2 206
C428
1U_0402_6.3V6K
C428
1U_0402_6.3V6K
1
2
C424
10U_0603_6.3V6M
C424
10U_0603_6.3V6M
1
2
R3501K_0402_5%R3501K_0402_5%
12
R3460_0402_5%@R3460_0402_5%@
1 2
C450
10U_0603_6.3V6M
C450
10U_0603_6.3V6M
1
2
C438
2.2U_0603_6.3V6K
C438
2.2U_0603_6.3V6K
1
2
C447
10U_0603_6.3V6M
C447
10U_0603_6.3V6M
1
2
C435
0.1U_0402_16V4Z
C435
0.1U_0402_16V4Z
1
2
C449
10U_0603_6.3V6M
C449
10U_0603_6.3V6M
1
2
C444
1U_0402_6.3V6K
C444
1U_0402_6.3V6K
1
2
G
DS
Q47S TR SSM3K7002F 1N SC59-3 @G
DS
Q47S TR SSM3K7002F 1N SC59-3 @
2
13
C439
1U_0402_6.3V6K
C439
1U_0402_6.3V6K
1
2
C425
10U_0603_6.3V6M
C425
10U_0603_6.3V6M
1
2
R3411K_0402_5%R3411K_0402_5%
12
C446
0.1U_0402_16V4Z
C446
0.1U_0402_16V4Z
1
2
R3401K_0402_5%R3401K_0402_5%
12
C430
1U_0402_6.3V6K
C430
1U_0402_6.3V6K
1
2
C426
10U_0603_6.3V6M
@C426
10U_0603_6.3V6M
@1
2
C429
1U_0402_6.3V6K
C429
1U_0402_6.3V6K
1
2
R3511K_0402_5%R3511K_0402_5%
12
C448
10U_0603_6.3V6M
C448
10U_0603_6.3V6M
1
2
C436
2.2U_0603_6.3V6K
C436
2.2U_0603_6.3V6K
1
2
+
C359
330U_2.5V_M
+
C359
330U_2.5V_M
1
2
C445
1U_0402_6.3V6K
C445
1U_0402_6.3V6K
1
2
C437
0.1U_0402_16V4Z
C437
0.1U_0402_16V4Z
1
2
R344
10K_0402_5%R
34410K_0402_5%
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX1
PCH_RTCX2
PCH_RTCX1
PCH_RTCRST#
SM_INTRUDER#
PCH_INTVRMEN
SM_INTRUDER#
PCH_SPKR
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_CS0#_1
PCH_JTAG_TCK
PCH_SATALED#
PCH_SRTCRST#
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
HDA_SYNC_PCH
HDA_RST_PCH#
HDA_SDIN0
HDA_SDOUT_PCH
PCH_RTCX2
HDA_BITCLK_PCH
LPC_AD2
LPC_FRAME#
LPC_AD0
LPC_AD3
LPC_AD1
SERIRQ
PCH_GPIO19
SATA_COMP
RBIAS_SATA3
SATA3_COMP
HDA_BITCLK_PCH
HDA_RST_PCH#
HDA_SDOUT_PCH
PCH_INTVRMEN
PCH_SPKR
HDA_SDOUT_PCH
HDA_SYNC_PCH
HDA_SYNC_PCH_R
PCH_SPI_CLK_1
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
SGEN#
SERIRQ
PCH_SATALED#
PCH_GPIO19
+RTCBATT_R
PCH_SPI_MISO_1
PCH_SPI_CS0#_1PCH_SPI_CLK_1PCH_SPI_MOSI_1
SPI_WP1#SPI_HOLD1#
SPI_WP1#SPI_HOLD1#
PCH_SPI_CLK_1
SGEN#
HDA_SYNC_PCHHDA_SYNC_PCH_R
PCH_SPI_CLK_2
PCH_SPI_CLK
PCH_SPI_CS0#_2
PCH_SPI_MOSI_2
PCH_SPI_MISO_2
SPI_HOLD2#
SPI_WP2#
PCH_SPI_CS0#_2PCH_SPI_CLK_2PCH_SPI_MOSI_2PCH_SPI_MISO_2
SPI_WP2#SPI_HOLD2#
PCH_SPI_CLK_2
PCH_SPI_VCC
PCH_GPIO23
PCH_GPIO23
PCH_SPKR
HDA_SDIN0
SERIRQ
SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0
SATA_PRX_DTX_N0
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME#
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
HDA_RST_AUDIO#
HDA_BITCLK_AUDIO
PCH_SATALED#
ME_EN
SATA_PRX_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2
SATA_PRX_DTX_N2
SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1
SATA_PRX_DTX_N1
+RTCVCC
+RTCVCC
+1.05VS_VTT
+1.05VS_VTT
+3VS
+3VALW_PCH
+3VALW_PCH
+3VS
+CHGRTC
+RTCVCC
+RTCBATT
+3VS
+3VS
+3VS
+RTCBATT
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
13 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
13 63Friday, February 10, 2012
2011/06/02 2012/06/02 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
4019ID CSCHEMATIC,MB A7912
Custom
13 63Friday, February 10, 2012
2011/06/02 2012/06/02
SRTCRST close RAM door
RTCRST close RAM door
HDD
Compal Electronics, Inc.
H:Integrated VRM enableL:Integrated VRM disable
INTVRMEN*
LOW= Disable (Default)HIGH= Enable ( No Reboot )
*
* Low = Disabled (Default)High = Enabled [Flash Descriptor
Security Overide]
This signal has a weak internal pull-down
On Die PLL VR Select is supplied by 1.5V when smapled high 1.8V
when sampled lowNeeds to be pulled High for Huron River
platfrom
*
(INTVRMEN should always be pull high.)
ME debug mode,this signal has a weak internal PDHDA_SDO as
Capella ME override (GPIO33)
Boot BIOS GPIO19
01
SPI-
GPIO51
ReservedLPC
Boot BIOS Strap
1 1
0
*
010
ODD
20mil
20mil
This part had been re-modifiedbe careful,if link symbol!!
SPI ROM FOR ME (4MB)Footprint 200mil
Rserve the 2M ROM for Win8
GPIO21
01*
Switchable GPUNon-Switchable
SGEN#
Prevent back drive issue.
MSATA
Modify R02
R02 Modify
Modify R03Co-lay NPCE885N
R04 modify
R04 modify
Modify R04Delete Co-lay NPCE885N
GPIO23
01
USB2.0USB3.0
USB_config
modify on 7912 V0.3
R55533_0402_5%
R55533_0402_5%1 2
R681 33_0402_5%R681 33_0402_5%1 2
R667 3.3K_0402_5%R667 3.3K_0402_5%1 2
R539 1K_0402_5%R539 1K_0402_5%12
U33
BD82HM77 QPRG C1 BGA 989PHM77@SA00005AG00
U33
BD82HM77 QPRG C1 BGA 989PHM77@SA00005AG00
G
DS
Q36S TR SSM3K7002F 1N SC59-3
G
DS
Q36S TR SSM3K7002F 1N SC59-3
2
13
R5570_0402_5%
R5570_0402_5%
12
R243 20K_0402_1%R243 20K_0402_1%1 2
R275 10K_0402_5%R275 10K_0402_5%12
R654 3.3K_0402_5%R654 3.3K_0402_5%1 2
R585 330K_0402_5%R585 330K_0402_5%1 2
R624 4.7K_0402_5%R624 4.7K_0402_5%1 2
R209220K_0402_1%
PUSB2@R209220K_0402_1%
PUSB2@
12
C3601U_0603_10V6K
C3601U_0603_10V6K
1
2
R640 10K_0402_5%R640 10K_0402_5%12JBATT1
SUYIN_060003HA002G202ZLCONN@
JBATT1
SUYIN_060003HA002G202ZLCONN@
+1
-2 U36
32M W25Q32BVSSIG_SO8
U36
32M W25Q32BVSSIG_SO8
CS#1
SO/SIO1 2
WP#3
GND4
VCC 8
HOLD#7SCLK 6
SI/SIO0 5
R54433_0402_5%
R54433_0402_5%
1 2
R294 1K_0402_5%@R294 1K_0402_5%@1 2
R568 10M_0402_5%R568 10M_0402_5%1 2
U42
MX25L1606EM2I-12G_SO8
WIN8@U42
MX25L1606EM2I-12G_SO8
WIN8@
CS#1
SO 2
WP#3
GND4
VCC 8
HOLD#7SCLK 6
SI 5
R567 1M_0402_5%R567 1M_0402_5%1 2
R734 33_0402_5%WIN8@
R734 33_0402_5%WIN8@ 12
C2049
33P_0402_50V8K
@ C2049
33P_0402_50V8K
@
C682
15P_0402_50V8J
C682
15P_0402_50V8J
1
2
D13
CHN202U