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COMP3221 lec36-vm-I.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lectures 13: Virtual Memory - I http://www.cse.unsw.edu.au/~cs3221 Modified from notes by Saeid Nooshabadi [email protected] Some of the slides are adopted from David Patterson (UCB)
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COMP3221 lec36-vm-I.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lectures 13: Virtual Memory - I cs3221.

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Page 1: COMP3221 lec36-vm-I.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lectures 13: Virtual Memory - I cs3221.

COMP3221 lec36-vm-I.1 Saeid Nooshabadi

COMP 3221

Microprocessors and Embedded Systems

Lectures 13: Virtual Memory - I

http://www.cse.unsw.edu.au/~cs3221

Modified from notes by Saeid Nooshabadi

[email protected] of the slides are adopted from David Patterson (UCB)

Page 2: COMP3221 lec36-vm-I.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lectures 13: Virtual Memory - I cs3221.

COMP3221 lec36-vm-I.2 Saeid Nooshabadi

Overview

°Virtual Memory

°Page Table

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COMP3221 lec36-vm-I.3 Saeid Nooshabadi

Cache Review (#1/2)

°Caches are NOT mandatory:• Processor performs arithmetic

• Memory stores instructions & data

• Caches simply make things go faster

°Each level of memory hierarchy is just a subset of next higher level

°Caches speed up due to Temporal Locality: store data used recently

°Block size > 1 word speeds up due to Spatial Locality: store words adjacent to the ones used recently

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Cache Review (#2/2)

°Cache design choices:• size of cache: speed vs. capacity

• direct-mapped vs. associative

• for N-way set assoc: choice of N

• block replacement policy

• 2nd level cache?

• Write through vs. write back?

°Use performance model to pick between choices, depending on programs, technology, budget, ...

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Another View of the Memory Hierarchy

Regs

L2 Cache

Memory

Disk

Tape

Instr. Operands

Blocks

Pages

Files

Upper Level

Lower Level

Faster

Larger

CacheBlocks

Thus far{{Next:

VirtualMemory

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COMP3221 lec36-vm-I.6 Saeid Nooshabadi

Virtual Memory

° If Principle of Locality allows caches to offer (usually) speed of cache memory with size of DRAM memory,then why not, recursively, use at next level to give speed of DRAM memory, size of Disk memory?

°Called “Virtual Memory”• Also allows OS to share memory, protect programs from each other

• Today, more important for protection vs. just another level of memory hierarchy

• Historically, it predates caches

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COMP3221 lec36-vm-I.7 Saeid Nooshabadi

Problems Leading to Virtual Memory (#1/2)°Programs address space is larger than the physical memory.

• Need to swap code and data back and forth between memory and Hard disk using Virtual Memory)

0

Physical Memory

Code

Static

Heap

Stack

64 MB

0

>>64 MB

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COMP3221 lec36-vm-I.8 Saeid Nooshabadi

Problems Leading to Virtual Memory (#2/2)

°Many Processes (programs) active at the same time. (Single Processor - many Processes)

• Processor appears to run multiple programs all at once by rapidly switching between active programs.

• The rapid switching is managed by Memory Management Unit (MMU) by using Virtual Memory concept.

Code

Static

Heap

Stack

0

Code

Static

Heap

Stack

0

Code

Static

Heap

Stack

0

•Each program sees the entire address space as its own. •How to avoid multiple programs overwriting each other.

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Segmentation Solution

°Segmentation provides simple MMU• Program views its memory as set of segments. Code segment, Data Segment, Stack segment, etc.

• Each program has its own set of private segments.

• Each access to memory is via a segment selector and offset within the segment.

• It allows a program to have its own private view of memory and to coexist transparently with other programs in the same memory space.

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COMP3221 lec36-vm-I.10 Saeid Nooshabadi

Segmentation Memory Management Unit

° Base: The base address of the segment° Bound: Segment limit

° SDT: Holds Access and other information about the segment

° Physical address = base + offset

Segment Descriptor Table (SDT)

offsetsegment selector

physical address

+ >?

access fault

base bound

Logical Address: (segment, offset)

Look up table held by OS in mem

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Virtual to Physical Addr. Translation

°Each program operates in its own virtual address space;

°Each is protected from the other°OS can decide where each goes in memory°Hardware (HW) provides virtual -> physical mapping

virtualaddress(inst. fetchload, store)

Programoperates inits virtualaddressspace

HWmapping

physicaladdress(inst. fetchload, store)

Physicalmemory(incl. caches)

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Simple Example: Base and Bound Reg

0

OS

User A

User B

User C

$base

$base+$bound

°Want discontinuous mapping

°Process size >> mem

°Addition not enough!

Enough space for User D,but discontinuous (“fragmentation problem”)

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Mapping Virtual Memory to Physical Memory

0

Physical Memory

Virtual Memory

Code

Static

Heap

Stack

64 MB

°Divide into equal sizedchunks (about 4KB)

0

°Any chunk of Virtual Memory assigned to any chuck of Physical Memory (“page”)

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Paging Organization (assume 1 KB pages)

AddrTransMAP

Page is unit of mapping

Page also unit of transfer from disk to physical memory

page 0 1K1K

1K

01024

31744

Virtual Memory

VirtualAddress

page 1

page 31

1K2048 page 2

...... ...

page 001024

7168

PhysicalAddress

PhysicalMemory

1K1K

1K

page 1

page 7...... ...

Addr Trans MAP is organised by OS

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Virtual Memory Mapping Function

°Cannot have simple function to predict arbitrary mapping

°Use table lookup of mappings

°Use table lookup (“Page Table”) for mappings: Page number is index

°Virtual Memory Mapping Function• Physical Offset = Virtual Offset

• Physical Page Number= PageTable[Virtual Page Number]

(P.P.N. also called “Page Frame”)

Page Number Offset

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Address Mapping: Page Table

Virtual Address:page no. offset

Page TableBase Reg

Page Table located in physical memory

(actually, concatenation)

indexintopagetable

+

PhysicalMemoryAddress

Page Table

Val-id

AccessRights

PhysicalPageNumber

.

V A.R. P. P. N.

...

...

Reg #2 in CP #15 in ARM

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Page Table

°A page table is an operating system structure which contains the mapping of virtual addresses to physical locations

• There are several different ways, all up to the operating system, to keep this data around

°Each process running in the operating system has its own page table

• “State” of process is PC, all registers, plus page table

• OS changes page tables by changing contents of Page Table Base Register

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Reading Material° Steve Furber: ARM System On-Chip; 2nd

Ed, Addison-Wesley, 2000, ISBN: 0-201-67519-6. Chapter 10.

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Smart Mobile Phones° The Nokia’s Series 60

Platform:• software product for

smart phones that Nokia licenses to other mobile-handset manufacturers.

• runs on top of the Symbian OS.

• The Series 60 Platform includes mobile

- browsing, - multimedia

messaging and content downloading,

- personal information management and telephony applications.

- software platform includes a complete and modifiable user interface library.

•ARM PrimeXsys tools supplies the suite of pre-validated hardware abd software

- Licensees: Panasonic Mobile Communications, Samsung, Sendo, and Siemens (60% of market

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Paging/Virtual Memory for Multiple Pocesses

User B: Virtual Memory

Code

Static

Heap

Stack

0Code

Static

Heap

Stack

A PageTable

B PageTable

User A: Virtual Memory

00

Physical Memory

64 MB

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Page Table Entry (PTE) Format

°Contains either Physical Page Number or indication not in Main Memory

°OS maps to disk if Not Valid (V = 0)

° If valid, also check if have permission to use page: Access Rights (A.R.) may be Read Only, Read/Write, Executable

...Page Table

Val-id

AccessRights

PhysicalPageNumber

V A.R. P. P. N.

V A.R. P. P.N.

...

P.T.E.

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Things to Remember° Apply Principle of Locality Recursively

° Manage memory to disk? Treat as cache• Included protection as bonus, now critical

• Use Page Table of mappings vs. tag/data in cache

° Virtual Memory allows protected sharing of memory between processes with less swapping to disk, less fragmentation than always swap or base/bound

° Virtual Memory allows protected sharing of memory between processes with less swapping to disk, less fragmentation than always swap or base/bound in Segmentation