Combinational Logic
Feb 22, 2016
Combinational Logic
Outline•4.1 Introduction•4.2 Combinational Circuits•4.3 Analysis Procedure •4.4 Design Procedure•4.5 Binary Adder- Subtractor•4.6 Decimal Adder•4.7 Binary Multiplier•4.9 Decoders•4.10 Encoder•4.11 Multiplexers
Introduction
Combinational Circuits
Analysis Procedure
Analysis Procedure Example
Analysis Procedure Example
Truth Table
Design Procedure
Design Method and Constraint
BCD To Excess-3 Code Conversion
BCD To Excess-3 Code Conversion
BCD To Excess-3 Code Conversion
Logic diagram for BCD-to-excess-3 Converter
1-Bit Half Adder
Implementation of Half Adder
1 -Bit Full Adder
Implementation of full adder in sum-of-products form
Implementation of Full Adder With Two Half Adders and an OR gate
4 -Bit Full Adder
Carry Lookahead Adder (1/7)
Carry Lookahead Adder (2/7)
Carry Lookahead Adder (3/7)
Carry Lookahead Adder (4/7)
Carry Lookahead Adder (5/7)
4-Bit Adder/Subtractor
Overflow Discussion
BCD Adder
Truth Table of BCD Adder
Logic Diagram of BCD Adder
Binary Multiplier
Bit by 3-Bit Binary Multiplier
Decoder
Three-to-Eight Line Decoder
Demultiplexer
Decoder Examples
D0 = m0 = A2’A1’A0’
D1= m1 = A2’A1’A0
…etc
3-to-8-Line Decoder: example: Binary-to-octal conversion.
Implementation
Encoder
1 3 5 7
2 3 6 7
4 5 6 7
z D D D Dy D D D Dx D D D D
=
==
+ + +
+ + ++ + +
The encoder can be implementedwith three OR gates.
Encoder
Priority Encoder
Priority Encoder
Priority Encoder
4-11 Multiplexers
4-to-1-line multiplexer
Quadruple two-to-one-line multiplexer
Boolean function implementation
Three-State Gate
Four-to-One-Line Multiplexer