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CMOS POOL CIRCUIT

Jun 03, 2018

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Jithin S
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    pool circuit

    Explore the new concepts

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    Objective

    To design a divider and multiplier using pool circuits.Pool is an analog circuit which performsarithmetic operations.

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    dividers/multipliers are used inAnalog computational circuits.Analog signal processing.AM modulators.

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    In direct implementation

    MOS are in triode region.It limits the high frequency of operation.It has high cost.Large power consumption.High area.

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    The working principle of pool is based on biological neurons .Where the concentration of a chemical

    pool depends on the synthesis anddegradation of chemicals.The synthesis is taken as inward current

    the degradation taken as outward current.

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    NEURAL POOL

    The equilibrium state of

    pool concentration isdefined when

    Inward current = outward

    current

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    Pool Circuit Analysis

    Arithmetic circuitBasic building block of divider andmultiplier.Aim : Both addition and subtractionDivider=3 , multiplier 11.

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    CIRCUIT DIAGRAM

    Saturation & Identical Implement adder , subtractor,sign inverter ..using abovecircuit.

    Iin=k(Va-Vb);Iout=k(Vc -Vd); Iin=Iout (equil.) k(Va- Vb)= k(Vc -Vd); (Va-Vb)=(Vc-Vd) : k=k

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    ADDER

    Iin=k(Va-Vo);Iout=k(0 -Vd);Iin=Iout (equil.)

    k(Va- Vo)= k(0 -Vd);

    Vb=(Va+Vd) : k=k

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    SUBTRACTOR

    Iin=k(Va- Vo); Iout=k(Vc -0);

    Iin=Iout (equil.)

    k(Va- Vo)= k(Vc -0);

    (Vo)=(Va-Vc) : k=k

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    SIGN INVERTER

    Iin=k(0-Vo);Iout=k(Vc -0);Iin=Iout (equil.)

    k(0- Vo)= k(Vc -0);

    Vo=(-Vc) : k=k

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    MODIFIED POOL CIRCUIT Both addition and subtraction. Aim to develop divider andmultiplier.

    Iin=k(Va- Vo); Iout=k(Vc -Vd);

    Iin=Iout (equil.)

    k(Va- Vo)= k(Vc -Vd);

    (Vo)=(Va+Vc-Vd) : k=k(Vo)=(V1+V3-V4)

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    Pool Circuit Results

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    The basic idea torealize the divideris to utilize thefollowing equation:(a-b)^2-(a+b)^2=4ab=cwhere b and c areinput and a is theoutput signal.

    All transistors arein saturation.

    DIVIDER CIRCUIT

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    The gate-to-source voltages of the devices M A andMB can be given as:

    VGSA = V B - VO + V T

    VGSB = VB + VO + V T

    The drain currents of M A and M B are:

    I1-I2 = K A(VB-VO)^2 - K A(V A+VO)^2

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    Advantages of pool circuit

    Many functions can be implemented.

    No resistors are required.

    - avoid power dissipation- reduced area requirement

    - makes analysis simpler.

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    Improved differential amplifiers are used.

    - improve accuracy of results.- increase the range of input voltages.

    Regulated current mirrors are used.- high output resistance.

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    Disadvantages

    Second order effects-Channel length modulation-mobility reduction-transistor mismatch

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    Applications of divider andmultiplier

    Expected to be useful in analog signal processing applications.

    -radar

    -communications-industrial controls

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    References[1] S. W. Tsay and R. W. Newcomb, "A NEURALTYPE POOL

    ARITHMETIC UNIT," Microsystems Laboratory Electrical Engineering Department University of Maryland .

    [2] S. Vlassis and S. Siskos, "ANALOG CMOS FOUR-QUADRANTMULTIPLIER AND DIVIDER," Electronics Laboratory,

    Department of Physics, Aristotle University of Thessaloniki.

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    THANK YOU

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