CMOS-MEMS High Gee Capacitive Accelerometers · CMOS-MEMS High Gee Capacitive Accelerometers ... the piezoresistor deposition requires temperatures as high as 965 degrees C, ... Chapter

CMOS-MEMS High Gee Capacitive Accelerometers

Amy Wung

A report submitted in partial fulfillment of the requirements of the degree of:

MASTER of SCIENCE

in

ELECTRICAL AND COMPUTER ENGINEERING

at

CARNEGIE MELLON UNIVERSITY

Advisor: Prof. G. K. FedderReader: Tamal Mukherjee

December 23, 2007

i

Dedicated to my parents, Edward and Bea Wung, and my brother Derek Wung for their encouragement and love.

ii

Abstract

This report describes the design and testing of a tri-axial high gee integrated CMOS-MEMS capac-

itive accelerometer. Military and industrial applications, such as vehicle crash and safety testing and

in-flight munitions testing, require inertial sensors capable of measuring accelerations up to 20,000

gee’s, where 1 gee = 9.8 m/s2. Commercial piezoresistive high gee MEMS are not integrated with the

sense electronics on a single chip. The CMOS-MEMS capacitive accelerometer design has the advan-

tage of smaller size, weight, and reduced parasitics due to single-chip integration.

The high gee accelerometer capacitive design is a new derivative of previous work at Carnegie

Mellon University on low gee capacitive accelerometers. The structure of this high gee accelerometer

departs from traditional low gee plate and comb drive capacitive sensing accelerometers, instead tak-

ing the form of an array of cantilever structures. The cantilever’s reduced mass and increased stiffness

increases the sensitivity range to the desired 20,000 gee’s. An array of cantilever structures is electri-

cally connected in parallel to obtain larger capacitive sensitivity.

The design methodology presented in this paper will demonstrate the theory and simulations used

to optimize the cantilever mechanical structures and capacitive sensing method. Preliminary electrical

and shock testing results in the 50-30,000 gee range will be presented to show functionality and linear-

ity of the sensor.

Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii

Chapter 1: Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Objective .....................................................................................................1Motivation ...................................................................................................1Previous work .............................................................................................2CMOS-MEMS process ...............................................................................3CMOS-MEMS high gee accelerometer design ..........................................4

Chapter 2: Mechanical Design . . . . . . . . . . . . . . . . . . . . . . . 8Inertial sensor mechanical structures ..........................................................8Lateral high g-force accelerometer mechanical design issues ..................15Vertical accelerometer mechanical design issues .....................................19

Chapter 3: Capacitive Sensing . . . . . . . . . . . . . . . . . . . . . . 21Principle of capacitive sensing .................................................................21Lateral high-gee accelerometer capacitive sensing ..................................21Vertical high-gee accelerometer capacitive sensing .................................26Sense Circuitry ..........................................................................................29

Chapter 4: Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Zero input testing ......................................................................................32Shock Testing ...........................................................................................37.Future Work .............................................................................................41.Conclusions ..............................................................................................41Acknowledgments ....................................................................................42

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Chapter 1 Introduction

1.1 ObjectiveThis report details the accomplishments in the design and testing of a unique CMOS-MEMS high

gee accelerometer that is integrated with circuitry on a single chip. The design challenges of the accel-

erometer involve designing a mechanically robust structure that responds linearly to an input accelera-

tion, with a maximum detectable acceleration of 20,000 gees.

1.2 MotivationInertial sensors embedded within munitions allow in-flight measurement of performance metrics,

such as pitch, yaw, and thrust, during free-flight. There are stringent design requirements imposed on

inertial sensors used to measure munition movements in-flight. Foremost is the need to miniaturize,

since very little room in a munitions device is given over for sensing and metrics. Power consumption

is also limited. Further, the inertial sensors must be designed to sense accelerations as high as tens of

kilo gees, and be robust enough to withstand these same accelerations repeatedly. Cost is another

pressing design issue, as with any emerging technology. Finally, the inertial design seeks to be easily

customizable. The accelerometer design’s sensitivity should be easily adjustable to the desired testing

range. Similarly, the electronics should exist as a re-usable block for magnetometers, gyroscopes, and

other sensors.

1 Introduction

1


The design goals for this high gee accelerometer is to achieve tri-axial sensing with integrated cir-

cuitry on a single die of volume less than 250 mm3, and weight less than 18 mg. The desired maximum

detectable acceleration in all three axes is 20,000 gees.

1.3 Previous workThe majority of commercially available inertial sensors are limited by a sensing range of plus or

minus 250 gees or less, where 1 gee = 9.8 m/s2. This sensing range is too limited for the high accelera-

tion and roll environment of in-flight munitions testing. The most common design for accelerometers

with a high sensing range utilizes piezoresistive sensing methods. Alberta Microelectronic Centre has

demonstrated silicon piezoresistive accelerometers that are capable of sensing accelerations up to

106 gee with operating voltages of 5 V, and are as small as 300 by 300 microns [5]. Endevco makes a

variety of commercially available silicon piezoresistive and piezoelectric accelerometers, with differ-

ent sensitivity ranges for different applications [6].

Piezoresistive accelerometer designs achieve many of the previously mentioned goals, most nota-

bly the size and sense range requirements. However tri-axial modules do not have the necessary sense

range. Endevco’s tri-axial piezoresistive accelerometer models are limited to 2000 gee’s, and weighs 8

grams [6],[7]. Another drawback is that the electronics associated with piezoresistive accelerometers

are not integrated on the same chip as the mechanical sensor. For the Alberta Microelectronic Centre’s

piezoresistive accelerometer, the piezoresistor deposition requires temperatures as high as 965 degrees

C, much too high for the deposition to be a post-CMOS process [5]. Endevco’s Model 7264A piezore-

sistive accelerometer is fabricated using silicon bulk micromachining processing, and housed between

two additional silicon layers, with exposed bonding pads to interface with external circuitry [8]. In

contrast, this project’s goal is to design a CMOS-MEMS sensor design with integrated circuitry. Inte-

grating the sensor and circuitry on a single chip allows for lower costs, smaller packaging, and

increased signal-to-noise ratio due to less parasitics. This report will describe the design methodology,

2


including both theory and simulation, and conclude with preliminary shock testing results up to 200

gees.

1.4 CMOS-MEMS processThe CMOS-MEMS process for designing inertial sensors satisfies all the previously mentioned

requirements. The ability to fabricate the circuitry and mechanical sensor simultaneously allows for a

much smaller device. An additional advantage of the small size is the shorter interconnect distance,

thereby reducing the effects of parasitic resistances and capacitances. The fabrication technique is cost

effective, because it uses generic CMOS processing techniques, and also because the sensor and its

accompanying circuitry is fabricated on a single chip. There is some post-processing involved to

release the structures, but the additional cost of the post-processing is negligible compared to CMOS

processing, packaging, and testing costs. Finally the design is customizable, because its sensitivity

range can easily be adjusted by adjusting the dimensions of the device.

Researchers at Carnegie Mellon University have previously designed working CMOS-MEMS

accelerometers [1], resonators [2], and chemical sensors [3], all fabricated in generic CMOS foundries

and post-processed in the Carnegie Mellon University clean room. The MEMS devices described here

are fabricated in the Jazz Semiconductor SiGe BiCMOS process, which includes 4 metal layers. After

the chips are processed in the CMOS foundry, there remains some post processing for microstructural

release. Post processing involves a vertical oxide etch to define the mechanical structures, followed by

a timed vertical silicon etch and an isotropic silicon etch to release the mechanical structures. Metal

layers are used as a mask to define the structure [4]. The top metal layer is used to protect the circuitry

from being etched away during the post-processing. Figure 1.1 details each step of this process.

3


Figure 1.1 (a) Cross-section of integrated CMOS-MEMS chip after foundry processing. (b) Cross-

section after vertical silicon dioxide etch. (c) Cross-section after vertical silicon etch. (d) Cross-section

after isotropic silicon undercut etch [4].

1.5 CMOS-MEMS high gee accelerometer designThe CMOS-MEMS high gee accelerometer design builds heavily on a CMOS-MEMS low gee

accelerometer designed in 2005. [1] The design, in contrast with other piezoresisitive high gee sensors,

uses capacitive sensing methods. The capacitive sensing design principle is detailed in Chapter 3. The

mechanical topology deviates from traditional capacitive sensing accelerometers, which use comb

drives attached to a large movable plate mass anchored by springs. In order to increase the sensitivity

range of the accelerometer, the high gee accelerometer design uses instead an array of separately

anchored comb fingers which are capable of bending under high gee forces.

4


Figure 1.2 (a) Top-view finite-element simulation of CMOS-MEMS high gee lateral accelerometer

design under 1000 gees of acceleration in the y-axis. Color scale indicates lateral deflection. (b) Top-

view finite-element simulation of CMOS-MEMS high gee vertical accelerometer design under

1000 gees of acceleration in the z-axis. Color scale indicates out-of-plane deflection amplitude.

(a)

stator electrode

stator electrode

suspensionbeam

movingelectrode

movingelectrode

Max:7.70 nm

Min:0 nm

stator electrode

stator electrode

suspensionbeam

movingelectrode

movingelectrode

Max:7.70 nm

Min:0 nm

stator electrode

stator electrode

suspensionbeams

movingelectrode

movingelectrode

Max: 18.62 nm

Min: 0 nm

stator electrode

stator electrode

suspensionbeams

movingelectrode

movingelectrode

Max: 18.62 nm

Min: 0 nm(b)

5


The lateral and vertical accelerometer comb finger structures are pictured in Figure 1.2. Scanning

electron microscope (SEM) photographs of the fabricated accelerometers are pictured in Figure 1.3.

The lateral comb finger structure has a center suspension beam, and electrodes on either side. The sus-

pension beam is narrower than the electrodes, so that the electrodes do not bend significantly com-

pared to the suspension beam. Similarly, the vertical comb finger structure has thin suspension beams

and thick electrodes. There are two sets of suspension beams on the vertical comb finger, for vertical

curl matching. The mechanical principle of operation for each device is further discussed in Chapter 2.

Figure 1.3 Scanning electron microscope (SEM) photographs of a section of the fabricated (a)

1.0 mm x 0.2 mm lateral accelerometer array and (b) 1.2 mm x 0.2 mm vertical accelerometer array.

This report will discuss the mechanical design challenges in creating a robust structure that

achieves a sense range of up to 20,000 gees. Another design obstacle evolved from imperfections in

the CMOS fabrication process and the post-processing, resulting in lateral curl in the rotor beams. The

electrical design challenges include an improved understanding of the capacitance between CMOS

metal-oxide stacks, and how the capacitance changes with changing gap and overlap area.

Tri-axial accelerometers with integrated circuitry have been fabricated and tested. The sense cir-

cuitry has been tested with zero input acceleration, and the integrated CMOS-MEMS lateral acceler-

ometer has been shock tested at accelerations below 200 gees. The integrated CMOS-MEMS vertical

(a) (b)

6


accelerometer has been shock tested at accelerations below 30,000 gees. Initial shock testing has

shown functionality of the integrated CMOS-MEMS high-g accelerometers.

7

Chapter 2 Mechanical Design

2.1 Inertial sensor mechanical structuresLow gee accelerometers

A common surface-machined low gee accelerometer structure is a plate mass, with comb capacitive

transducers on two opposite sides and anchored by springs on the other two sides. Figure 2.1 shows a

simplified picture of such an accelerometer structure, with only a portion of the comb drive pictured.

Figure 2.1 A simplified comb drive accelerometer model, where the movable comb fingers and

anchored comb fingers form a capacitive divider, and an external acceleration changes the capacitance.

Only one set of comb fingers are shown for simplicity.

The capacitive comb fingers that are attached to the plate interlace with the anchored comb fingers,

making up a differential capacitive divider. An external acceleration causes the plate and comb fingers

2 Mechanical Design

y

xdeflection

y

y

xdeflection

y

8


to move with respect to the anchored comb fingers. The change in gap results in a change in capaci-

tance, which can be measured to determine the direction and magnitude of the external acceleration.

This method of capacitive sensing is further discussed in Chapter 3.

Lateral high gee accelerometers

For the low gee accelerometer in Figure 2.1, the upper limit of the sensitivity range is determined

by the maximum free range of movement of the plate mass. Assuming the accelerometer is at rest, the

gap between comb fingers is go. The desired high gee accelerometer specification is to displace a dis-

tance less than go under a 20 kilo gee input acceleration.

The displacement sensitivity of the low gee accelerometer, to first order, is given by the following

equation:

. (2.1)

where Δx is the plate’s displacement due to an input acceleration a. The accelerometer displace-

ment in (2.1) is dependent on the structure’s mass m and the spring constant k. The maximum detect-

able acceleration is therefore:

. (2.2)

As an example, a CMOS-MEMS accelerometer with plate length of 260 µm and a plate width of

220 µm has a resonant frequency of 12.7 kHz. [1] The plate mass therefore moves approximately

1.5 nm per gee. The gap between comb fingers at rest is 1.5 µm, which means that the maximum

detectable acceleration for this sensor is 1,000 gees.

In order to modify this design to function under input accelerations of over 20 kilo-gees, the ratio of

stiffness to mass must be increased. The mass of the device is dominated by the large plate, and the

Δxa

------ mk---- 1

ωr2------= =

amax g0 ωr( )2×=

9


mechanical stiffness is determined by the springs. The simple solution would be to increase the stiff-

ness of the springs, and decrease the size of the plate mass. However, decreasing the size of the plate

mass would decrease the number of comb fingers that can fit on the side of the plate, thus decreasing

the total sense capacitance. This has an adverse effect on the sensitivity, as described further in Chapter

3. Increasing the stiffness of the springs is possible by changing the geometry of the springs. However

the springs should not be designed such that the nonlinearities from extensional stress become signifi-

cant, as the plate movement would no longer be linear with acceleration. Thus there are limits to

changing the plate and spring dimensions without having adverse effects of the sensor performance.

Another idea is to take the goal of a stiff, less massive structure, to the practical limit - which would

be a single cantilever beam. The design concept chosen is to create a sensor from an array of anchored

cantilevers. The effective mass of the cantilever and its stiffness then determines the resonant fre-

quency and displacement sensitivity.

Figure 2.2 Top view finite element simulation of a 60 μm long, 2 μm wide free-end cantilever

bending under a 1000 gee input acceleration, next to two stator structures. The color scale indicates lat-

eral deflection.

stator electrode

stator electrode

Max: 2.0 nm

Min: 0 nm

stator electrode

stator electrode

Max: 2.0 nm

Min: 0 nm

10


A simple free-end cantilever exhibits design problems, however. Under an external acceleration,

the free end will deflect, while the anchored end remains in place. Thus the sidewall of the rotor canti-

lever will no longer be parallel to the stator, as seen in Figure 2.2. It would not be correct to assume

parallel-plate operation between the rotor and stator electrodes in Figure 2.2. In parallel-plate opera-

tion, the capacitance for the capacitance between electrodes is given by:

(2.3)

where t and L are the dimensions of the plate, and g is the distance between the plates. It will be shown

in Chapter 3 that for small changes in g, the parallel-plate capacitance changes nearly linearly. The

capacitance for a tilted-plate capacitor is given by:

(2.4)

where g is the average distance between the plates, and θ is the angle formed by the plates. Even for

small values of θ, the capacitance does not change linearly with θ [9]. Therefore, without parallel plate

operation, the output will not be linearly proportional to the input acceleration.

The free-end cantilever design, then, must be modified to ensure that the sidewall of the rotor will

remain parallel to the stator, even under a large input acceleration. The first generation of modified

cantilever structures for a lateral high gee accelerometer was discussed briefly in a previous paper

from Carnegie Mellon University [1]. The lateral high gee accelerometer design is made up of an array

of 80 rotor fingers, where a single comb finger structure is pictured in Figure 1.2(a). The cantilever

structure’s suspension beam is narrow, while the side electrodes are wider and do not bend signifi-

cantly. The most significant deflection comes from bending in the center beam. The shape of the elec-

trodes are designed with the intent to balance the moments on both ends of the center beam, creating a

C εLtg

--------=

C εtLθ

-------- 2g Lθ+2g Lθ–-------------------⎝ ⎠

⎛ ⎞ln≈

11


guided-end condition on the beam. With the center beam deflecting under guided-end conditions, the

side electrodes will move laterally, parallel to the stators. Thus the design preserves the parallel-plate

operation.

The FEMLAB simulations shown in Figure 2.3 illustrates the mechanical design principle. The dis-

placement plot of the bending beam in Figure 2.3(a) shows the guided-end bending caused by the bal-

ancing of moments. The displacement plot of the electrode in Figure 2.3(b) shows that the side

electrodes have approximately the same displacement along its entire length. The displacement is not

exactly uniform over the length of the electrode, but the difference in displacement is within 5% of the

total deflection. From these simulations, the displacement sensitivity of the accelerometer is approxi-

mately 6.4 pm/gee.

12


Figure 2.3 Finite element results for lateral accelerometer cantilever structure bending under

1000 gees input acceleration. a) Plot of lateral displacement of the side electrode. b) Plot of lateral dis-

placement of the center suspension beam.

Vertical high gee accelerometer

The vertical high gee accelerometer’s design was initiated by Tsai [1]. It operates on much the same

principle as the lateral high gee accelerometer. The accelerometer is an array of 112 rotors, where a

single set of fingers are pictured in Figure 1.2(b). The side electrodes are much thicker in the z-axis

than the suspension beams, which ensures that the electrodes do not bend significantly. The mass of

6.0

5.0

4.0

3.0

2.0

1.0

0

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50 60 x-position [μm]

6.0

5.0

4.0

3.0

2.0

1.0

0

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50 60 x-position [μm]

6.55

6.5

6.45

6.4

6.35

6.3

6.25

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50 60 x-position [μm]

6.55

6.5

6.45

6.4

6.35

6.3

6.25

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50 60 x-position [μm]

(a)

(b)

13


the side electrodes are designed to create balancing moments on the suspension beams, to satisfy the

guided-end condition, as demonstrated in the simulation results pictured in Figure 2.4(b). The elec-

trode displacement shown in Figure 2.4(c) is nearly equal along the length of the electrode, within 2%

of the total displacement. The displacement sensitivity is approximately 18.5 pm/gee from the finite

element simulation.

Figure 2.4 Finite element results for vertical accelerometer cantilever structure bending under

1000 gees input acceleration. a) Plot of out-of-plane displacement of the side electrode. b) Plot of out-

of-plane displacement of the center suspension beam.

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50x-position [μm]

16.0

14.0

12.0

10.0

8.0

6.0

4.0

2.0

0

y-di

spla

cem

ent [

nm]

0 10 20 30 40 50x-position [μm]

16.0

14.0

12.0

10.0

8.0

6.0

4.0

2.0

0

y-di

spla

cem

ent [

nm]

18.6

0 10 20 30 40 50x-position [μm]

18.5

18.5

18.5

18.5

18.5

y-di

spla

cem

ent [

nm]

18.6

0 10 20 30 40 50x-position [μm]

18.5

18.5

18.5

18.5

18.5

(a)

(b)

14


2.2 Lateral high g-force accelerometer mechanical design issuesAn undesirable effect of process variation on the high gee CMOS-MEMS accelerometers is the

presence of lateral curl in the lateral accelerometers. In the first generation design of the lateral acceler-

ometer, the suspension beam has a length of 60 µm. The CMOS-MEMS beam includes metal 1, 2, and

3 layers, where metal 1 is 1.2 µm wide, metal 2 is 1.0 µm wide, and metal 1 is 0.8 µm wide, as illus-

trated in Figure 2.5 (a). Significant lateral curl has been observed for these dimensions, as pictured in

Figure 2.5.

Figure 2.5 (a) Cross-section illustration of suspension beam, showing the stepped metal widths.

(b) SEM photograph of first generation lateral high g-force CMOS-MEMS accelerometer design,

showing significant lateral curl. (c) SEM photograph of the same structure, with greater magnification,

illustrating the unequal gaps between the rotor and stators.

Lateral curl can be the result of several causes, including electrostatic forces from dielectric charg-

ing, and fabrication misalignment of the metal layers. The observed curl is consistent in direction and

deflection for all released devices from the same processing run. This evidence suggests that the cause

of the lateral curl in the lateral high g-force accelerometers is due to variation during processing, possi-

bly due to metal layer misalignment and stress gradients.

M etal3

M etal2

M etal1

0.1 μm

0.1 μm

M etal3

M etal2

M etal1

M etal3

M etal2

M etal1

0.1 μm

0.1 μm

(a) (b) (c)

15


Figure 2.6 (a) SEM photographs of test structures with the same dimension as those pictured in

Figure 2.5, processed at the same foundry but in a later processing run. (b) Greater magnification of

the vernier fingers attached to the pictured structures in (a). The vernier fingers are 1 μm wide.

Figure 2.7 a) Top view SEM photograph of a second generation of test structures. b) Greater mag-

nification of the vernier fingers attached to the pictured structures in (a). The vernier fingers are 1 µm

wide at the base, and taper to 0.5 µm wide at the tip.

There is notable variation between processing runs, which also indicates the problem is in metal

layer misalignment or stress gradients. Figure 2.6 and Figure 2.7 both show SEM photographs of sim-

ilar structures from two different processing runs. The devices in Figure 2.6 show approximately

0.8 μm deflection at the tip. In comparison, the devices in Figure 2.7 show less than 0.1 μm deflection

at the tip, although the structures in Figure 2.6 have equivalent dimensions.

(a) (b)

(a) (b)

16


Metal layer misalignment, material stress gradients, and other processing variation in the CMOS-

MEMS process will always be present. The designer does have options however to mitigate the effects

of process variation. One option, which all the structures above already take advantage of, is to make

each metal layer slightly narrower than the metal layer below it. In the accelerometer designs, the

metal 1 layer is 0.2 µm wider than the metal 2 layer, which is in turn wider than 0.2 µm wider than the

metal 3 layer. This cross-section is pictured in Figure 2.5 (a). Assuming that the metal offset between

layers due to process variation is not greater than 0.1 µm, the edges of each metal layer are uncon-

strained allowing the relaxation of axial stress without significant lateral curl. The first generation

accelerometer design already makes use of this design trick, however there is still significant curl, even

when the cross section in Figure 2.8 shows that the misalignment between metal layers is not greater

than 0.1 µm.

The cross-section shown in Figure 2.8 was taken using a focused ion-beam to slice through the sus-

pension beam of a lateral high g-force accelerometer. Although the cross-section shows that the metal

layer misalignment is less than 0.1 µm, several other process non idealities can be observed from cross

section. There is a visible sidewall on the left side of the structure, of approximately 0.1 µm thickness.

The sidewall is either polymer redeposited during the release process, or is an artifact of the FIB cross

section. Due to charging from the nearby structure, it is unclear from the photo if the sidewall is sym-

metrical on both sides. Additionally, the bottom metal in the stack does not have a clear cut vertical

17


sidewall. The top and bottom Ti/W metal barrier layers are wider than the aluminum metal layer. Fur-

thermore, there is a dark area to the left of the bottom metal layer, which could possibly be oxide.

Figure 2.8 Cross-section of a lateral high gee accelerometer. The shadow on the right side is the

unanchored section of the accelerometer that has been cut off, but did not fall into the silicon etch pit

below.

Because the exact cause of the lateral curl is still unknown, the simplest solution to prevent lateral

curl is to widen the suspension beam of the accelerometer. The design of the second-generation lateral

accelerometer suspension beam has a 2.0 µm-wide metal 1 layer, a 1.8 µm-wide metal 2 layer, and a

1.6 µm-wide metal 3 layer. The new design is extremely conservative, with the suspension beam being

almost twice as wide as its predecessor. Since this design change, the offset of the released high gee

lateral accelerometers has been reduced to less than 0.1 µm. The wider structures have been verified to

release using the standard post-CMOS MEMS processing.

18


2.3 Vertical accelerometer mechanical design issuesIn the case of the vertical accelerometer, the 1.2 μm wide, 60 μm long, suspension beams are

expected to curl significantly out of plane of the chip. The curl is due to differing residual and thermal

expansion stress in the metal and oxide layers that compose the beam. Since those beams only contain

one metal layer and one oxide layer, the stress gradient is sufficient to produce a relatively large

amount of vertical curl. For this reason, there are two sets of bending beams in series to provide curl-

matching. Because the curl-matching beams are all the same dimensions, they will curl equally, and

the side electrodes will remain parallel to the substrate after releasing. This design implementation of

curl matching does come at the sacrifice of extra layout area. A perspective view of the released canti-

lever structure is shown in Figure 2.9.

Figure 2.9 Perspective view of high-gee vertical accelerometer cantilever structures.

These structures have been verified to release using the standard post-CMOS MEMS processing.

Figure 2.10(a) shows the measured topology of a released high-gee vertical accelerometer. The mea-

surement equipment has an x-y resolution of approximately 1 µm, which is why the topology image is

not clearly defined. The structures on the right side of the image are the most clearly in focus, which is

where displacement was measured along the curl-matching beams. The displacement of the curl-

matching beams is shown in Figure 2.10(b) and (c) to be approximately equal, so that the electrodes

remain in the same plane as the stators.

19


Figure 2.10 (a) Measured vertical displacement of a released high-gee vertical accelerometer using

a Veeco NT 3300 white light interferometer. (b) Measured displacement of the curl-matching beams

located at cross-section A-A’. (c) Measured displacement of the curl-matching beams located at cross-

section B-B’.

(a)

(b)

(c)

20

Chapter 3 Capacitive Sensing

3.1 Principle of capacitive sensingCapacitive sensing is commonly used in the design of MEMS sensors as a low-power method of

converting mechanical movement to electronic signals. It is especially useful for inertial sensors

because the resulting voltage change will be, to first-order approximation, proportional to the external

acceleration. The high-gee accelerometers described in this paper use the same electrical connections

to form the capacitive bridge as the low-gee accelerometers designed by Tsai [1].

3.2 Lateral high-gee accelerometer capacitive sensingFor the lateral high-gee accelerometer, the design principle is to sense the change in capacitance

caused by an increase or decrease in the gap between comb fingers. Figure 3.1 shows the electric con-

nections in the comb fingers that create the capacitive bridge in the lateral accelerometer. In the cross

section in Figure 3.1(b), capacitance C1 decreases and capacitance C2 increases as the rotor moves to

the left.

For the purposes of calculating the accelerometer’s sensitivity, it is necessary to know the rest

capacitance of each node in the capacitive bridge, and the parasitic capacitance of the output node, Vo,

to ground. The magnitude of the rest capacitance is difficult to calculate by hand accurately, because of

the alternating layers of conducting metal and insulating silicon dioxide, as well as the different widths

between layers. Finite element simulation is used to determine capacitance between the electrodes.

3 Capacitive Sensing

21


Figure 3.1 (a) Top-view of a single cantilever in the lateral accelerometer array, with cross-section

marked. (b) Cross-section of one rotor finger between two stators which form the comb drive capaci-

tive bridge used to sense acceleration along the y-axis. Vo represents the sense output voltage, and Vm

is the modulation voltage which powers the capacitive bridge.

The 2-dimensional electrostatic simulation results, pictured in Figure 3.2, give the effective capaci-

tance between a single stator and rotor sidewall to be 2.4 fF, taking into account the stepped metal

widths. In comparison, the parallel-plate approximation, using the minimum gap of 1.0 μm, estimates

the capacitance to be 2.6 fF. Using the maximum gap of 1.4 μm, the parallel-plate approximation esti-

mates the capacitance to be 1.9 fF. For one side of the differential output, there are 40 total cantilever

structures electrically connected in parallel in a single lateral high gee accelerometer. Each capacitor in

the capacitive bridge in Figure 3.3 represents a total capacitance of 40 cantilever structures with elec-

z

y

z

y

(b)

y

x

y

x

A

A’

A

A’(a)

deflection y

C2C1

+Vm +Vm

-Vm-Vm

Vo Vo VoA A’

22


trodes connected in parallel. For the differential output, the two capacitors C1A and C1B are matched

and behave identically under an input acceleration. The two capacitors C2A and C2B are matched as

well. At rest, the capacitors each have capacitance Co = 97 fF.

Figure 3.2 Two-dimensional electrostatics simulation of a single rotor between two stator fingers.

The color scale indicates the electric potential.

23


Figure 3.3 Schematic representation of capacitive bridge formed by two sets of 40 parallel cantile-

ver structures having parallel electrodes in the lateral high gee accelerometer.

The accelerometer’s sensitivity also depends on how that capacitance changes with the input accel-

eration. This design achieves first-order linear changes in capacitance in response to acceleration. By

approximating the metal stacks as a parallel-plate capacitor, its capacitance is given by (2.3).

When the electrode displaces by a distance , the capacitance change is,

(3.1)

assuming that . This is a reasonable assumption. For example, the FEA simulations discussed in

Chapter 2 give the displacement sensitivity of the rotor to be 6.4 pm/gee for the lateral accelerometer.

For a 20,000 gee input acceleration, the displacement will be 128 nm, which is much less than the

1.5 μm at rest gap. Substituting (2.1), the change in capacitance is, to first order, proportional to accel-

eration:

. (3.2)

V m

-V m

V o +

V o -

C 1 A

C 1 BC 2 A

C 2 B

4 0 c a n ti lev e rs tru c tu resh a v in gp a ra lle le le c tro d e s

4 0 c a n ti le v e r s tru c tu re sh a v in gp a ra lle le le c tro d es

V m

-V m

V o +

V o -

C 1 A

C 1 BC 2 A

C 2 B

4 0 c a n ti lev e rs tru c tu resh a v in gp a ra lle le le c tro d e s

4 0 c a n ti le v e r s tru c tu re sh a v in gp a ra lle le le c tro d es

Δx

ΔC εAg Δx–--------------- εA

g------– εA Δx⋅

g g Δx–( )----------------------- εA Δx⋅

g2-----------------≈ CoΔxg

------= = =

Δx g«

ΔC εAg2------ a

ωr2------⋅=

24


Repeating the 2-d finite element simulation in Figure 3.2 while changing the gap between the metal

stack cross-sections gives the change in sidewall capacitance per length over input accelerations. Mul-

tiplying the capacitance per length by the length of the electrode and by the number of cells in the array

gives the data in Figure 3.4, where the capacitance of C1A and C2A is plotted over input accelerations

of gees. The correlation coefficient of both curves in Figure 3.4 are 0.998.

Figure 3.4 Capacitance of C1A and C2A in the lateral accelerometer capacitive bridge, with respect

to input acceleration.

The output voltage of the capacitive bridge will also change linearly. Due to charge conservation on

the high impedance output node, the voltages on the capacitors are constrained by the following rela-

tion:

. (3.3)

where Vo is the one-sided voltage output of the differential capacitive bridge, Vm is the signal powering

the capacitive bridge, Co is the capacitance of C1 and C2 at rest, and ΔC is the change in capacitance

20 000,±

90.092.094.096.098.0

100.0102.0104.0106.0

-20.0 -10.0 0.0 10.0 20.0input acceleration (kilo-g's)

Cap

acita

nce

(fF)

C1AC2A

Vm Vo–( ) Co ΔC+( ) Vo Vm+( ) Co ΔC–( )=

25


due to an input acceleration. Including the effect of parasitic capacitance Cp between the output node

Vo and ground gives:

. (3.4)

Substituting (3.1), Vo reduces to:

(3.5)

From Chapter 2, it is known that each rotor in the lateral accelerometer will displace by 6.4 pm/gee.

The comb finger gap at rest is 1.5 m. Assuming Vm is a 1 V amplitude sinusoid and zero parasitic

capacitance to ground, Vo+ and Vo- will be sinusoids whose amplitude sensitivity is 4 V/gee. The dif-

ferential output will be a sinusoid with an amplitude sensitivity of 8 μV/gee.

3.3 Vertical high-gee accelerometer capacitive sensingThe vertical accelerometer senses acceleration through changing the overlap between comb fingers,

rather than the gap distance. The electrical connections in the comb drive capacitive bridge are also

different, as shown in Figure 3.5(b). Approximating the metal-oxide stacks as parallel-plate capacitors,

the change in capacitance is calculated by

(3.6)

where Lo indicates overlap distance, t indicates the comb finger thickness, and represents the verti-

cal displacement. The change in capacitance is shown to be proportional to the vertical displacement.

Vm Vo–( ) Co ΔC+( ) Vo Vm+( ) Co ΔC–( ) VoCp+=

Vo

VmΔxg

------⋅

1 Cp 2Co( )⁄+----------------------------------=

μ

μ

ΔCε Lo t⋅( )

g-------------------

ε t Δz+( ) Lo⋅g

--------------------------------–εLo Δz⋅

g-------------------–= =

Δz

26


Replacing Δx with Δz, (3.4) and (3.5) hold true for the vertical accelerometer, so that the one-sided

output voltage of the differential capacitive bridge is given by

(3.7)

For one side of the differential output, there are 112 total cantilever structures electrically connected in

parallel in a single vertical high gee accelerometer. Again, the capacitors C1A and C2A in the capacitive

bridge in Figure 3.6 each represent the total capacitance of the 56 electrode capacitances in parallel.

The two cross-sections in Figure 3.5(b) and (c) are designed such that the total capacitance of C1A and

C2A will be matched.

Repeated 2-d finite element simulations while varying the overlap area between cross-sections

gives the change in sidewall capacitance per length over input accelerations. Multiplying the capaci-

tance per length by the length of the electrode and by the number of cells in the array gives the data in

Figure 3.6, where the capacitance of C1A and C2A is plotted over input accelerations of gees.

The plot has a correlation coefficient of 0.998 for both curves.

Vo

VmΔzg

------⋅

1 Cp 2Co( )⁄+----------------------------------=

20 000,±

27


Figure 3.5. (a) Top-view of a two cantilevers in the vertical accelerometer array, with cross-sec-

tions marked. (b) Cross-section of the comb drive capacitive bridge used to sense acceleration along

the z-axis. Again, Vo represents the sense output voltage, and Vm is the differential modulation voltage

which powers the capacitive bridge. (c) Cross-section of a different cell in the cantilever array, show-

ing different electrical connections.

A

A’

A

A’(a)

y

x

y

x

z

y

z

y

(b) (c)

z

y

z

y

+Vm

-Vm

Vo

C1

C1

C2

C2

+Vm

-Vm

Vo

28


Figure 3.6 Capacitance of C1A and C2A in the vertical accelerometer capacitive bridge, with respect to

input acceleration.

From the finite element simulations described in Chapter 2, it is known that each rotor in the verti-

cal accelerometer will displace by 18.5 pm/gee. The comb finger thickness if 4.8 μm. Assuming Vm is

a 1 V amplitude sinusoid and no parasitic capacitance to ground, Vo+ and Vo- will be sinusoids whose

amplitude sensitivity equals 3.75 μV/gee. The differential output will be a sinusoid with an amplitude

sensitivity of 7.5 μV/gee.

3.4 Sense CircuitryAs shown in Figure 3.3, the accelerometer capacitive bridge is driven by the modulation signal Vm,

which is generated on-chip. A block diagram of the described on-chip circuitry is shown in Figure 3.7.

The circuitry was designed specifically for this application by Rudolph Park at John Hopkins Applied

Physics Lab. A ring oscillator generates a 1.6 V amplitude, 10 MHz clock, and a clock divider allows

the user to tune the frequency of the modulation signal to be 10 MHz or less. For testing, the modula-

tion frequency was set at 1.7 MHz, to decrease the impact of 1/f noise. This frequency is higher than

94.096.098.0

100.0102.0104.0106.0108.0110.0

-20.0 -10.0 0.0 10.0 20.0input acceleration (kilo-g's)

Cap

acita

nce

(fF)

C1AC2A

29


the flicker noise corner frequency, so that only thermal effects generate noise in the transistors [1]. The

capacitive bridge output, therefore, should be a square wave at the modulation frequency, with ampli-

tude that varies with input acceleration.

The common-mode control circuitry periodically switches the capacitive bridge outputs to a bias

voltage, to control drift due to charging. The frequency of the common-mode switches is also select-

able by the user.

The capacitive bridge output is amplified by an on-chip amplifier with a gain of 3.6 for the lateral

accelerometer, and gain 23 for the vertical accelerometer. The difference in gain is due to the initial

expectation that the vertical accelerometer capacitive bridge output would be less than the lateral

accelerometer capacitive bridge output. The finite element simulations in Sections 3.2 and 3.3 which

show the vertical accelerometer gain is higher were not performed until later. The preamp output is

routed to a mixer, where the signal is demodulated. The mixer output contains a dc frequency compo-

nent, and a second component at twice the modulation frequency. A low pass filter, with gain of 2 and

bandwidth of 65 kHz, removes the second frequency component, leaving only the dc component,

which varies with input acceleration. The low pass filter provides the final output of the chip. The out-

put of each block is routed to a bondpad and available for testing. All the on-chip circuitry share a

power supply of 3.3 V.

30


Figure 3.7 Block-level diagram of complete on-chip circuitry.

Using the values of capacitance of C1A and C2A from Figures 3.4 and 3.6, Cadence extraction and

circuit simulation is performed to determine the differential output of the sense circuitry. The simula-

tion includes the effects of parasitic capacitance.

The differential output of the low pass filter from Cadence extraction and circuit simulation is

33.2 μV/gee and 130 μV/gee for the lateral and vertical accelerometers, respectively. These simulated

sensitivity values will be compared to the measured sensitivity values in Chapter 4.

VoltageReference

CurrentReference

CommonMode Ctrl

ClockDivider

Clock10 MHz

MEMSCapacitive

Accelerometer

Amplifiergain = 3.6 (lateral)gain = 23 (vertical)

Demodulator

Low Pass FilterBW = 65 kHzgain = 2

31

Chapter 4 Testing

4.1 Zero input testingThree high-g CMOS-MEMS accelerometers and the corresponding sense circuitry have been fabri-

cated on a single CMOS chip of area 2.4 × 2.4 mm. The accelerometer chip was first tested with zero

input acceleration to measure bias offset. Due to processing mismatch between metal layers, there is a

slight mechanical offset in the capacitive bridge. The effect of this mechanical offset on the output is

the same as a constant input acceleration. The zero input differential output of the on-chip amplifier,

demodulator, and low pass filter for the lateral high-gee accelerometer are shown in Figures 4.1, 4.2,

and 4.3.

The amplifier outputs in Figure 4.1(a) and (c) show significant common-mode noise, which is

removed in the differential output in Figure 4.1(e). Figure 4.1(b), (d), and (f) show the spectre simula-

tions of the preamp for a constant input acceleration of 100 gees. In the spectre simulations, the differ-

ential output is expected to be a square wave, but the measured signal shows a slower time constant

than expected. Simulations show that the slower time constant is not due to capacitive loading from the

oscilloscope probe, so the cause is still unknown.

4 Testing

32

Chapter 4 Testing

Figure 4.1 Lateral high gee accelerometer amplifier output results. (a) Positive side of measured

amplifier output and (b) simulated amplifier output. (c) Negative side of measured amplifier output

and (d) simulated amplifier output. (e) Measured differential amplifier output and (f) simulated differ-

ential amplifier output. Simulated outputs are for 100 gee input acceleration.

The mixer outputs in Figure 4.2(a) and (c) also show significant common-mode noise, which are

removed in the differential output in Figure 4.2(e).

(a) (b)

(c) (d)

(e) (f)

33

Chapter 4 Testing

Figure 4.2 Lateral high gee accelerometer mixer output results. (a) Positive side of measured mixer

output and (b) simulated mixer output. (c) Negative side of measured mixer output and (d) simulated

mixer output. (e) Measured differential mixer output and (f) simulated differential mixer output. The

simulation output has acceleration input of 100 gees.

(a) (b)

(c) (d)

(e) (f)

34

Chapter 4 Testing

Figure 4.3 Lateral high gee accelerometer filter output results. (a) Positive side of measured filter

output and (b) simulated filter output. (c) Negative side of measured filter output and (d) simulated fil-

ter output. (e) Measured differential filter output and (f) simulated differential filter output.

The filter outputs in Figure 4.3(a) and (c), as expected, show the same common-mode disturbance

that is removed in the differential output shown in Figure 4.3(e). The filter output is biased at 175 mV.

Due to parasitic coupling to clocked signals on-chip, there is some measurement noise even in the filter

differential output, as is easily seen in the simulations in Figure 4.3 (f).

The common mode of the preamp, mixer, and filter outputs are compared in Figure 4.4. Although

there is a great deal of common mode disturbance generated, it is removed in the differential outputs.

(a)(b)

(c) (d)

(e) (f)

35

Chapter 4 Testing

The bias voltages and signal frequencies match simulation. While this testing does not prove function-

ality of the sensor, it does indicate that the electrical circuit design is performing as intended.

Figure 4.4 Lateral high gee accelerometer plots of measured common mode signals for the

(a) amplifier output, (b) mixer output, and (c) filter output.

(a)

(b)

(c)

36

Chapter 4 Testing

4.2 Shock TestingA drop tower mechanism was constructed at Carnegie Mellon University which allows shock test-

ing for both vertical and lateral high-gee accelerometers. The calibration accelerometer used for the

drop tower was an ADXL 8131, which has a maximum range of 250 gees.

Preliminary testing has been limited to maximum deceleration less than 200 gee’s. Because the

expected outputs are in the mV range, a differential amplifier with a gain of 100 was used to amplify

the differential output of the filter. For each drop test, a time response was recorded for both the

CMOS-MEMS high-gee accelerometer and the calibration accelerometer, as shown in Figures 4.5 and

4.6. The gain of 100 due to the off-chip differential amplifier was removed from the data shown in Fig-

ures 4.5 and 4.6. While the two accelerometers are mounted on different printed circuit boards on

opposite sides of the drop tower, the shock deceleration they both experience should be equivalent, to

first order. Since the sensitivity of the calibration accelerometer is known, the maximum deceleration

from a single drop test can be extracted from the output of the calibration accelerometer.

Figure 4.5 Time response of lateral high-gee CMOS-MEMS accelerometer differential output and

calibration accelerometer output for a single shock test with maximum deceleration of 191 gees.

-0.7

-0.6

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.000 0.005 0.010 0.015 0.020time (s)

CM

OS-

MEM

S hi

gh-g

ac

cele

rom

eter

out

put (

mV)

0.00

0.50

1.00

1.50

2.00

2.50

3.00

calib

ratio

n ac

cele

rom

eter

ou

tput

(V)

HighG Y-axis Differential Output (μV) Calibration Accelerometer Output (V)

37

Chapter 4 Testing

Figure 4.6 Time response of vertical high-gee CMOS-MEMS accelerometer differential output and

calibration accelerometer output for a single shock test with maximum deceleration of 179 gees.

The CMOS-MEMS accelerometer outputs with respect to input acceleration are plotted over sev-

eral drop tests in Figure 4.7. Using a linear fit, the accelerometer sensitivity is extracted from the slope

of the data. The linear fit for the measurement results in Figure 4.7 gives the correlation coefficient as

0.94 and 0.99 for the lateral and vertical accelerometers, respectively. The response of the lateral accel-

erometer includes increased measurement error, compared to the vertical accelerometer, due to added

noise from on-chip parasitic coupling between the differential output and other on-chip clocked sig-

nals. Both correlation coefficients are quite close to 1.0, and thus the sensors have shown linear behav-

ior below 200 gee’s.

The measured sensitivity of the lateral accelerometer is 3.0 μV/gee, compared to the simulated sen-

sitivity of 33.4 μV/gee, discussed in the previous chapter. The measured sensitivity of the vertical

accelerometer is 9.9 μV/gee, compared to the simulated sensitivity of 130 μV/gee. For both sensors,

there is about an order of magnitude difference between the measured and simulated sensitivity. The

cause of this discrepancy has not been determined.

-2.00-1.75-1.50-1.25-1.00-0.75-0.50-0.250.000.25

0.000 0.005 0.010 0.015 0.020time (s)

CM

OS-

MEM

S hi

gh-g

ac

cele

rom

eter

out

put (

mV)

0.00

0.50

1.00

1.50

2.00

2.50

3.00

calib

ratio

n ac

cele

rom

eter

ou

tput

(V)

HighG Z-axis Differential Output (mV) Calibration Accelerometer Output (V)

38

Chapter 4 Testing

Figure 4.7 Measured CMOS-MEMS high-gee accelerometer output with respect to maximum

deceleration over several drop tests for (a) lateral and (b) vertical accelerometers, with modulation fre-

quency of 1.7 MHz.

One possible cause is approximations made in the mechanical simulation, such as not including the

Ti/W metal barrier layers and not using the exact metal and oxide layer thicknesses, which were not

immediately available. The mechanical simulations were modified to include the average Ti/W, metal,

y = 3.0228x + 46.052R2 = 0.9377

0

100

200

300

400

500

600

700

0 50 100 150 200 250acceleration (g)

high

-g o

utpu

t (μV

)

y = 9.9141x + 105.38R2 = 0.9917

0

500

1000

1500

2000

2500

0 50 100 150 200acceleration (g)

high

-g o

utpu

t (μV

)

(a)

(b)

39

Chapter 4 Testing

and oxide layer thicknesses measured from past processing runs. The lateral accelerometer displace-

ment sensitivity in the modified simulation was 7.7 pm/gee, compared to 6.4 pm/gee from the simula-

tions in Chapter 2. The vertical accelerometer displacement sensitivity in the modified simulation was

16.5 pm/gee, compared to 18.5 pm/gee from the simulations in Chapter 2. The modified simulations

do not show an order of magnitude increase in displacement sensitivity, so it is unlikely that this is the

cause of the lowered measured sensitivity.

Another possible cause is that the amplifier gain is reduced from circuit simulations. Because the

amplifier inputs are not routed to bondpads, to minimize parasitic capacitance, the gain of the on-chip

amplifier has not been measured currently to verify this theory. To test this theory, additional drop tests

were conducted at a lower modulation frequency of 200 kHz, as opposed to 1.7 MHz. These drop tests

were conducted at the Army Research Laboratory on a full-suite drop tower with higher impact capa-

bilities. The drop test results, shown in Figure 4.8, show a measured sensitivity of 49.8 μV/gee for the

vertical accelerometer. This is still much lower than the simulated sensitivity of 130 μV/gee, but higher

than the sensitivity obtained with modulation frequency of 1.7 MHz. This indicates that the gain in the

electronics did contribute to the lower measured sensitivity in earlier drop tests. However it does not

fully explain the lower measured sensitivity for the vertical accelerometer. The vertical accelerometer

sensitivity remains to be investigated further.

The correlation coefficient for the measurement results in Figure 4.8 is 0.994. These results show

that the vertical accelerometer is functioning under shock accelerations beyond 30,000 gees.

40

Chapter 4 Testing

Figure 4.8 Measured CMOS-MEMS high-gee vertical accelerometer output with respect to maxi-

mum deceleration over several drop tests, with modulation frequency of 200 kHz.

4.3 .Future WorkTo investigate the discrepancy between simulated sensitivity and measured sensitivity, the resonant

frequency of the devices will be measured in the future. Amplifier gain will also be measured and

investigated as a possible source of reduced sensor sensitivity. The drop tower tests will be repeated

with an off-chip differential amplifier with a gain of 1000, to improve signal-to-noise ratio and obtain

more accurate sensitivity measurements. Performance reliability over time and temperature should be

investigated. Noise and cross-axis sensitivity should be characterized.

4.4 .ConclusionsA lateral and vertical high gee accelerometer capable of sensing accelerations has been designed

and shown to be functional at low input accelerations. The accelerometer design uses CMOS-MEMS

(a)

y = 0.0498x - 44.168R2 = 0.9938

0200400600800

10001200140016001800

0 10000 20000 30000 40000acceleration (g)

high

-g o

utpu

t (m

V)

41

Chapter 4 Testing

fabrication to be fully integrated with sense circuitry on a single chip, making the sensor sufficiently

small and lightweight for in-flight munitions testing. The tri-axial integrated sensor and circuitry have

been fabricated on a single 2.4 mm x 2.4 mm chip.

The work described here has been shown through hand calculation and FEA simulations to produce

an output signal whose voltage is linear to the external acceleration, up to 20,000 gees. Mechanical

curl due to processing variations has been reduced. Structural release has been achieved. Preliminary

testing indicates that the sense circuitry is functioning as expected, and that the accelerometer responds

linearly under input accelerations below 30,000 gee’s.

4.5 AcknowledgmentsThe work presented has been funded by the Test Resource Management Center (TRMC) Test and

Evaluation/Science and Technology (T&E/S&T) Program through the Naval Undersea Warfare Cen-

ter, Newport, Rhode Island, under the Army Research Laboratory. It has also been funded by a

National Science Foundation Graduate Fellowship. The author thanks Suresh Santhanam and the staff

of the Carnegie Mellon Nanofabrication Facility for processing assistance, and Rudolph Park and

Johns Hopkins University Applied Physics Laboratory for circuit design.

42

References

43

References[1] J. M. Tsai and G. Fedder, “Mechanical Noise-Limited CMOS-MEMS Accelerometers,” in

Technical Digest of the 18th IEEE International Conference on Microelectromechanical Sys-tems, 2005, pp. 630-633.

[2] C. Lo, F. Chen and G. Fedder, “Integrated HF CMOS-MEMS Square-Frame Resonators with On-Chip Electronics and Electrothermal Narrow Gap Mechanism,” in Technical Digest of the 13th International Conference on Solid-State Sensors, Actuators and Microsystems, 2005, pp. 2074-2077.

[3] S. Bedair and G. Fedder, “CMOS MEMS Oscillator for Gas Chemical Detection,” in Proceed-ings of the 3rd IEEE Sensors Conference, 2004, pp. 955-958.

[4] G. Fedder, S. Santhanam, M. L. Reed, S. C. Eagle, D. F. Guillou, M. S. Lu and R. Carley, “Laminated High-Aspect-Ratio Microstructures in a Conventional CMOS Process,” in Techni-cal Digest of the 9th IEEE International Workshop on Micro Electro Mechanical Systems, 1996, pp. 13-18.

[5] Y. Ning, Y. Loke, G. McKinnon, “Fabrication and characterization of high g-force, silicon piezoresistive accelerometers,” Sensors and Actuators A, vol. 48, pp. 55-61, May 1995.

[6] Endevco Corporation, Product Catalog and Measurement Resource, Endevco Corporation, 2007.

[7] Endevco Corporation, Piezoresistive Accelerometer Model 7268C Datasheet.

[8] J. Suminto, “A Wide Frequency Range, Rugged Silicon Micro Accelerometer with Overrange Stops,” in Technical Digest of the 9th IEEE International Conference on Microelectromechan-ical Systems,1996, pp.180-185.

[9] "Capacitive Sensing," class notes for ECE 18-614, Department of Electrical and Computer Engineering, Carnegie Mellon University, Fall 2004.

[10] H. Luo, G. Zhang, R. Carley and G. Fedder, “A Post-CMOS Micromachined Lateral Acceler-ometer,” IEEE/ASME Journal of Microelectromechanical Systems, vol. 11, pp. 188-195, June 2002.

[11] H. Xie and G. Fedder, “A CMOS Z-axis capacitive accelerometer with comb-finger sensing,” in Proceedings of the 13th IEEE International Conference on Micro Electro Mechanical Sys-tems, 2000, pp. 496-501.

[12] B. Razavi, Design of Analog CMOS Integrated Circuits, pp. 215-217. Boston: McGraw Hilll, 2001.

[13] S. D. Senturia, Microsystem Design. Boston: Kluwer Academic Publishers, 2001.

CMOS-MEMS High Gee Capacitive Accelerometers · CMOS-MEMS High Gee Capacitive Accelerometers ... the piezoresistor deposition requires temperatures as high as 965 degrees C, ... Chapter

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