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Chptr 1 - Basic BJT Amplifier(II)

Jun 02, 2018

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  • 8/10/2019 Chptr 1 - Basic BJT Amplifier(II)

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    ANALOG ELECTRONICCIRCUITS 1

    EKT 204

    Basic BJT Amplifiers (Part 2)

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    The basic common-emitter circuit used in

    previous analysis causes a serious defect:

    If BJT with VBE=0.7 V is used, IB=9.5 A & IC=0.95 mA

    But, if new BJT with VBE=0.6 V is used, IB=26 A & BJTgoes into saturation; which is not acceptablePrevious

    circuit is not practical

    So, the emitter resistoris included: Q-point is stabilized

    against variations in , as will the voltage gain, AV

    Assumptions CCacts as a short circuit

    Early voltage = ==> roneglected due to open circuit

    Basic Common-Emitter

    Amplifier

    2

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    Common-Emitter Amplifierwith Emitter Resistor

    CE amplifier with emitter resistor Small-signal equivalent circuit

    (with current gain parameter, )

    inside

    transistor

    3

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    Common-Emitter Amplifierwith Emitter Resistor

    ac output voltage

    Input voltage loop

    Input resistance, Rib

    Input resistance to amplifier, Ri

    Voltage divider equation of Vin to Vs

    Remember: Assume VAis infinite,

    rois neglected

    Cbo RIV

    Ebbbin RIIrIV

    Eb

    inib Rr

    I

    VR 1

    ibi RRRR 21

    s

    Si

    iin V

    RR

    RV

    4

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    Common-Emitter Amplifierwith Emitter Resistor

    Cont..

    So, small-signal voltage gain, AV

    If Ri>> Rsand (1 + )RE>> r

    Remember: Assume VAis infinite,

    rois neglected

    Si

    i

    E

    C

    v

    sib

    inC

    s

    Cb

    s

    ov

    RR

    R

    Rr

    RA

    VR

    VR

    V

    RI

    V

    VA

    1

    1

    EC

    E

    Cv

    R

    R

    R

    RA

    1

    5

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    RS

    R1

    R2 RE

    RC

    vs

    vO

    CC

    VCC

    CE

    B C

    E

    Vo

    Vs RC

    RS

    r roR1|| R2 gmV

    Emitter bypass capacitor, CE

    provides a shor t c i rcu i tto

    ground for the ac signals

    Common-Emitter Amplifierwith Emitter Bypass Capacitor

    Small-signal hybrid-

    equivalent circuit

    Emitter bypass capacitor is used to

    short out a portion or all of emitter

    resistance by the ac signal. Hence

    no RE appear in the hybrid-

    equivalent circuit

    6

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    DC & AC LOAD LINE

    ANALYSIS

    DC load line

    Visualized the relationship between Q-point & transistorcharacteristics

    AC load line

    Visualized the relationship between small-signal response &

    transistor characteristics

    Occurs when capacitors added in transistor circuit

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    Common Emitter Amplifier with

    emitter bypass capacitor

    Common-emitter

    amplifier with

    emitter bypass

    capacitor

    Example 1

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    DC Load Line

    KVL on C-E loop

    21

    21

    21

    21

    21

    1Slope

    )(So,

    1

    1

    1,whenpoint,-QFor

    )(1

    1

    when,)(

    1

    )(

    EEC

    EECCQCEQ

    EECCCCE

    CEEECCECC

    EEECECC

    RRR

    -

    RRRIVVV

    RRIRIVVV

    IIVRRIVRI

    VRRIVRIV

    Solution...

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    KVL on C-E loop

    AC Load Line

    1

    11

    1 0

    EC

    ECcEcCcce

    ec

    EeceCc

    RR

    RRiRiRiv

    ii

    RivRi

    1-Slope

    Assuming

    )(

    AC equivalent circuit

    Solution...

    10

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    DC & AC Load Lines

    Full

    solution

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    AC LOAD LINE ANALYSISDetermine the dc and ac load line. VBE=0.7V, =150,

    VA=

    Example 2

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    DC Load Line

    To determine dc Q-point, KVL around B-E loop

    kRR

    -

    RIRIVVV

    mAIImAII

    ARR

    VVI

    RIVRIRIVRIV

    EC

    EEQCCQCEQ

    BQEQBQCQ

    EB

    EBBQ

    EBQEBBBQEEEBBBQ

    15

    11Slope

    53.6)(point,-QFor

    9.0)1(&894.0Then

    96.5)1(

    )1(

    13

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    AC Load Line

    )//()//)((

    /4.34

    36.4

    53.6;894.0

    LCcLCmeo

    CQ

    Ao

    T

    CQm

    CQ

    T

    ECQCQ

    RRiRRvgvv

    I

    Vr

    VmAVIg

    kI

    Vr

    VVmAI

    Small signal

    hybrid-

    equivalent

    circuit

    14

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    DC & AC Load lines

    Full

    solution

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    Maximum Symmetrical Swing

    When symmetrical sinusoidal signal applied to the

    input of an amplifier, the output generated is also a

    symmetrical sinusoidal signal

    AC load line is used to determine maximum output

    symmetrical swing

    If output is out of limit, portion of the output signal will beclipped & signal distortion will occur

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    Maximum Symmetrical Swing

    Steps to design a BJT amplifier formaximum symmetrical swing:

    Write DC load line equation (relates ofICQ& VCEQ)

    Write AC load line equation (relates ic,vce ;vce= - icReq,Req= effective ac resistance in C-E circuit)

    Generally, ic= ICQIC(min), whereIC(min)= 0 or someother specified min collector current

    Generally, vce

    = VCEQ

    VCE

    (min), where VCE

    (min) issome specified min C-E voltage

    Combination of the above equations produce optimumICQ& VCEQvalues to obtain maximum symmetricalswing in output signal

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    Maximum Symmetrical SwingExample 3

    Determine the maximum symmetrical swing in the output voltage ofthe circuit given in Example 2.

    Solution: From the dc & ac load line, the maximum negative swing in the Ic

    is from 0.894 mA to zero (ICQ). So, the maximum possible peak-to-peak ac collector current:

    The max. symmetrical peak-to-peak output voltage:

    Maximum instantaneous collector current:

    mA79.1)894.0(2(min))(2 CCQc IIi

    V56.2)2||5)(79.1()||(|||||| LCceqcce RRiRiv

    mA79.1894.0894.0||2

    1

    cCQC iIi

    18

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    Self-Reading

    Textbook:Donald A. Neamen,

    MICROELECTRONICS Circuit Analysis &

    Design,3rd Edition, McGraw Hill

    International Edition, 2007

    Chapter 6:Basic BJT Amplifiers

    Page:397-413, 415-424.

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    Exercise

    Textbook:Donald A. Neamen,

    MICROELECTRONICS Circuit Analysis &

    Design,3rd Edition, McGraw Hill

    International Edition, 2007

    Exercise 6.5, 6.6, 6.7,6.9

    Exercise 6.10 , 6.11

    20