Chp2 introduction to the 68000 microprocessor copy

Introduction to The 68k Introduction to The 68k PP

68k Instruction Set68k Instruction Set

MOVE.B D0, D1Opcode Operand

SourceDestinationSize

Assembly Language ProgammingAssembly Language Progamming

Machine Instruction

0011 0000 0000 0011

0011

Op-code

000000

First operand

000111

Second operand

Types of instruction i.e. addition or subtractionData size, byte, word or long wordThe amount of the word in complete instructionWhere the data for an instruction (operand) can find

Cycle of InstructionCycle of Instruction

Collection Implement

Cycle of Instruction Cycle of Instruction cont…cont…

Collection phase:• Fill-in program counter with instruction address• Collect instruction from memory, put in the instruction register• For control the instruction, clean-up PC for next instruction

Implement phase:• Count for the operation address• Collect operation• Do the operation• Store the product of operation• Back to first step

68K Addressing Modes68K Addressing Modes

Addressing ModesAddressing Modes SyntaxSyntax

Register Direct AddressingData Register DirectAddress Register Direct

DnAn

Absolute Data AddressingAbsolute ShortAbsolute Long

xxx.Wxxx.L

Program Counter Relative AddressingRelative with offsetRelative with Index Offset

d16 (PC)

d8 (PC,Xn)

Register Indirect AddressingRegister IndirectPostincrement Register IndirectPredecrement Register IndirectRegister Indirect with OffsetIndexed Register Indirect with offset

(An)(An)+-(An)

d16(An)

d8 (An, Xn)

Immediate Data addressingImmediateQuick Immediate

#xxx#1-#8

Implied AddressingImplied Register SR USP SP PC

Register Direct AddressingRegister Direct Addressing

Data Register DirectMOVE.B D0,D3


Data Register DirectMOVE.W D0,D3

Cont…


Data Register DirectMOVE.L D0,D3

Cont…


Address Register DirectMOVEA.L A3,A0

Cont…


Address Register DirectMOVEA A3,A0

Cont…

Absolute Data Absolute Data AddressingAddressing

Absolute Long ModeCLR.B $10000

010000 42 51 010000 00 51

010002 55 13 010002 55 13


Absolute Long ModeCLR.W $10000

010000 42 51 010000 00 00

010002 55 13 010002 55 13

Cont…


Absolute Long ModeCLR.L $10000

010000 42 51 010000 00 00

010002 55 13 010002 00 00

Cont…


Absolute Short ModeCLR.B $1000

01000 42 51 01000 00 51

01002 55 13 01002 55 13

Cont…

Absolute Short vs Absolute Short vs Absolute LongAbsolute Long

Absolute short: 16-bit (0000~7FFF, 8000~FFFF) Sign extend the 16-bit value into 24-bit

(000000~007FFF, FF8000~FFFFFF)

Absolute Long: 24-bit(000000~FFFFFF) No sign extension

Cont…

PC Relative AddressingPC Relative Addressing

PC Relative with OffsetMOVE.W $1200(PC), D5

Assume the instruction is located at $122000

Effective address: $00122002 + $00001200 = $00123202

PC Relative AddressingPC Relative AddressingCont…

PC Relative with Offset


PC Relative with Index and OffsetMOVE.L -20(PC,A2.L),D5

Assume the instruction is located at $00010200

Effective address: $00010202 + $00020030 + $FFFFFFEC = $0003021E

Cont…


PC Relative with Index and Offset

Cont…

Register Indirect AddressingRegister Indirect Addressing

MOVE.L D0,(A0)

Address Register Indirect Address Register Indirect Addressing Post-IncrementAddressing Post-Increment

MOVE.W (A5)+,D0

Address Register Indirect Address Register Indirect Addressing PredecrementAddressing Predecrement

MOVE.W D0,-(A6)

Address Register Indirect Address Register Indirect Addressing With OffsetAddressing With Offset

MOVE.W 6(A0),D0

Address Register Indirect Address Register Indirect Addressing with Index & OffsetAddressing with Index & Offset

MOVE.W $10(A0,D0.L), A1

Immediate AddressingImmediate Addressing

ImmediateMOVE.L #$1FFFF, D0

Before:D0 = 12345678After: D0 = 0001FFFF

Note:$ = value for hexadecimal@ = value for octal% = value for binary& or blank = decimal‘AB’ = character ASCII

Immediate AddressingImmediate Addressing

Quick Immediate1. MOVEQ #$2C, D3

Before: D3 = 1234562CAfter: D3 = 0000002C

2. MOVEQ #$8F, D3Before: D3 = 1234568FAfter: D3 = FFFFFF8F

Cont…

Implied AddressingImplied Addressing

ANDI #$27, SR MOVE CCR, CODES TRAPV

68K Instruction Set68K Instruction Set

Data transfer Arithmetic Logical Shift and rotate Bit manipulation BCD operations Program control System control

68K Instruction Set68K Instruction SetCont…

Data Transfer Instructions


Integer Arithmetic Instructions


Compare and Test Instructions


Logic Instructions


Shift Instructions


Rotate Instructions


Bit-Manipulation Instructions


Subroutine Control Instructions


Binary-Coded Decimal Arithmetic Instructions

Data Transfer InstructionData Transfer Instruction

Take Data from Memory – Operation Load

MOVE.W $10000, D1

D1 FE ED BE EF D1 FE ED 42 51

010000 42 51 010000 42 51

010002 55 13 010002 55 13



MOVE.L $1000, D1

D1 FE ED BE EF D1 42 51 55 13

01000 42 51 01000 42 51

01002 55 13 01002 55 13

Cont…



MOVE.B $1000, D1

D1 FE ED BE EF D1 FE ED BE 42

01000 42 51 01000 42 51

01002 55 13 01002 55 13

Cont…


Store Data into Memory – Operation Save

MOVE.W D1, $1000

D1 FE ED BE EF D1 FE ED BE EF

01000 42 51 01000 BE EF

01002 55 13 01002 55 13

Cont…



MOVE.L D1, $1000


01000 42 51 01000 FE ED

01002 55 13 01002 BE EF

Cont…



MOVE.B D1, $1000


01000 42 51 01000 EF 51

01002 55 13 01002 55 13

Cont…


Moving Memory Data To Memory

MOVE.W $1000, $1006

Cont…

001000 42 51 001000 42 51

001002 55 13 001002 55 13

001004 01 02 001004 01 02

001006 90 AB 001006 42 51


Moving Memory Data To Memory

MOVE.B $1000, $1006

Cont…

001000 42 51 001000 42 51

001002 55 13 001002 55 13

001004 01 02 001004 01 02

001006 90 AB 001006 42 AB


Immediate Mode

MOVE.B #$F1, D1

Cont…

D1 FE ED BE EF D1 FE ED BE F1

MOVE.B D1, #$F1


MOVEQ Instruction

MOVEQ #$F1, D1

Cont…

D1 FE ED BE EF D1 FF FF FF F1


Fill up Memory

MOVE.B #$F1, $1000

Cont…

001000 42 51 001000 F1 51

001002 55 13 001002 55 13

001004 01 02 001004 01 02

001006 90 AB 001006 90 AB


EXG Instruction

EXG D1, D5

Cont…

D1 12 12 20 30 D1 00 FF 48 7C

D5 00 FF 48 7C D5 12 12 20 30


SWAP Instruction

SWAP D1

Cont…

D1 12 34 20 30 D1 20 30 12 34


LEA Instruction – Load Effective Address

LEA $00200001, A0

Cont…

A0 00 12 70 02 A0 00 20 00 01

Similar to:MOVEA.L #00200001, A0



LEA (A1), A0

Cont…

A0 00 12 70 02 A0 00 10 FF FF

A1 00 10 FF FF A1 00 10 FF FF

Similar to:MOVEA.L A1, A0



LEA 8(A0), A1

Cont…

A0 00 12 70 02 A0 00 12 70 02

A1 00 00 40 00 A1 00 12 70 0A



LEA 8(A0, D4.L), A1

Cont…

D4 00 00 20 00 D4 00 00 20 00

A0 00 12 70 02 A0 00 12 70 02

A1 00 00 40 00 A1 00 12 90 0A

Arithmetic InstructionArithmetic Instruction

ADD InstructionDestination + Source DestinationADD.W D1, D3

D1 12 34 56 78 D1 12 34 56 78

D3 FD CC 01 23 D3 FD CC 57 9B

ADD.W $1000,$2000ADD.W $2000,D3


Data Addition in MemoryProblem:

A = B + C, where A, B & C are memory

Solution:- Copy the first word (B) from memory to register- Add the second word (C) to register- Copy the addition product to the memory

Program:MOVE.W B,D1 ; Take BADD.WC,D1 ; Add with CMOVE.W D1,A ; Store product in A

Cont…


Carry Production (0~255) – Unsigned integers

Cont…

ADD.B D0, D3

No carry, C = 0

9-bit after addition, C = 1


Overflow Production (-128~+127) – signed integers

Cont…


ADD.B D0, D3

V = 0, C = 0

V = 0, C = 1

Cont…

V = 1, C = 0

V = 1, C = 1


ADDA InstructionData size: W, LADDA.L #$70, A1

Cont…

A1 00 00 20 30 A1 00 00 20 A0

Use ADDQ.L #$1, A1 for value 1~8, it is faster than ADDA.L #$1, A1


SUBA InstructionData size: W, L

SUBA.L #$70,A1

Cont…

A1 00 00 20 30 A1 00 00 1F C0

Use SUBQ.L #$1, A1 for value 1~8, it is faster than SUBA.L #$1, A1


ADDQ InstructionADDQ.W #3,D6

Cont…

D6 12 34 56 FF D6 12 34 57 02

1~8 only


ADDQ vs MOVEQ

Cont…

ADDQ MOVEQ

Source 1..8 -128…+127

Destination Any Dn only

Data Size B, W, L L only


SUB InstructionDestination - Source DestinationSUB.BD3, D1

Cont…

D1 12 34 56 78 D1 12 34 56 55

D3 FD CC 01 23 D3 FD CC 01 23

SUB.W $1000, $2000


The Effect for V Flag after ADD/SUB

ADD S, D

Cont…

s d Answer (d) Overflow

Positive Negative AnyNothing happen (always V=0)

Negative Positive AnyNothing happen (always V=0)

Positive PositivePositiveNegative

V=0V=1

Negative NegativeNegativePositive

V=0V=1


The Effect for V Flag after ADD/SUB

SUB S, D

Cont…

s d Answer (d) Overflow

Positive Positive AnyNothing happen (always V=0)

Negative Negative AnyNothing happen (always V=0)

Negative PositivePositiveNegative

V=0V=1

Positive NegativeNegativePositive

V=0V=1


The Effect for Flag after SUB C = Set; 2 unsigned values V = Set; 2 signed values Z = Set; product is 0 N = MSB X = C

Cont…


The Effect for Flag after SUBSUB.W D1,D0 ;D0 D0 – D1

Cont…

D0 00 00 30 40 D1 00 00 00 02 D0 00 00 30 3E 0 0 0 0 0

D0 00 00 00 40 D1 00 00 00 40 D0 00 00 00 00 0 0 1 0 0

D0 00 00 FF FF D1 00 00 55 AA D0 00 00 AA 55 0 1 0 0 0

D0 00 00 00 00 D1 00 00 03 00 D0 00 00 FD 00 1 1 0 0 1

D0 00 00 90 00 D1 00 00 70 00 D0 00 00 20 00 0 0 0 1 0

D0 00 00 70 00 D1 00 00 90 00 D0 00 00 E0 00 1 1 0 1 1

D0 before SUB D1 before SUB D1 before SUBX N Z V C

After instruction


SUBQ InstructionSUBQ.W #7,D6

Cont…

D6 12 34 56 FF D6 12 34 56 F8

1~8 only


SUBQ vs MOVEQ

Cont…

SUBQ MOVEQ

Source 1..8 -128…+127

Destination Any Dn only

Data Size B, W, L L only


Multiplication Instruction1. Unsigned number

MULU.W source, Dn

2. Signed number MULS.W source, Dn

Cont…

Note: • Source: 16-bit of any address mode• Both operand: 32-bit data register• Multiply product: 32-bit stores in destination data register


MULU1. Multiply 256 with 2

MOVE.W #256, D3MULU.W #2, D3

Cont…

D3 FD CC 01 00 D3 00 00 02 00

16-bit 32-bit


MULU2. Multiply #$FFFF with #$FFFF

MULU.W #$FFFF, D3

Cont…

D3 FD CC FF FF D3 FF FE 00 01

Note: FFFF = 65535 65535 * 65535 = 4294836225 = FFFE0001


MULSMultiply #$FFFF with #$FFFF

MULS.W #-1, D3

Cont…

D3 FD CC FF FF D3 00 00 00 01

Note: D3 = -1 (-1) * (-1) = 1


MULS & MULU

Cont…

Content in hex As unsigned decimal As signed decimal

Location XX 0003 3 3

Location YY B000 45056 -20480

Register D0 00A0 160 160

Register D1 FF00 65280 -256

MULS XX, D0 D0=000001E0 (3 x 160 = 48010)MULU XX, D0 D0=000001E0 (3 x 160 = 48010)MULS XX, D1 D1=FFFFFD00 (3 x (-256) = -76810)MULU XX, D1 D1=0002FD00 (3x 65280 = 19584010)MULS YY, D1 D1=00500000 (-20480 x (-256) = 524288010)MULU YY, D1 D1=AF500000 (45056 x 65280 = 294125568010)


Division Instruction1. Unsigned number

DIVU.W source, Dn

2. Signed number DIVS.W source, Dn

Cont…

Note: • Source: 16-bit of any address mode• Both operand: 32-bit data register• Division product: lower word destination register• Remainder: upper word destination register


Division InstructionExample 1:

DIVU.W D0, D3

Cont…

D0 FE CC 01 00 D0 FE CC 01 00

D3 00 10 00 01 D5 00 01 10 00

Remainder Quotient


Division InstructionExample 2: (Overflow)

MOVE.L #$40000, D3 DIVU.W#2, D3

Result D3 = 100 0000 0000 0000 0000 (19-bit) Destination can hold 16-bit data only Operand remains unchanged and a division

overflow sets the V = 1

Cont…


Division InstructionExample 3: (Case divide with zero)

MOVE.L #$122, D3CLR D0DIV D0, D3

Cont…



Cont…

Content in hex Decimal

Location XX 0012 Decimal 18

Location YY FFAE Decimal –82

Location ZZ FF00 Unsigned decimal 65280

Register D0 00000308 Decimal 776

Register D1 FFFFFE00 Decimal -512



Cont…

Instruction Result in hex Quotient Remainder

DIVU XX,D0 D0=0002002B Decimal 43 Decimal 2

DIVS XX,D1 D1=FFF8FFE4 Decimal -28 Decimal –8

DIVS YY,D0 0026FFF7 -9 38

DIVS YY,D1 FFEC0006 6 -20

DIVU ZZ,D0 03080000 0 308

DIVU ZZ,D1 FFFFFE00 65792 65024


NEG Instruction (Negate)Form 2’s complementX 0 - XNEG.W D5

Cont…

D5 34 67 00 F0 D5 34 67 FF 10


EXT Instruction (Sign Extend) Convert byte @ word operand to word @ longword

by extending the sign bit of the operand

EXT.W D5

Cont…

D5 34 67 00 F0 D5 34 67 FF F0

D5 34 27 20 65 D5 34 27 00 65


EXT Instruction (Sign Extend) EXT.LD5

Cont…

D5 34 67 30 F0 D5 00 00 30 F0

D5 34 27 99 65 D5 FF FF 99 65

Practical ExamplePractical Example

Write a sequence of program to compute X = 5 * Y + Z/W

where Y, Z and W are 16-bit signed integers and the result is stored as longword X.Solution:

MOVE.W Y, D0MULS #5, D0MOVE.W Z, D1EXT.L D1DIVS W, D1EXT.L D1ADD.L D1, D0MOVE.L D0, X

Location and register

As Hexadecimal

Location X 0012

Location Y FFAE

Location Z FF00

Register D0 00000308

Register D1 FFFFFE00

Compare & Test InstructionCompare & Test Instruction

Compare Instruction – CMPCMP.W D1, D0

D0-D1X N Z V C1 1 1 1 1

D0 01 20 30 40 D1 01 20 30 40 0000 1 0 1 0 0

D0 01 20 30 41 D1 01 20 30 40 0001 1 0 0 0 0

D0 01 20 30 40 D1 01 20 30 41 FFFF 1 1 0 0 1

D0 01 20 00 00 D1 01 20 FF FF 0001 1 0 0 0 1

D0 01 20 FF FF D1 01 20 00 00 FFFF 1 1 0 0 0

D0 01 20 10 00 D1 01 20 20 00 F000 1 1 0 0 1

D0 01 20 70 00 D1 01 20 90 00 E000 1 1 0 1 1

D0 01 20 90 00 D1 01 20 70 00 2000 1 0 0 1 0

Logical InstructionLogical Instruction

A B AB AB AB A B

0011

0101

0001

0111

0110

1100

1010


AND.s <sea>, <dea> Either one is Dn operandANDI.s #data, <dea> The 1st immediate operandOR.s <sea>, <dea> Either one is Dn operandORI.s #data, <dea> The 1st immediate operandEOR.s <sea>, <dea> Either one is Dn operandEORI.s #data, <dea> The 1st immediate operandNOT.s <ea>

Cont…


AND Instruction To clear more than 1 bit in operand ADNI.L #$0F, D0 If D0 = $0000B2DA

Cont…

D0 0000 0000 0000 0000 1011 0010 1101 1010

$0F 0000 0000 0000 0000 0000 0000 0000 1111

AB 0000 0000 0000 0000 0000 0000 0000 1010

D0 = $0000000A


OR Instruction To set more than 1 bit in operand ORI.W #$00E0, D0 If D0 = $A22D

Cont…

D0 1010 0010 0010 1101

$E0 0000 0000 1110 0000

AB 1010 0010 1110 1101

D0 = $A2ED


EOR Instruction To invert more than 1 bit in operand EORI.W #$00FF, D0 If D0 = $A22D

Cont…

D0 1010 0010 0010 1101

$FF 0000 0000 1111 1111

AB 1010 0010 1101 0010

D0 = $A2D2


NOT Instruction To get 1’s complement of the

operand NOT.B D0 If D0 = $A22D

Cont…

D0.B 0000 0000 1111 1111

D0.B 1010 0010 1101 0010

D0 = $A2D2

Shift InstructionShift Instruction

4 instructions of shift operations: ASL (arithmetic shift left) ASR (arithmetic shift right) LSL (logical shift left) LSR (logical shift right)

Size: B, W, L

Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate


Arithmetic Shift Instruction

Example:ASR.B #2, D1

Cont…

D1 12 34 56 F0 D1 12 34 56 FC(-16) (-4)


Logical Shift Instruction Unsigned value

Example: LSR.B #2, D1

Cont…

D1 12 34 56 F0 D1 12 34 56 3C(240) (60)

0

Rotate InstructionRotate Instruction

4 instructions of rotate operations: ROL (rotate left) ROR (rotate right) ROXL (rotate left through X flag) ROXR (rotate right through X flag)

Size: B, W, L

Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate


Example: ROR.B #2, D1

Cont…

D1 12 34 56 A1 D1 12 34 56 68(10100001) (01101000)


Rotate Instruction through X

Example: ROXR.B #2, D1

Cont…

D1 12 34 56 A1 D1 12 34 56 A8(10100001) (10101000)

ExampleExample

Running light in address $80000

MOVE.B #1,D0REPEAT MOVE.B D0,$800000

JSR DELAY ;DelayROL.B #1,D0BRA REPEAT

Bit Manipulation InstructionBit Manipulation Instruction

Test the specified bit in the destination Data size = B or only 1. The bit manipulation instruction included:

a. BCHG (bit test and change) instructionb. BCLR (bit test and clear) instructionc. BSET (bit test and set) instructiond. BTST (bit test) instruction


Example 1:In address $FF8000 contains $AA. What is the result after BTST.B #3, $FF8000?

Solution: ($FF8000) = 101010102 where the 3rd bit is

1. Therefore Z = 0

Cont…


Example 2:Data register D5 contains 2C3459A7. What is the state of the Z flag and what are the contents of D5 after BCHG #6, D5?

Solution: lower byte of D5 = 101001112. Bit 6, 1<0>100111, is a 0. This will set the Z flag & complement bit 6. This result in D5 = 2C3459E716.

Cont…


Example 3:Data registers D6 and D7 contain 0000000C and 75793290, respectively. What is the result of BCLR D6, D7?

Solution: Register D6 specifies that the 12th bit position

001<1>001010010000) should be tested and cleared.

Since the 12th bit is a 1, Z = 0 bit 12 of D7 will be cleared D7 = 75792290.

Cont…


Example 4:What is the result of BSET #2,(A3)?

Solution:The bit in position 2 of the memory location pointed to by A3 is tested and then set.

Cont…

Subroutine Control Subroutine Control InstructionInstruction

Flow Chart Symbol


Program Control Structure

Cont…


Jump Instruction – JMP Unconditional transfer to target destination PC effective address JMP <ea> Type of effective address:

a. Absolute shortb. Absolute long

c. Address register indirect

Cont…


Jump Instruction – JMPJMP START ; START = $1000

JMP $FF8000

Cont…

0100 1110 1111 1000

0001 0000 0000 0000

0100 1110 1111 1001

0000 0000 1111 1111

1000 0000 0000 0000


Bcc (branch condition) InstructionBcc <ea>

Cont…

Instruction Meaning Arithmetic If the test is true

BEQ EQual to zero U Z=1

BNE Not Equal to zero U Z=0

BMI Minus U N=1

BPL Plus U N=0

BCS/LO Carry Set/LOwer U C=1

BCC/HS Carry Clear/Higher or Same U C=0

BVS oVerflow Set S V=1

BVC oVerflow Clear S V=0

BGT GreaTer than S Z+(NV)=0

BLT Less Than S NV=1

BGE Greater than or Equal S NV=0

BLE Less than or Equal S Z+(NV)=0

BHI Higher U C+Z=0

BLS Lower than or Same U C+Z=1


Branch Always Instruction - BRAPC PC + offset BRA.s <ea>

Short branch: -128 PC +127 Syntax: BRA.S

Long branch: -32k PC 32k Syntax: BRA.L

Cont…


Control Constructions1. IF condition

THEN action 1;2. IF condition

THEN action 1ELSE action 2;

3. FOR counter = initial TO final valueDO action 1;

4. REPEAT action1UNTIL condition;

Cont…

5. WHILE conditionDO action 1;

6. CASE selector OFaction 1,action 2, .

.action N;


Example for IF - THENIF A=10 THEN Action 1

CMPI.W #10, VARABNE NEXT...

NEXT

Cont…

Action 1 F

T


Example for IF – THEN – ELSEIF A<=0 THEN Action 1; ELSE Action 2

TST.W VARABLE NEXT1

.

.

BRA NEXTNEXT1

.

.

NEXT

Cont…

Action 1

Action 2


Example for FOR LOOPFOR I=1 TO 10 DO Action 1

MOVE.W #9, D7LOOP

.

.

.

DBF D7, LOOP

Cont…

Action 1


Example for REPEAT – UNTILREPEAT Action 1 UNTIL A=0 or maximum count is reached

MOVE.W LIMIT,D7SUBQ.W #1, D7

LOOP...TST.W VARADBNE D7, LOOP

Cont…

Action 1


Example for WHILE – DOWHILE A<=10 and maximum countis not reached DO Action 1

MOVE.W LIMIT, D7AGAIN CMPI.W #10, VARA

DBGT D7, LOOPLOOP

.

.

.BRA AGAIN

NEXT...

Cont…

Action 1

Action 2

BCD (Binary Coded Decimal) BCD (Binary Coded Decimal) InstructionInstruction

Each BCD byte contents 2 digit of 4-bit BCD. Each BCD instruction involve in X bit. Z bit is changed if the product is not zero. Before doing the first BCD operation, it have to

start with X=0 and Z=1. Syntax:

ABCD Dx,Dy (source)10 + (destination)10 + X destination

ABCD- (Ay)-(Ax)NBCD <ea> 0 – (source)10 – X destination

SBCD Dx,Dy (destination)10 - (source)10 - X destination


ABCD and SBCD InstructionsExample 1:

Add BCD number in D0 to D1.MOVE #4, CCR ; x=0 and z=1ABCD D0, D1

Example 2: Subtract BCD number in D0 from D1

MOVE #4, CCR ; x=0 and z=1SBCD D0, D1

Cont…


BCD InstructionAddition for 2 BCD number 8 bit (byte).

MOVE #4,CCR ;x=0 and z=1ABCD -(A0),-(A1)ABCD -(A0),-(A1)ABCD -(A0),-(A1)ABCD -(A0),-(A1)

Cont…

A1 after addition Upper Byte Upper Middle

Lower Middle Lower Byte

A1 before addition

A0 after addition Upper Byte Upper Middle

Lower Middle Lower Byte

A0 before addition

Destination

Source


NBCD Instruction Use 9’s @ 10’s complement notation to represent a negative BCD number

Example 1: What is the 10s complement for fill-in D0. Let say D0 = 23.

MOVE #0,CCR

NBCD D0NBCD operation: 100 (0 borrow 1)Original D0: -23X bit: - 0Product: 77

Cont…


NBCD InstructionExample 2: What is the 9s complement for fill-in D0. Let say D0 = 23.

MOVE #$10,CCRNBCD D0

NBCD operation : 100 (0 borrow 1)Original D0 : -23X bit: - 1Product : 76

Cont…

Stack and SubroutineStack and Subroutine

Stack Data structure that is used to save and restore

information in a last-in, first-out (LIFO) fashion. Register A7 is implicitly used as the stack pointer. Push (save):

MOVE source, -(SP) orMOVE.L source, -(SP)

Pop (retrieve):MOVE (SP)+, destination orMOVE.L (SP)+, destination


Stack

Cont…


StackSTACKA DS.W 50

MOVEA.L #STACKA + 100, A2MOVE.L D1, -(A2)MOVE.W VAR, -(A2)MOVE.W #$25, -(A2)MOVE.L (A2)+, D2MOVE.L (A2)+, D3

Cont…


Stack

Cont…

SubroutineSubroutine

SubroutineSubroutineCont…

Subroutine Concept A program structure where one part of the program is called

the main program. In addition to this, a smaller segment attached to the main

program, known as a subroutine. The subroutine is written to provide a function that must be

performed at various points in the main program. A return instruction must be included at the end of the

subroutine to initiate the return sequence to the main program environment.

The instructions provided to transfer control from the main program to a subroutine and return control back to the main program are called subroutine-handling instructions.

SubroutineSubroutineCont…

Subroutine Control Instructions – JSR, BSR, RTS & RTR

InterruptInterrupt

An external event which informs the CPU that a device needs its service.

Interrupt Service Routine (ISR):a. a program which associates with interrupt. b. also called the interrupt handlerc. there are 4 bytes of memory allocated as

interrupt vector table. d. handled in the supervisor mode, S = 1.

InterruptInterrupt

Example 1:Calculate the sum of 10 numbers in the address memory

$2000.

Cont…

extra

Chp2 introduction to the 68000 microprocessor copy

Education

indirect register indirect

implied register

instruction address

absolute data

offset cont

instruction operand

cleanup pc

a0 cont