Chapter 7 Arithmetic Operations and Circuits William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc.

Chapter 7

Arithmetic Operations and Circuits

William KleitzDigital Electronics with VHDL, Quartus® II Version

Copyright ©2006 by Pearson Education, Inc.Upper Saddle River, New Jersey 07458

All rights reserved.

Binary Arithmetic

• Addition

• Subtraction

• Multiplication

• Division




Binary Arithmetic

• Addition– when the sum exceeds 1, carry a 1 over to the

next-more-significant column– 0 + 0 = 0 carry 0– 0 + 1 = 1 carry 0– 1 + 0 = 1 carry 0– 1 + 1 = 0 carry 1




Binary Arithmetic

• Addition– General form

• A0 + B0 = 0 + Cout

• summation symbol

• carry-out

• See Table 7-1

– carry-out is added to the next-more-significant column as a carry-in

– See Figure 7-1William KleitzDigital Electronics with VHDL, Quartus® II Version






Figure 7-1




Binary Arithmetic

• Subtraction0 - 0 = 0 borrow 0

0 - 1 = 1 borrow 1

1 - 0 = 1 borrow 0

1 - 1 = 0 borrow 0




Binary Arithmetic

• Subtraction– General form

• A0 - B0 = R0 + Bout

• remainder is R0

• borrow is Bout

• See Table 7-2

– When A0 borrows from its left, A0 increases by 2

– See Figure 7-2







Figure 7-2




Binary Arithmetic

• Multiplication– multiply the 20 bit of the multiplier times the

multiplicand– multiply the 21 bit of the multiplier times the

multiplicand. Shift the result one position to the left before writing it down

– repeat step 2 for the 22 bit of the multiplier, etc.– take the sum of the partial products to get the

final product




Binary Arithmetic

• Division– the same as decimal division – see Example 7-4







Two’s-Complement Representation

• Both positive and negative numbers can be represented

• Binary subtraction is simplified

• Groups of eight

• Most significant bit (MSB) signifies positive or negative– sign bit





• Sign bit0 for positive

1 for negative

• Range of positive numbers (8-bit)0000 0000 to 0111 1111 (0 to 128)

• Range of negative numbers (8-bit)1111 1111 to 1000 0000 (-1 to -128)





• See Table 7-3

• Decimal-to-Two’s-Complement Conversion– If number is positive, convert directly– If number is negative

• complement each bit (one’s complement)

• add 1








• Two’s-Complement-to-Decimal Conversion– If number is positive, convert directly– If number is negative

• complement entire two’s-complement number

• add 1

• convert this to decimal

• result will be a negative number




Two’s-Complement Arithmetic

• Addition– regular binary addition

• Subtraction– convert number to be subtracted to a negative

two’s-complement number– regular binary addition– carry out of the MSB is ignored




Hexadecimal Arithmetic

• 4 binary bits as a single hexadecimal digit

• Addition– add the digits in decimal– if sum is less than 16, convert to hexadecimal– is sum is more than 16, subtract 16, convert to

hexadecimal and carry 1 to the next-more-significant column




Hexadecimal Arithmetic

• Subtraction– when you borrow, the borrower increases by 16– See Example 7-15







BCD Arithmetic

• Group 4 binary digits to get combinations for 10 decimal digits

• Range of valid numbers 0000 to 1001

• Addition– add as regular binary numbers– if sum is 9 or less - OK– if sum is greater than 9 or if carry out generated

• add 6 (0110) saving any carry out




Arithmetic Circuits

• Medium-scale-integration (MSI) circuits

• Basic Adder Circuit– See Figure 7-5

• Half-Adder 0 HIGH when A or B HIGH, but not both

• exclusive-OR function

– Cout high when A and B HIGH • AND function




Figure 7-5




Arithmetic Circuits

• Half-Adder– See Figures 7-6 and 7-7

• Full-Adder 1 HIGH when 3 inputs are odd

• even parity generator

• see Figure 7-8

– Cout HIGH when any two inputs are HIGH• 3 ANDs and an OR

• see Figure 7-9




Figure 7-6

Figure 7-7




Figure 7-8




Figure 7-9




Arithmetic Circuits

• Complete Full-Adder– See Figure 7-10

• Block diagrams– See Figure 7-14




Figure 7-10

Figure 7-14




Four-Bit Full-Adder ICs

• Four full-adders in a single package

• Will add two 4-bit binary words plus one incoming carry

• See Table 7-5 and Figure 7-16

• Fast-look-ahead carry– evaluates 4 low-order inputs– high-order bits added at same time– eliminates waiting for propagation ripple







Figure 7-16




VHDL Adders Using Integer Arithmetic

• Addition process using the addition operator and integer data type– integer data type allows inputs with numeric values other

than 1 or 0

– arithmetic operations can be performed

– specify range of variable

• A VHDL 4 bit binary adder and simulation– see figure 7-18

– see figure 7-19




Figure 7-18

Figure 7-19




System Design Applications

• Two’s-Complement Adder/Subtractor Circuit– See Figure 7-21

• BCD Adder Circuit– See Figure 7-22




Figure 7-21

Figure 7-22




Arithmetic/Logic Units• ALU is a multipurpose device• Mode Control (M)

– arithmetic– logic– see Figure 7-23

• Function Select– selects specific function to be performed– see Figure 7-23




Figure 7-23




Figure 7-23 (continued)




CPLD Applications with VHDL and LPMs

• CPLD based arithmetic circuits using macrofunctions, VHDL, and LPMs– library of parameterized modules are provided

in Quartus II software to speed the design process





• Example 7-25 – a 4 bit adder using the 74283 macrofunction – see figures 7-25 and 7-26




Figure 7-25

Figure 7-26





• Example 7-26 – an 8 bit adder/subtractor using the + and –

arithmetic operators– see figures 7-27 and 7-28




Figure 7-27

Figure 7-28





• Example 7-27– a BCD adder based on figure 7-22– see figures 7-29 and 7-30




Figure 7-29




Figure 7-30





• Example 7-28– an adder/subtractor using LPMs– see figures 7-31, 7-32, 7-33




Figure 7-31




Figure 7-32

Figure 7-33




Summary

• The binary arithmetic functions of addition, subtraction, multiplication and division can be performed bit by bit using several of the same rules of regular base 10 arithmetic.

• The two’s-complement representation of binary numbers is commonly used by computer systems for representing positive and negative numbers.




Summary

• Two’s-complement arithmetic simplifies the process of subtraction of binary numbers.

• Hexadecimal addition and subtraction is often required for determining computer memory space and locations.

• When performing BCD addition a correction must be made for sums greater than 9 or when a carry to the next more significant digit occurs.




Summary

• Binary adders can be built using simple combinational logic circuits.

• A half-adder is required for addition of the least significant bits

• A full-adder is required for addition of the more significant bits.




Summary

• Multibit full-adder ICs are commonly used for binary addition and two’s-complement arithmetic.

• Arithmetic/logic units are multipurpose ICs capable of providing several different arithmetic and logic functions.




Summary

• The logic circuits for adders can be described in VHDL using integer arithmetic.

• The Quartus II software provides 7400-series macrofunctions and a Library of Parameterized Modules to ease in the design of complex digital systems.

• Conditional assignments can be made using the IF-THEN-ELSE VHDL statements.




Chapter 7 Arithmetic Operations and Circuits William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc.

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