185 Chapter 6 ACTIVE CLAMP ZVS FLYBACK CONVERTER WITH OUTPUT VOLTAGE DOULER S. No. Name of the Sub-Title Page No. 6.1 Introduction……………………………………………………… 186 6.2 Single output Active Clamped ZVS Flyback Converter… 186 6.3 Active Clamp ZVS Flyback Converter with Voltage doubler…………………………………………………………… 195 6.4 Active Clamp ZVS Multi-output Flyback Converter…… 203 6.5 Active Clamp ZVS Multi-output Flyback Converter with Voltage doubler ……………………………………………… 207 6.6 Fuzzy Controller ……………………………………………… 218 6.7 Simulation of CFLC………………………………………… 218 6.8 Simulation of SFLC…………………………………………… 221 6.9 Converter analysis …………………………………………… 227 6.10 Conclusion……………………………………………………… 234
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185
Chapter 6
ACTIVE CLAMP ZVS FLYBACK CONVERTER WITH
OUTPUT VOLTAGE DOULER
S. No. Name of the Sub-Title Page No.
6.1 Introduction……………………………………………………… 186
6.2 Single output Active Clamped ZVS Flyback Converter… 186
6.3 Active Clamp ZVS Flyback Converter with Voltage
doubler…………………………………………………………… 195
6.4 Active Clamp ZVS Multi-output Flyback Converter…… 203
6.5 Active Clamp ZVS Multi-output Flyback Converter with
Voltage doubler ……………………………………………… 207
6.6 Fuzzy Controller ……………………………………………… 218
6.7 Simulation of CFLC………………………………………… 218
6.8 Simulation of SFLC…………………………………………… 221
6.9 Converter analysis …………………………………………… 227
6.10 Conclusion……………………………………………………… 234
186
6.1 Introduction
The main disadvantage of resonant converters dealt in chapter 4
and 5 are high voltage and current stess in the devices. For a primary
ZVS resonant converter the voltage across the main switch is more than
twice the supply voltage. In order to reduce it, clamping capacitors are
used. It reduces the voltage stress across the switches. The results
obtained from the hardware prototype developed are discussed in detail.
6.2 Single output Active Clamped ZVS Flyback Converter
Integrating an active-clamp circuit with flyback resonant circuit
eliminates transformer leakage losses, minimizes turn-OFF voltage stress
across the power switch and achieves ZVS in the power switch.
6.2.1 Principle of operation
The active-clamp ZVS flyback converter configuration is shown in
Fig. 6.1. To minimize voltage spike due to transformer inductance when
the main switch is turned OFF; an auxiliary switch and one clamping
capacitor are incorporated within the converter. In Fig. 6.1, S1 and S2 are
the main and the auxiliary switches respectively, Lr is the resonant
inductance and Cr is the resonant capacitance. To minimize the voltage
spike due to leakage inductance during the turn OFF of the main switch
S1, the auxiliary switch S2 and clamp capacitor Cc are integrated with the
circuit. Cr and Lr resonate during the transition of main switch (S1) and
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auxiliary switch (S2). D is diode in the secondary side and Co is the filter
capacitor.
Fig: 6.1 Circuit diagram of actively clamped ZVS flyback converter
Assumptions in addition to those assumed in section 4.2.2 are:
The turn OFF time of the main switch is less than the resonant
period
To achieve ZVS for both S1 and S2, the resonant capacitor energy is
less than that of resonant inductor energy
6.2.2 Modes of Operation
A. Mode 1 (t0-t1)
Before the 1st mode of operation, both switches are in OFF
condition and the coupling capacitor has an initial charge of Vcc = nV0.
When the main switch S1 is ON, the supply voltage is applied across the
transformer primary and accordingly, a secondary voltage is induced in
the transformer. The inductor Lr charges linearly and the induced voltage
on secondary side reverse biases the diode D1. The filter capacitor
provides the output voltage.
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(a) Mode-1
(b) Mode-2 (c) Mode-2
(d) Mode-3 (e) Mode-4
Fig: 6.2 Modes of operation
B. Mode 2 (t1-t2)
Switch S1 is switched OFF in this mode. By utilizing the energy
stored in the inductor, the capacitor Cr starts to charge and when the
capacitor voltage is equal to (Vin + Vcc), the body diode of S2 turns ON. The
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capacitor Cc charges through this diode. On the secondary side, the
energy stored in the magnetising inductance forward biases diode D1 and
the energy stored in the transformer is delivered to the load and thus
charges the output capacitor C0. Fig. 6.2(b) and (c) show the equivalent
circuit for mode 2 operation.
Fig: 6.3 Theoretical waveforms for actively clamped ZVS flyback converter
C. Mode 3 (t2-t3)
This mode is responsible for achieving ZVS in switch S2. During turn
ON, the current flows through the switch and energy is released from the
coupling capacitor. This causes the capacitor to discharge and the
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inductor charges in the reverse direction as illustrated in Fig. 6.2(d). The
operation of the secondary side is same as in mode 2.
D. Mode 4 (t3-t4)
When switch S2 is turned OFF, the clamp capacitor is removed
from the control circuit as explained in Fig. 6.2(e). During this mode,
resonant capacitor Cr discharges and the resonant inductor charges. Fig.
6.3 shows waveforms for one switching period of the desired converter.
6.2.3 Design
The design process of the active clamped ZVS flyback converter is
considered in this section.
6.2.3.1 Specifications
Specifications for the converter circuit are same as given in section
5.4.3.1.
6.2.3.2 Resonant Component Design
To achieve soft switching in the switches the design of Lr and Cr are
carried out with ZVS criteria as given by equations (4.1) – (4.4) and the
designed values are Cr = 10nF and Lr = 55μF.
6.2.3.3 Transformer and Inductor Design
Design of the transformer and inductors are carried out as per the
design elaborated in section 5.3.1.3 and the results obtained are
tabulated in Table 6.1.
191
Table 6.1 Transformer and Inductor design details
Parameters Core selected
Transformer design
91.838 mm4 ,
Np = 19,
From Appendix –I : core - EE 20/10/5
,
,
Resonant Inductor Design
, From Appendix –I : core - EE 20/10/5
,
,
6.2.3.4 Design of Co and Cc
Taking 1% output voltage ripple,
Output Capacitance, C01 = 160μF
Clamping capacitor,
= 1μF
6.2.4 Open-loop Simulation Results
The converter is simulated in PSIM platform using the designed
values and the results obtained are discussed in this section. As shown
in Fig. 6.4(b) and (c), switching pulses with main switch pulse width of
47% and auxiliary switch pulse width of 46% are observed with a small
delay of 0.5µs between them. The output voltage and current obtained
are (3.3V, 0.33A) as shown in Fig. 6.4(a). From Fig. 6.4(b) and(c) it is
observed that switch-1 is turned ON at ZVS, and switch-2 is turned ON
at ZCS. Fig. 6.5(a) shows the resonant capacitor voltage with peak value
of 24V and peak current through the capacitor at 1.5A. The resonant
capacitor charges when switch-1 is turned OFF. The peak clamping
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capacitor voltage of 11.7V and peak capacitor current of 1A obtained are
shown in Fig. 6.5(b).
(a) (b) (c)
Fig: 6.4 (a) Output voltage-1 and current-1 (b) Switch-1 pulse,voltage and current (c) Switch-2 pulse voltage and current
(a) (b) Fig: 6.5 (a) Switch-2 pulse,resonant capacitor voltage and current (b)
Switch-2 pulse, coupling capacitor voltage and current
6.2.5 Experimental Results
Based on the designed values, an actively clamped ZVS flyback
converter circuit model is implemented. The active switches used are a
power MOSFET IRF840 which has a gate source voltage of +/-20V and
193
drain current of 8A. The secondary diodes used are ultra-fast recovery
rectifier IN5817.
The hardware set up is shown in Fig. 6.6. The microcontroller
LPC2148 is used for generating the gate pulses for switches. To provide
isolation between the gating circuit and power circuit the pulses are
given to switches through an opto-coupler IC TLP250. The peak to peak
amplitude of the pulses are 12.4V and 14V, with 47.3% and 46.7% duty
cycle respectively, as illustrated in Fig. 6.7(a). The output voltage with
3.68V magnitude and current with 334mA magnitude obtained is shown
in Fig. 6.7(b).
Fig: 6.6 Hardware set up for actively clamped ZVS flyback converter
(a) (b)
Fig: 6.7 (a) Switch pulses (b) Output voltage and current
194
The peak voltage across the switches (3.36V) and peak current
through the switch (2.05V) are shown in Fig. 6.8(a). Voltage across the
switches is zero, when the switches are turned ON with the gate pulses.
Thus, ZVS is achieved in the power switches. Switch-2 with peak voltage
of 3.2V and peak current of 2A is shown in Fig. 6.8(b). Switch-2 is turned
ON only when the voltage across the switch is zero with the gating
pulses. This technique helps to achieve soft switching which leads to
protection of the switches from high voltage stress.
(a) (b)
Fig: 6.8(a) Switch-1 pulse,voltage and current (b) Switch-2 pulse, voltage and current
Fig. 6.9(a) shows the resonant capacitor Voltage (12.7V) and
current (1.02A). When switch S1 is turned off, the capacitor resonates
with the inductor. The coupling capacitor starts resonating when switch
S2 is turned ON and peak voltage obtained is 9.86V as shown in Fig.
6.9(b).
The active clamp circuit reduces the switch voltage to a nominal
range thereby addressing the voltage stress issue across the ZVS
195
switches. Still the problem of diode losses remain which is solved by
adding voltage doubler in the secondary and is dealt in the next section.
(a) (b)
Fig: 6.9 (a) Switch-2 pulse,resonant capacitor voltage and current (b)
Switch-2 pulse, coupling capacitor voltage and current
6.3 Active Clamp ZVS Flyback Converter Voltage Doubler
Voltage doubler circuit is introduced in the secondary of the
transformer to reduce the voltage stress in the secondary diodes. Hence
this converter posses the advantages of resonance, clamping capacitors
and voltage doubler circuits. Fig. 6.10 shows the actively clamped ZVS
flyback converter circuit with voltage doubler added to secondary side of
the transformer.
Fig: 6.10 Circuit diagram
196
The voltage doubler circuit consists of capacitor Cs and diodes D1 and D2.
All other parameters are similar to the actively clamped ZVS flyback
circuit.
6.3.1 Modes of Operation
The converter operation is spilt as 5 modes and they are explained
as follows.
A. Mode 1 (t0-t1): S1 - ON
Before the 1st mode, both the switches S1 and S2 are OFF and the
initial voltage across the coupling capacitor is Vcc (0) = nV0 . At time t0,
the main switch is turned ON and the current starts to flow through Vin,
Lr and primary winding of the transformer. The inductor current iLr
increases linearly and the supply voltage is fed to the primary of the
transformer. As a result, an equivalent current builds up in the
secondary side, as shown in Fig. 6.11(a). Diode D1 is forward biased and
capacitor Cs1 starts charging. The output filter capacitor supplies the
load.
B. Mode 2 (t1-t2): S1 - OFF
This starts when switch S1 is switched OFF. The primary current
flows through the resonant capacitor and starts charging it. The coupling
capacitor voltage is maintained at nVo as per the previous mode. By the
effect of switching, a reverse polarity voltage is induced in the primary
and secondary windings as shown in Fig. 6.11(b). This forward biases the
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diode D2 and the transformer secondary is connected to the load end
through the capacitor Cs1.
(a) Mode-1 (b) Mode-2
(c) Mode-3 (d) Mode-3
(e) Mode-4
Fig: 6.11 Modes of operation
C. Mode 3 (t2 - t3): S2 - ON
Fig. 6.11(c) & (d) shows this mode of operation. The mode starts
when the voltage across the resonant capacitor reaches (Vin + VCc) and
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forward biases the body diode of S2. The inductor Lm and Lr discharges
its stored energy. Using the positive resonant current iLr, the clamp
capacitor is charged. Across the resonant inductor and the transformer
magnetizing inductor, the clamp capacitor fixes a voltage which results
in a voltage divider in between the two inductances. As a result, the
resonant inductor Lr and clamping capacitor Cc begin to resonate. The
capacitor charges in the reverse direction when the gating signal is
applied to S2, which results in ZVS, as shown in Fig. 6.12. On the
secondary side, diode D2 is still forward biased and the working is similar
to the previous mode.
D. Mode 4 (t3-t4): S2 - OFF
In this mode, the auxiliary switch S2 is turned OFF hence the effect
of the clamp capacitor in the circuit is removed. The resonant capacitor
Vcr starts charging. On the secondary side, the capacitor Cs1 charges
through diode D1 and the output is supplied from the filter capacitor.
The equivalent circuit is as shown in Fig. 6.11(e).
Fig. 6.12 shows the theoretical waveforms for one switching period
for actively clamped multi-output flyback converter with voltage doubler.
The circuit configuration changes whenever the switching devices are
changed from one state to another.
199
Fig: 6.12 Theoretical Waveforms of active clamp ZVS flyback converter
with voltage doubler
6.3.2 Design and Specifications
Specifications for the circuit are as discussed in section 5.6.3. The
transformer, resonant inductor, resonant capacitor and coupling
capacitor for a 5V and 500mA are the same as explained in section 6.2.3.
The capacitor on the secondary side, ( )
= 1µF,
Where,
Np - No. of turns in primary
D - duty cycle
Lr - resonant inductor
6.3.3 Open-loop Simulation Results
With the designed specifications, the converter is simulated in
PSIM platform. The output voltage (5V) and current (0.5A) obtained are
200
as captured in Fig. 6.13(a). To achieve ZVS, the switches are turned ON
at zero voltage.
(a) (b)
Fig: 6.13 (a) Output voltage and current (b) Secondary capacitor voltage
and current
The switch voltage and current waveforms obtained are similar to
the waveforms shown in Fig. 6.4(b) and (c) as given in section 6.2.4. The
duty cycle for the switches S1 and S2 are 47% and 46% respectively. The
secondary capacitor voltage (2.13V) and current (3A) are shown in Fig.
6.13(b). The leakage inductance of the transformer resonates with the
secondary capacitor Cs, hence no large filter inductor is required. The
primary switch turn-OFF loss, RCD snubber loss is minimized and
secondary side D1 is turned-OFF smoothly because the resonant
operation shapes the current to be sinusoidal. The input voltage for the
converter is 12V. The coupling capacitor voltage is obtained as 11.7V.
The voltage and current for the diodes D1 and D2 are shown in Fig.
6.14(a) and (b). When switch S1 is turned ON, the diode D1 (4.5V and
201
2.4A) gets forward biased and when switch S2 is turned OFF, the diode
D2 (2.5V and 1A) gets forward biased. The resonant inductor current and
voltage obtained are 2.4A and 10V.
(a) (b)
Fig: 6.14 (a) Switch-1 pulse, diode-1 voltage, current (b) Switch-1 pulse, diode-2 voltage, current
6.3.4 Experimental Results
The converter explained and designed in the previous section is
built as a hardware prototype and the results obtained are discussed in
detail. The hardware implementation is similar to that explained in
section 6.2.5. The hardware setup is shown in Fig. 6.15(a). The output
voltage (5V) and current (500mA) are obtained according to the designed
values which are shown in Fig. 6.15(b). The input voltage supplied is
12V. The voltage and current for the diodes D1 (VD1-pk = 7.6V and ID1-pk =
202
1.22A) and D2 (VD2-pk = 7.2V and ID2-pk = 1.92A) are shown in Fig. 6.16(a)
and (b).
(a) (b)
Fig: 6.15 (a) Hardware set up for active clamp ZVS flyback converter with