38 CHAPTER 3 NEURAL NETWORK FOR REAL TIME POWER FLOW ANALYSIS 3.1 INTRODUCTION The power flow analysis assumes importance for various real time power systems applications. The conventional methods used to solve these real time problems are iterative techniques and takes longer time for computation. Numerous methods are proposed to overcome the drawbacks of conventional methods. All these methods are computationally rigorous, time consuming. Neural Network based methods trained from input/output data provide an alternate solution for on-line power flow analysis. The nonlinear mapping capability of NN model trained from input/output data is well proven in the literature [27,64] and avoids the direct use of complex mathematical model. They are computationally less rigorous and give faster estimation in real time. The major issues in NN based power flow analysis are; the NN model used for power flow analysis should be accurate, simpler in design, structurally compact and computationally less complex to ensure faster execution time in real time implementation. This in turn depends on the type of neural architectures and learning algorithms. Different neural architectures and neural learning algorithms are proposed in the literature. The popular neural architectures used for function approximation are Feed-forward architecture and Cascade architecture [27,55,56]. The popular neural learning algorithms are Backpropagation with Momentum, Variable Learning Rate and Levenberg Marquardt [57-60,65,66]. This chapter investigates the suitability of neural architecture and learning algorithm for on-line power flow analysis.
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38
CHAPTER 3
NEURAL NETWORK FOR REAL TIME
POWER FLOW ANALYSIS
3.1 INTRODUCTION
The power flow analysis assumes importance for various real time power
systems applications. The conventional methods used to solve these real time
problems are iterative techniques and takes longer time for computation. Numerous
methods are proposed to overcome the drawbacks of conventional methods. All
these methods are computationally rigorous, time consuming. Neural Network based
methods trained from input/output data provide an alternate solution for on-line
power flow analysis. The nonlinear mapping capability of NN model trained from
input/output data is well proven in the literature [27,64] and avoids the direct use of
complex mathematical model. They are computationally less rigorous and give
faster estimation in real time.
The major issues in NN based power flow analysis are; the NN model
used for power flow analysis should be accurate, simpler in design, structurally
compact and computationally less complex to ensure faster execution time in real
time implementation. This in turn depends on the type of neural architectures and
learning algorithms. Different neural architectures and neural learning algorithms
are proposed in the literature. The popular neural architectures used for function
approximation are Feed-forward architecture and Cascade architecture [27,55,56].
The popular neural learning algorithms are Backpropagation with Momentum,
Variable Learning Rate and Levenberg Marquardt [57-60,65,66]. This chapter
investigates the suitability of neural architecture and learning algorithm for on-line
power flow analysis.
39
The NN models are built from input-output data. Using the collected data
three types of neural architectures and neural learning algorithm for on-line power
flow analysis are built. The performance of the obtained NN models for power flow
analysis is compared in terms of estimation accuracy, structural compactness and
computational complexity which assume importance for faster analysis of power
flow problem in real time. The most compact neural network model for power flow
analysis is identified.
3.2 TRAINING OF NN MODELS FOR POWER FLOW ANALYSIS
The three architectures are trained with chosen learning algorithms. To
design SLFF-NN, single neuron is added in the hidden layer at a time till the target
MSE is reached. In MLFF-NN and cascade-NN, the choice of number of layers and
number of neurons in each layer is decided by trial and error. The design of MLFF-
NN and cascade-NN is more of an art than a science. Therefore, in this research
work, MLFF-NN and cascade-NN with two hidden layers is designed by trial and
error method. For ease in design, equal number of neurons is chosen in each hidden
layers. The initial parameter value for various algorithms is presented in the Table 3.1.
Table 3.1 Initial parameter value for various algorithms
SL.No Algorithm Learning Rate )
Momentum )
Constant Value (µ)
1. BPM 0.01 0.9 - 2.
VLR
Initial =0.01
Ratio to increase learning rate ( ) = 1.05
Ratio to decrease learning rate ( ) = 0.7
0.9 -
3.
LM - -
Initial µ =0.001
µ decrease factor = 0.1
µ increase factor = 10
The weights and biases are initialized using Nguyen Window algorithm.
40
The results are extensively validated using four test cases. The test cases
considered for investigation are IEEE30 bus test system, IEEE57 bus test system,
IEEE118 bus test system and practical Indian Practical 76 bus test system.
For IEEE30, IEEE57 and IEEE118 bus test systems, around 1000 data
sets are obtained using Newton Raphson method through MATLAB simulation by
varying both the real and reactive load power demand (45%-145%) with the
increment of 0.1%. 750 data are used for training and 250 data are used for testing.
In IEEE30 bus test system, totally there are 24 PQ buses, 5 PV buses and
1 slack bus. The total numbers of outputs are 53. The target MSE is chosen as 1×10-10.
In IEEE57 bus test system, totally there are 50 PQ buses, 6 PV buses and
1 slack bus. The total numbers of outputs are 106. The target MSE is chosen as
1×10-10.
In IEEE118 bus test system, totally there are 64 PQ buses, 53 PV buses
and 1 slack bus. The total numbers of outputs are 181. The target MSE is chosen as
1×10-10.
For Indian Practical 76 bus test system, around 900 data sets are obtained
using Newton Raphson method through MATLAB simulation by varying both the
real and reactive power load demand (45%-135%) the increment of 0.1%. 675 data
are used for training and 225 data are used for testing. In this test case, totally there
are 63 PQ buses, 12 PV buses and 1 slack bus. The total numbers of outputs are 76.
The target MSE is chosen as 1×10-7.
For training the neural network, the inputs to the NN model is chosen as
real power load demand (PD) for all the cases. The real power load demand is
presented in equation (3.1).
1
n
D ii
P p (3.1)
where Pi is the real power at ith load bus, i=1,2,…n.
41
The outputs from the NN model are voltage magnitude (|V|) of PQ buses
and voltage angles ( ) of both PQ and PV buses. The block diagram of NN model
for voltage magnitude and angle estimation with inputs and outputs is shown in
Figure 3.1.
Figure 3.1 NN based voltage magnitude and angle estimator
The performance have been compared with all the three NN architectures
(SLFF-NN, MLFF-NN & CC-NN) which are trained with same input/output data,
same learning algorithms, and same target MSE. This is repeated for different
learning algorithms (BPM, VLR & LM). The tan-sigmoid function is chosen for
hidden layer neurons and pure-linear function is chosen for output layer neurons.
The flow chart for training the NN architecture for power flow analysis is shown in
Figure 3.2.
For IEEE30 bus test system, training Performance and MSE convergence
graph of SLFF-NN using BPM Algorithm is shown in Figure 3.3 and Figure 3.4
respectively. For IEEE30 bus test system, Training Performance and MSE
convergence graph of SLFF-NN using VLR Algorithm is shown in Figure 3.5 and
Figure 3.6 respectively. For IEEE30 bus test system, Training Performance and
MSE convergence graph of SLFF-NN using LM Algorithm is shown in Figure 3.7
and Figure 3.8 respectively.
42
Figure 3.2 Training process of NN for power flow analysis
Choose the NN
architecture and
learning
algorithm
Choose the
number of layers
and number of
neurons per layer
Train the NN using
chosen learning
algorithm using
the LFA training
data
Is Target
MSE met
Stop
Change the
number of
layers and
number of
neurons per
Start
Initialize
weights, biases
and set the
target MSE
No
Yes
43
Figure 3.3 Training performance of SLFF-NN using BPM algorithm for IEEE30 bus test system
Figure 3.4 MSE convergence graph of SLFF-NN using BPM algorithm for IEEE30 bus test system
44
Figure 3.5 Training Performance of SLFF-NN using VLR Algorithm for IEEE30 bus test system
Figure 3.6 MSE Convergence graph of SLFF-NN using VLR Algorithm for IEEE30 bus test system
45
Figure 3.7 Training Performance of SLFF-NN using LM Algorithm for IEEE30 bus test system
Figure 3.8 MSE convergence graph of SLFF-NN using LM algorithm for IEEE30 bus test system
46
The training MSE achieved for all the NN models for power flow analysis for all the test cases is tabulated in Table 3.2. From the Table 3.2, it is observed that all the three NN architectures trained with LM algorithm performed well as compared to BPM, VLR trained NN architectures. Thus LM trained NN models shows better performance as compared to other models. Hence, it is concluded that LM algorithm is most suitable for offline training.
Table 3.2 Performance comparison of NN models trained for same accuracy for various test cases
3.3 TESTING OF NN MODELS FOR POWER FLOW ANALYSIS IN
TERMS OF ACCURACY
To determine the most suitable architecture, the performance of
LM-trained NN models using three NN architectures is compared in terms of
accuracy, structural compactness and computational complexity. Firstly, the
performance of LM trained SLFF-NN, MLFF-NN and CC-NN models is
compared in terms of accuracy. The off-line LM trained three NN models are
tested for on-line estimation of voltage magnitudes and angles.
Case(i) IEEE30 bus test system
The sample results for voltage magnitude of PQ bus no. 25 and angle
of PQ bus no. 30 estimated using SLFF-NN, MLFF-NN and CC-NN for the
IEEE30 bus test system is presented in Figure 3.9, Figure 3.10 and Figure 3.11
respectively. The test MSE of voltage magnitude for all the PQ buses found all
the three architectures namely SLFF-NN, MLFF-NN and CC-NN is consolidated
and presented in Table 3.3. The test MSE of voltage angle for all the PV & PQ
buses using all the three architectures is consolidated and presented in Table 3.4.
The Performance Comparison of LM Trained NN Models designed using
SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE is shown in
Table 3.5
48
(a)
(b)
Figure 3.9 Voltage magnitude and angle estimated using SLFF-NN for IEEE30 bus test system (a) Voltage magnitude for bus no. 25 (b) Voltage angle for bus no. 30
49
(a)
(b)
Figure 3.10 Voltage magnitude and angle estimated using MLFF-NN for IEEE30 bus test system (a) Voltage magnitude for bus no. 25 (b) Voltage angle for no. bus 30
50
(a)
(b)
Figure 3.11 Voltage magnitude and angle estimated using CC-NN for IEEE30 bus test System (a) Voltage magnitude for bus no. 25 (b) Voltage angle for bus no. 30
51
Table 3.3 MSE of voltage magnitude for various NN architectures-IEEE30 bus test system
SL.NO BUS NO ERROR_ SLFF ERROR_
MLFF ERROR_ CC
1 3 4.4402x10-10 5.4846x10-10 4.5666x10-10
2 4 4.8563x10-10 5.4682x10-10 5.1806x10-10
3 6 2.6037x10-10 2.8072x10-10 2.7104x10-10
4 7 2.5937x10-10 2.6291x10-10 2.6602x10-10
5 9 6.5968x10-10 6.7845x10-10 6.6718x10-10
6 10 1.7747x10-10 1.7918x-09 1.7767x10-09
7 12 7.4694x10-10 7.7645x10-10 7.6372x10-10
8 14 9.5004x10-10 9.4996x10-09 9.4993x10-10
9 15 1.9255x10-09 1.9360x10-09 1.9752x10-09
10 16 1.5474x10-09 1.5613x10-09 1.6041x10-09
11 17 2.0260x10-09 2.0337x10-09 2.0642x10-09
12 18 2.7691x10-09 2.7645x10-09 2.7824x10-09
13 19 3.0659x10-09 3.0562x10-09 3.1228x10-09
14 20 2.7758x10-09 2.7728x10-09 2.7768x10-09
15 21 2.6745x10-09 2.6751x10-09 2.7130x10-09
16 22 2.6381x10-09 2.6408x10-09 2.6660x10-09
17 23 2.9013x10-09 2.9004x10-09 2.9243x10-09
18 24 3.6915x10-09 3.6875x10-09 3.7052x10-09
19 25 3.1329x10-09 3.1830x10-09 3.1569x10-09
20 26 4.8843x10-09 4.9124x10-09 5.0368x10-09
21 27 2.1299x10-09 2.2221x10-09 2.2141x10-09
22 28 3.2687x10-10 3.4557x10-10 3.3725x10-10
23 29 3.8767x10-09 3.9711x10-09 3.9405x10-09
24 30 5.1179x10-09 5.2093x10-09 5.2096x10-09
52
Table 3.4 MSE of voltage angle for various NN architectures-IEEE30 bus test system
SL.NO BUS NO ERROR_ SLFF ERROR_ MLFF ERROR_ CC
25 2 2.6163x10-05 2.5590x10-05 2.5948 x10-05
26 3 3.9664x10-05 3.8845x10-05 3.9356 x10-05
27 4 6.1496x10-05 6.0190x10-05 6.0985 x10-05
28 5 1.4053x10-04 1.3763x10-04 1.3925 x10-04
29 6 8.6909x10-05 8.5043x10-05 8.6152 x10-05
30 7 1.1519x10-04 1.1275x10-04 1.1421 x10-04
31 8 1.0270x10-04 1.0047x10-04 1.0191 x10-04
32 9 1.3407x10-04 1.3117x10-04 1.3317 x10-04
33 10 1.6407x10-04 1.6048x10-04 1.6312 x10-04
34 11 1.3407x10-04 1.3117x10-04 1.3309 x10-04
35 12 1.5065x10-04 1.4736x10-04 1.4977x10-04
36 13 1.5065x10-04 1.4736x10-04 1.4994x10-04
37 14 1.6810x10-04 1.6443x10-04 1.6748x10-04
38 15 1.6938x10-04 1.6568x10-04 1.6867x10-04
39 16 1.6106x10-04 1.5754x10-04 1.6020x10-04
40 17 1.6768x10-04 1.6401x10-04 1.6712x10-04
41 18 1.8247x10-04 1.7848x10-04 1.8165x10-04
42 19 1.8626x10-04 1.8219x10-04 1.8519x10-04
43 20 1.8174x10-04 1.7777x10-04 1.8092x10-04
44 21 1.7310x10-04 1.6931x10-04 1.7213x10-04
45 22 1.7269x10-04 1.6891x10-04 1.7192x10-04
46 23 1.7677x10-04 1.7290x10-04 1.7622x10-04
47 24 1.7933x10-04 1.7541x10-04 1.7848x10-04
48 25 1.7544x10-04 1.7160x10-04 1.7497x10-04
49 26 1.8515x10-04 1.8110x10-04 1.8457x10-04
50 27 1.6725x10-04 1.6360x10-04 1.6628x10-04
51 28 9.6072x10-05 9.4014x10-05 9.5235 x10-04
52 29 1.9492x10-04 1.9068x10-04 1.9462x10-04
53 30 2.1708x10-04 2.1243x10-04 2.1698x10-04
53
Table 3.5 Performance comparison of LM trained NN Models designed using SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE for IEEE30 bus test system
Test Case Average Test MSE
for SLFF-NN Average Test MSE
for MLFF-NN Average Test MSE
for CC-NN
IEEE 30 bus test system
8.2183×10-5 8.0437×10-5 8.1784×10-5
The average test MSE for all IEEE30 bus test system is consolidated and
presented in Table 3.5. From the above investigation, it is understood that the
voltage magnitude and angle obtained from all the LM trained NN models using all
the three NN architectures is found to closely match with the voltage magnitude and
angle estimated using conventional method. Thus all the three LM trained NN
models performed equally well.
Case(ii) IEEE57 bus test system
The sample results for voltage magnitude of PQ bus no. 15 and angle of
PV bus no. 12 estimated using SLFF-NN, MLFF-NN and CC-NN for the IEEE57
bus test system is presented in Figure 3.12, Figure 3.13 and Figure 3.14 respectively.
The test MSE of voltage magnitude for all the PQ buses using all the three
architectures namely SLFF-NN, MLFF-NN and CC-NN is consolidated and
presented in Table 3.6. The test MSE of voltage angle for all the PV & PQ buses
using all the three architectures is consolidated and presented in Table 3.7.
54
(a)
(b)
Figure 3.12 Voltage magnitude and angle estimated using SLFF-NN for IEEE57 bus test System (a) Voltage Magnitude for bus no. 15 (b) Voltage angle for bus no. 12
55
(a)
(b)
Figure 3.13 Voltage magnitude and angle estimated using MLFF-NN for IEEE57 bus test system (a) Voltage magnitude for bus 15 no. (b) Voltage angle for bus no. 12
56
(a)
(b)
Figure 3.14 Voltage magnitude and angle estimated using CC-NN for IEEE57 bus test system (a) Voltage magnitude for bus no. 15 (b) Voltage angle for bus no. 12
57
Table 3.6 MSE of voltage magnitude for various NN architectures-IEEE57 bus test system
SL.NO BUS NO ERROR_ SLFF ERROR_ MLFF ERROR_ CC
1 4 7.9171x10-11 6.3593x10-09 8.2636x10-11
2 5 6.3531x10-11 3.2110x10-09 1.0758x10-10
3 7 2.0504x10-10 8.8919x10-10 2.0540x10-10
4 10 4.1744x10-10 2.0971x10-09 4.4653x10-10
5 11 7.2983x10-10 2.4049x10-08 7.4438x10-10
6 13 1.1570x10-09 4.9427x10-08 1.1798x10-09
7 14 2.2324x10-09 9.1525x10-08 2.2647x10-09
8 15 1.4229x10-09 1.0157x10-07 1.5123x10-09
9 16 1.5275x10-09 1.1973x10-07 1.5812x10-09
10 17 2.2266x10-09 1.5712x10-07 2.3138x10-09
11 18 1.4035x10-09 1.6074x10-08 1.4107x10-09
12 19 5.3150x10-09 4.2471x10-08 5.3349x10-09
13 20 7.1812x10-09 6.5305x10-08 7.2408x10-09
14 21 8.4362x10-09 1.2446x10-07 8.4740x10-09
15 22 8.5747x10-09 1.3367x10-07 8.6308x10-09
16 23 8.9016x10-09 1.3359x10-07 9.0720x10-09
17 24 1.2077x10-08 1.1718x10-07 1.2135x10-08
18 25 2.9816x10-08 2.2785x10-07 3.0022x10-08
19 26 9.4686x10-09 9.7404x10-08 9.4972x10-09
20 27 3.9937x10-09 2.4719x10-08 4.0426x10-09
21 28 2.1098x10-09 9.1088x10-09 2.1125x10-09
22 29 1.0871x10-09 3.2942x10-09 1.0916x10-09
23 30 3.6451x10-08 2.6306x10-07 3.6827x10-08
24 31 4.5680x10-08 3.2368x10-07 4.6018x10-08
25 32 3.6226x10-08 3.0593x10-07 3.6667x10-08
26 33 3.7106x10-08 3.0948x10-07 3.7344x10-08
58
Table 3.6 (Continued)
SL.NO BUS NO ERROR_ SLFF ERROR_ MLFF ERROR_ CC
27 34 1.9785x10-08 1.7768x10-07 1.9923x10-08
28 35 1.7337x10-08 1.6458x10-07 1.7514x10-08
29 36 1.4650x10-08 1.5380x10-07 1.4835x10-08
30 37 1.2740x10-08 1.4873x10-07 1.2807x10-08
31 38 7.9854x10-09 1.3577x10-07 8.0427x10-09
32 39 1.3019x10-08 1.4776x10-07 1.3125x10-08
33 40 1.4858x10-08 1.5107x10-07 1.4991x10-08
34 41 5.0816x10-09 5.5489x10-08 5.1183x10-09
35 42 1.0889x10-08 7.8821x10-08 1.0962x10-08
36 43 1.7096x10-09 3.3943x10-08 1.7213x10-09
37 44 6.4029x10-09 1.5428x10-07 6.4873x10-09
38 45 2.2349x10-09 1.5969x10-07 2.2816x10-09
39 46 3.8077x10-09 1.2722x10-07 3.9023x10-09
40 47 6.0193x10-09 1.2751x10-07 6.0616x10-09
41 48 6.5687x10-09 1.2555x10-07 6.7084x10-09
42 49 5.5014x10-09 9.0261x10-08 5.5910x10-09
43 50 5.6430x10-09 4.8428x10-08 5.7016x10-09
44 51 1.3666x10-09 6.2307x10-09 1.3692x10-09
45 52 3.6901x10-09 1.7895x10-09 3.6905x10-09
46 53 4.9735x10-09 1.4814x10-09 4.9764x10-09
47 54 1.9295x10-09 5.2140x10-10 1.9334x10-09
48 55 1.1492x10-10 4.7514x10-11 1.3748x10-10
49 56 1.2385x10-08 1.0234x10-07 1.2447x10-08
50 57 1.4158x10-08 1.2000x10-07 1.4226x10-08
59
Table 3.7 MSE of voltage angle for various NN architectures-IEEE57 bus test system
SL.NO BUS NO ERROR_ SLFF ERROR_ MLFF ERROR_ CC
51 2 1.7618x10-05 1.1538x10-05 1.7654x10-05
52 3 2.9994x10-04 4.9683x10-05 3.0026x10-04
53 4 4.5205x10-04 4.3681x10-05 4.5263x10-04
54 5 7.3162x10-04 6.1742x10-05 7.3216x10-04
55 6 8.7253x10-04 7.6791x10-05 8.7333x10-04
56 7 0.0010 1.0584x10-04 0.0010
57 8 0.0011 1.2677x10-04 0.0011
58 9 0.0010 9.5262x10-05 0.0010
59 10 8.8970x10-04 7.6730x10-05 8.9065x10-04
60 11 8.1267x10-04 7.3194x10-05 8.1353x10-04
61 12 7.6464x10-04 6.6962x10-05 7.6548x10-04
62 13 6.3496x10-04 5.7158x10-05 6.3570x10-04
63 14 5.0717x10-04 4.7236x10-05 5.0777x10-04
64 15 3.0778x10-04 2.7053x10-05 3.0812x10-04
65 16 4.3673x10-04 4.3390x10-05 4.3736x10-04
66 17 1.2848x10-04 1.1843x10-05 1.2861x10-04
67 18 6.1246x10-04 5.2033x10-05 6.1318x10-04
68 19 6.9273x10-04 5.8938x10-05 6.9345x10-04
69 20 7.1470x10-04 6.4375x10-05 7.1545x10-04
70 21 7.2094x10-04 6.3839x10-05 7.2187x10-04
71 22 7.2104x10-04 6.5677x10-05 7.2172x10-04
72 23 7.3247x10-04 6.6556x10-05 7.3350x10-04
73 24 9.0108x10-04 7.9472x10-05 9.0214x10-04
74 25 0.0012 2.4749x10-04 0.0012
75 26 9.0880x10-04 8.4468x10-05 9.0958x10-04
76 27 0.0011 9.7153x10-05 0.0011
77 28 0.0011 1.0306x10-04 0.0011
78 29 0.0011 1.0607x10-04 0.0011
79 30 0.0013 3.1166x10-04 0.0013
60
Table 3.7 (Continued)
SL.NO BUS NO ERROR_ SLFF ERROR_ MLFF ERROR_ CC
80 31 0.0013 4.2607x10-04 0.0013
81 32 0.0012 2.9503x10-04 0.0012
82 33 0.0012 3.0027x10-04 0.0012
83 34 8.0316x10-04 7.0727x10-05 8.0414x10-04
84 35 7.8886x10-04 6.9665x10-05 7.8966x10-04
85 36 7.7416x10-04 6.8776x10-05 7.7512x10-04
86 37 7.5776x10-04 6.7985x10-05 7.5886x10-04
87 38 6.9934x10-04 6.4391x10-05 7.0022x10-04
88 39 7.6328x10-04 6.8216x10-05 7.6436x10-04
89 40 7.8309x10-04 6.8908x10-05 7.8407x10-04
90 41 9.8153x10-04 8.2372x10-05 9.8286x10-04
91 42 0.0010 8.7775x10-05 0.0010
92 43 8.5916x10-04 7.5301x10-05 8.6014x10-04
93 44 6.1327x10-04 6.0597x10-05 6.1396x10-04
94 45 4.3191x10-04 4.1906x10-05 4.3234x10-04
95 46 5.9100x10-04 5.4717x10-05 5.9164x10-04
96 47 6.7293x10-04 6.1079x10-05 6.7363x10-04
97 48 6.8853x10-04 6.2363x10-05 6.8938x10-04
98 49 7.4833x10-04 6.4803x10-05 7.4931x10-04
99 50 8.4195x10-04 7.1111x10-05 8.4302x10-04
100 51 9.2015x10-04 7.6379x10-05 9.2145x10-04
101 52 0.0012 1.1245x10-04 0.0012
102 53 0.0012 1.1388x10-04 0.0012
103 54 0.0011 1. 1325x10-04 0.0011
104 55 0.0011 1.0556x10-04 0.0011
105 56 0.0010 8.6193x10-05 0.0010
106 57 0.0010 8.8643x10-05 0.0010
61
Table 3.8 Performance comparison of LM trained NN models designed using SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE for IEEE57 bus test system
Test Case Average Test MSE for
SLFF-NN Average Test MSE
for MLFF-NN Average Test
MSE for CC-NN
IEEE 57 bus test system
4.3307×10-4 4.9513×10-5 4.3364×10-4
The average test MSE for all IEEE57 bus test system is consolidated and
presented in Table 3.8. From the above investigation, it is understood that the
voltage magnitude and angle obtained from all the LM trained NN models using all
the three NN architectures is found to closely match with the voltage magnitude and
angle estimated using conventional method. Thus all the three LM trained NN
models performed equally well.
Case(iii) IEEE118 bus test system
The sample results for voltage magnitude of PQ bus no. 114 and angle of
PQ bus no. 118 estimated using SLFF-NN, MLFF-NN and CC-NN for the IEEE118
bus test system is presented in Figure 3.14, Figure 3.15 and Figure 3.16 respectively.
The test MSE of voltage magnitude for all the PQ buses using all the three
architectures namely SLFF-NN, MLFF-NN and CC-NN is consolidated and
presented in Table 3.9. The test MSE of voltage angle for all the PV & PQ buses
using all the three architectures is consolidated and presented in Table 3.10.
62
(a)
(b)
Figure 3.15 Voltage magnitude and angle estimated using SLFF-NN for IEEE118 bus test System (a) Voltage magnitude for bus no. 114 (b) Voltage angle for bus no. 118
63
(a)
(b)
Figure 3.16 Voltage magnitude and angle estimated using MLFF-NN for IEEE118 bus test system (a) Voltage magnitude for bus no. 114 (b) Voltage angle for bus no. 118
64
(a)
(b)
Figure 3.17 Voltage magnitude and angle estimated using CC-NN for IEEE118 bus test system (a) Voltage magnitude for bus no. 114 (b) Voltage angle for bus no. 118
65
Table 3.9 MSE of voltage magnitude for various NN architectures-IEEE118 bus test system
Table 3.11 Performance comparison of LM trained NN Models designed using SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE for IEEE118 bus test system
Test Case Average Test MSE for
SLFF-NN
Average Test MSE
for MLFF-NN
Average Test
MSE for CC-NN
IEEE 118 bus
test system 2.90×10-4 8.45×10-5 2.90×10-4
The average test MSE for all IEEE118 bus test system is consolidated
and presented in Table 3.11. From the above investigation, it is understood that the
voltage magnitude and angle obtained from all the LM trained NN models using all
the three NN architectures is found to closely match with the voltage magnitude and
angle estimated using conventional method. Thus all the three LM trained NN
models performed equally well.
Case(iv) Indian practical 76 bus test system
The sample results for voltage magnitude of PQ bus no. 54 and angle of
PQ bus no. 40 estimated using SLFF-NN, MLFF-NN and CC-NN for the Indian
practical 76 bus test system is presented in Figure 3.18, Figure 3.19 and Figure 3.20
respectively. The test MSE of voltage magnitude for all the PQ buses found all the
three architectures namely SLFF-NN, MLFF-NN and CC-NN is consolidated and
presented in Table 3.12. The test MSE of voltage angle for all the PV & PQ buses
using all the three architectures is consolidated and presented in Table 3.13.
71
(a)
(b)
Figure 3.18 Voltage magnitude and angle estimated using SLFF-NN for indian practical 76 test System (a) Voltage magnitude for bus no. 54 (b) Voltage ANGLE for bus no. 40
72
(a)
(b)
Figure 3.19 Voltage magnitude and angle estimated using MLFF-NN for Indian practical 76 Test System (a) Voltage magnitude for bus no. 54 (b) Voltage angle for bus no. 40
73
(a)
(b)
Figure 3.20 Voltage magnitude and angle estimated using CC-NN for Indian practical 76 test system (a) Voltage magnitude for bus no. 54 (b) Voltage angle for bus no. 40
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Table 3.12 MSE of voltage magnitude for various NN architectures- Indian practical 76 bus test system
Table 3.14 Performance comparison of LM Trained NN models designed using SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE for Indian practical 76 bus test system
Test Case Average Test MSE for SLFF-NN
Average Test MSE for MLFF-NN
Average Test MSE for CC-NN
Indian Practical 76 bus test System
2.48×10-4 2.59×10-4 8.86×10-5
The average test MSE for all Indian practical 76 bus test system is
consolidated and presented in Table 3.14. From the above investigation, it is
understood that the voltage magnitude and angle obtained from all the LM trained
NN models using all the three NN architectures is found to closely match with the
voltage magnitude and angle estimated using conventional method. Thus all the
three LM trained NN models performed equally well.
The average test MSE for all the four test cases is consolidated and
presented in Table 3.15. For all the four test cases LM trained SLFF-NN, MLFF-NN
and CC-NN architectures performed equally well.
Table 3.15 Performance comparison of LM Trained NN models designed using SLFF-NN, MLFF-NN and CC-NN in terms of average test MSE for various test cases
Test Case Average Test MSE for SLFF-NN
Average Test MSE for MLFF-NN
Average Test MSE for CC-NN
IEEE 30 bus test system 8.2183×10-5 8.0437×10-5 8.1784×10-5
IEEE 57 bus test system 4.3307×10-4 4.9513×10-5 4.3364×10-4
IEEE 118 bus test system 2.90×10-4 8.45×10-5 2.90×10-4
Indian Practical 76 bus test System 2.48×10-4 2.59×10-4 8.86×10-5
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3.4 TESTING OF NN ARCHITECTURES FOR POWER FLOW
ANALYSIS IN TERMS OF STRUCTURAL COMPACTNESS AND
COMPUTATIONAL COMPLEXITY
The structural compactness and computational complexity assumes
importance in real time implementation. This is the motivation to compare all the
NN models in terms of structural compactness and computational complexity. For
the desired accuracy, the number of hidden neurons is used as an index to measure
the structural compactness of model. The neural network architecture with lesser
number of hidden neurons is found to be compact and gives ease in real time
implementation of the on-line power flow analysis. The number of parameters and
nonlinear function extraction in the network indicates its computational complexity.
Each parameter warrants some mathematical operations. The number of parameters
for FF-NN and CC-NN can be calculated using equation (2.23) and equation (2.24)
respectively.
For various test cases, the parameters, neurons and computations required
by the SLFF-NN, MLFF-NN and CC-NN models are tabulated in Table 3.16. From
the Table 3.16, it is seen that for IEEE30 bus test system, SLFF-NN and MLFF-NN
requires 8 and 16 hidden neurons respectively, where as CC-NN model requires
much lesser number of hidden neurons 4 as compared to SLFF-NN and MLFF-NN
models. For IEEE57 bus test system, SLFF-NN and MLFF-NN requires 8 and 18
hidden neurons respectively, where as CC-NN model requires much lesser number
of hidden neurons 4 as compared to SLFF-NN and MLFF-NN models. For IEEE118
bus test system, SLFF-NN and MLFF-NN requires 13 and 14 hidden neurons
respectively, where as CC-NN model requires much lesser number of hidden
neurons 6 as compared to SLFF-NN and MLFF-NN models. For practical Indian
Practical 76 bus test system, SLFF-NN and MLFF-NN requires 8 and 18 hidden
neurons respectively, where as CC-NN model requires much lesser number of
hidden neurons 4 as compared to SLFF-NN and MLFF-NN models.
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Table 3.16 Performance comparison of LM trained NN models for power flow analysis in terms of structural compactness and Computational complexity