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Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-1Chap. 3 Describing Logic Circuits
Chapter Outcomes (Objectives)
Perform the three basic logic operations. Describe the operation of and construct the truth tables for the AND, NAND,
OR, and NOR gates, and the NOT (INVERTER) circuit. Draw timing diagrams for the various logic-circuit gates. Write the Boolean expression for the logic gates and combinations of logic
gates. Implement logic circuits using basic AND, OR, and NOT gates. Use Boolean algebra to simplify complex logic circuits. Use DeMorgan’s theorems to simplify logic expressions. Use either of the universal gates (NAND or NOR) to implement a circuit
represented by a Boolean expression. Explain the advantages of constructing a logic-circuit diagram using the
alternate gate symbols versus the standard logic-gate symbols. Describe the concept of active-LOW and active-HIGH logic signals.
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-2Chap. 3 Describing Logic Circuits
Chapter Outcomes (Objectives) – cont.
Describe and measure propagation delay time. Use several methods to describe the operation of logic circuits. Interpret simple circuits defined by a hardware description language (HDL). Explain the difference between an HDL and a computer programming
language. Create an HDL file for a simple logic gate. Create an HDL file for combinational circuits with intermediate variables.
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-3Chap. 3 Describing Logic Circuits
Logic Gates : the basic elements of logic circuits(AND, OR, NOT,...) Boolean Algebra
A tool for the analysis and design of digital systems Describes relationship between logic circuit’s inputs and outputs Used to help simplify a logic circuit
3-1 Boolean constants and variables
Only two possible values (Many different terms used synonymously)
Logic level 0 Low /1 High 0 and 1 do not present actual
numbers but instead represent the state of a voltage variable(High/Low)
3-2 Truth tables Describing how a logic circuit’s
output depends on the logic level of circuit’s input(2N possible inputs)
Fig. 3-1 Truth Table(2, 3, 4 inputs)
Logic 0 Logic 1FALSE TRUE
Off OnLow HighNo Yes
Open Close
A B x
0 0 1
0 1 0
1 0 1
1 1 0
A B C x0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 01 1 0 01 1 1 1
OR Gate : Fig. 3-2(b) Multiple input OR Gate : Fig. 3-3 Summary of the OR operation Exam. 3-1, 3-2, 3-3A, 3-3B
3-4 AND Operation with AND gates Output x is 1 only when all inputs are 1 Boolean expression : x = AB = A•B AND Gate : Fig. 3-7(b) Multiple input AND Gate : Fig. 3-8 Summary of the AND operation Exam. 3-4, 3-5A, 3-5B
A B x= A+B
0 0 0
0 1 1
1 0 1
1 1 1
A B C x= A+B+C0 0 0 00 0 1 10 1 0 10 1 1 11 0 0 11 0 1 11 1 0 11 1 1 1
Fig. 3-2 Truth Table and Symbol Fig. 3-3 Three-input OR
AB
ABC
X= A+B X= A+B+C
A B x= AB
0 0 0
0 1 0
1 0 0
1 1 1
A B C x= ABC0 0 0 00 0 1 00 1 0 00 1 1 01 0 0 01 0 1 01 1 0 01 1 1 1
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-5
3-5 NOT Operation Single input operation, Complement of input NOT operation : x= A NOT circuit : Inverter(Fig. 3-11(b)) App. 3-1 : typical application of NOT gate
Boolean logic can describe any logic circuit by Boolean expression. Order of precedence : Parentheses, NOT, AND, OR (Next Slide) AꞏB+C can be interpreted in various ways : Fig. 3-13
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-6
Evaluation rule for Boolean expression1) Perform all inversions of single terms2) Perform all operations within parentheses3) Perform an AND operation before an OR operation4) If an expression has a bar over it, perform the expression first and then
invert the result Determining output level from a diagram
The output can be determined directly from the circuit diagram without using Boolean expression.
Analysis Using a Table The best way to analyze a combinational logic circuit Analyze one gate or logic combination at a time Easily double check your work Benefit in troubleshooting the logic circuit
Fig. 3-15(a) Determining the output from a diagram
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-7
Analysis of a logic circuit using truth tables : Fig. 3-161) List all input combinations : A, B, C2) Create column for each intermediate signal (node) : u, v, w neither inputs nor output3) Fill the u, v, and w4) Fill the output x
Exam. 3-6 : Analyze the operation of Fig. 3-15(a) 3-8 Implementing circuits from Boolean expression
Circuit can be implemented from expression
Exam. 3-7 : draw circuit diagram Fig.3-18
BCACBACy
BCACBACy AC
BCACB
Fig. 3-17 Constructing a logic circuit from a Boolean expression
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-8
3-9 NOR gates and NAND gates NOR gate : Exam. 3-8, 3-9 NAND gate : Exam. 3-10, 3-11, 3-12
3-10 Boolean Theorems Single variable theorems Fig. 3-25(1)….(8)
x • 0 = 0, x • 1 = x, x • x = x, x • x = 0 x + 0 = x, x + 1 = 1, x + x = x, x + x = 1
Multivariable theorems x + y = y + x, x•y = y•x x + (y + z) = (x + y)+ z = x + y + z, x (yz) = (xy)z = xyz, x (y + z) = xy + xz, (w + x)(y + z) = wy + xy + wz + xz x + xy = x : P.114 Truth Table or x + xy = x(1+y) = x•1= x x + xy = x + y : (x + x)•(x + y) = 1 •(x + y) = x + y x + xy = x + y : (x + x)•(x + y) = 1 •(x + y) = x + y
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-16
3-16 Summary of Methods to Describe Logic Circuits 1. We must be able to represent these logical decisions.
The three basic logic functions are AND, OR, and NOT. 2. We must be able to combine these logic functions and implement a
decision-making system. If it is raining OR it looks like rain I will take an umbrella. If I get paid AND I go to the bank I will have money to spend.
Seatbelt warning indicator in a car : Exam. 3-24 3-17 Description Languages vs. Programming Languages
HDL – Hardware Description Languages to represent logic circuits. AHDL – Altera Hardware Description Language (Altera). VHDL – Very high speed integrated circuit Hardware Description Language
(DoD, IEEE). Hardware Description Languages vs. Programming Languages : Exam. 3-25
Hardware Description Language : to describe the hardware configuration of a circuit (Concurrent)
Programming Language : to represent a sequence of instructions intended to be carried out by a computer to accomplish some task (Sequential)- Fig. 3-43
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-17
3-18 Implementing Logic Circuits with PLDs : Fig. 3-44 Programmable Logic Devices (PLDs) are devices that can be configured
in many ways to perform logic functions. Internal connections are made electronically to program devices.
1 – connected, 0 – not connected The hardware description language defines the connections to be made
and is loaded into the device after translation by a compiler. Compiler :
A special application software to translate from the HDL into the grid of 1s and 0s that can be loaded into the PLD.
In details : Fig. 13-3 PLD Basic (next slide) 3-19 HDL Format and Syntax
Languages (interpreted by computers) must follows strict rules of syntax. Syntax refers to the order of elements.
Format refers to a definition of inputs, outputs, and how the output responds to the input (operation). Format of HDL files Fig. 3-46 Inputs and outputs may be called ports (the left & right of Fig. 3-45) – I/O
definitions How the output responds to the input (the middle of Fig. 3-45) – Functional
Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean Algebra
3-19
Boolean Description using AHDL Figure 3-47 defines an AND gate. The keyword SUBDESIGN names the circuit block, in this case and_gate The input and output definitions are enclosed in parenthesis. Variables are
separated by commas and follows by :INPUT; / :OUTPUT;. The logic section is between the BEGIN and END keywords. Operators
are: & = AND, # = OR, ! = NOT, $ = XOR
Boolean Description using VHDL Figure 3-48 defines an AND gate. The keyword ENTITY names the circuit block, in this case and_gate The keyword PORT defines the inputs and outputs. The keyword ARCHITECTURE describes the operation inside the block.
ARCHITECTURE name : ckt The BEGIN and END contain a description of the operation