Chap 11 SWITCHING CIRCUITS

BY:

PRIYANK SHAH PARIN

SHAH

Chap 11SWITCHING CIRCUITS

A Constituent Electric Circuit which receives, stores or manipulates information in coded form to accomplish the specified objective of the system is known as the Switching Circuit.

Switching Circuits performance can be presented as truth tables. They are two valued attributes where condition attribute represent input variable and decision attribute represent output variables.

INTRODUCTION

Applying rough set philosophy to switching function minimization,

Considering this input a,b,c,d and e from the switching circuit as condition attributes an d output f as the decision attribute.

MINIMIZATION OF PARTIAL DEFINED SWITCHING FUNCTIONS

abcde

f

U a b c d e f1 0 0 0 1 1 12 0 1 0 0 0 13 0 1 1 0 0 14 1 1 0 0 0 15 1 1 0 1 0 16 1 1 1 1 0 17 1 1 1 0 0 18 1 0 0 1 1 19 1 0 0 1 0 110 0 0 0 0 0 011 0 0 0 1 0 012 0 1 1 1 0 013 0 1 1 0 1 014 1 1 1 1 1 015 1 0 0 0 1 0

TABLE FOR MINIMIZATION

Combination of input variables not present in the table will never occur.

Table is consistent as combination of all input variable values are different, hence the corresponding switching functions is well defined.

Removing the variable a from the previous table we get the following table.

MINIMIZATION OF TABLE

U b c d e f1 0 0 1 1 12 1 0 0 0 13 1 1 0 0 14 1 0 0 0 15 1 0 1 0 16 1 1 1 0 17 1 1 0 0 18 0 0 1 1 19 0 0 1 0 110 0 0 0 0 011 0 0 1 0 012 1 1 1 0 013 1 1 0 1 014 1 1 1 1 015 0 0 0 1 0

Removing column a, we get

U a c d e f1 0 0 1 1 12 0 0 0 0 13 0 1 0 0 14 1 0 0 0 15 1 0 1 0 16 1 1 1 0 17 1 1 0 0 18 1 0 1 1 19 1 0 1 0 110 0 0 0 0 011 0 0 1 0 012 0 1 1 0 013 0 1 0 1 014 1 1 1 1 015 1 0 0 1 0

Removing column b we get:

U a b d e f1 0 0 1 1 12 0 1 0 0 13 0 1 0 0 14 1 1 0 0 15 1 1 1 0 16 1 1 1 0 17 1 1 0 0 18 1 0 1 1 19 1 0 1 0 110 0 0 0 0 011 0 0 1 0 012 0 1 1 0 013 0 1 0 1 014 1 1 1 1 015 1 0 0 1 0

Removing Column c ,

U a b c e f1 0 0 0 1 12 0 1 0 0 13 0 1 1 0 14 1 1 0 0 15 1 1 0 0 16 1 1 1 0 17 1 1 1 0 18 1 0 0 1 19 1 0 0 0 110 0 0 0 0 011 0 0 0 0 012 0 1 1 0 013 0 1 1 1 014 1 1 1 1 015 1 0 0 1 0

Removing column d, we get

U a b c d f1 0 0 0 1 12 0 1 0 0 13 0 1 1 0 14 1 1 0 0 15 1 1 0 1 16 1 1 1 1 17 1 1 1 0 18 1 0 0 1 19 1 0 0 1 110 0 0 0 0 011 0 0 0 1 012 0 1 1 1 013 0 1 1 0 014 1 1 1 1 015 1 0 0 0 0

Removing column e we get,

Variable c is superfluous in the definition of the switching .

Now combining the identical rules we get the following compact form of the table removing the column c.

ANALYSIS OF TABLE

U a b d e f1 0 0 1 1 12,3 0 1 0 0 14,7 1 1 0 0 15,6 1 1 1 0 18 1 0 1 1 19 1 0 1 0 110 0 0 0 0 011 0 0 1 0 012 0 1 1 0 013 0 1 0 1 014 1 1 1 1 015 1 0 0 1 0

COMPACT FORM OF THE TABLE

U a b d e f1 - - - 1 12,3 - 1 0 0 14,7 - - - - 15,6 1 - - 0 18 - 0 1 - 19 1 - - - 110 - 0 - - 011 0 - - 0 012 0 - - 0 013 - - - 1 014 - 1 - 1 015 - - 0 - 0

COMPUTE CORE VALUES

We can observe from the table that the decision rules

b1d0e0 f1 a1e0 f1 b1e1 f0 are reduced. Whereas remaining core values

d0 not form reducts.

Decision rules covering minimal set of all condition for each decision class are::

| b1d0e0 | = {2,3,4,7} | a1e0 | = {4,5,6,7,9}

• But Decision class “1” does not cover set {1,8}.• From table we find the missing rules are : |a0d1e1|={1} |b0d1e1|={1,8} |a0b0e1|={1} |a1b0d1|={8,9}

MINIMAL SET OF DECISION RULES

Thus the 3 minimal solution are :

(1)b1d0e0 V a1e0 V a0d1e1 f1

(2) b1d0e0 V a1e0 V b0d1e1 V a1b0d1 f1

(3)B1d0e0 V a1e0 V a0b0e1 V a1b0d1 f1

MINIMAL SOLUTION

The solution can be written in more convenient form

bd’e’ V ae’ V a’de f

Where x and x’ denotes variables without and with negation respectively.

The corresponding switching circuits can be easily implemented using “and” , “or” and “not” gates.

Synthesis of the multiple output switching function by treating the this kind of functions as single set of output functions and applying the procedures used previously.

Considering this input - a , b , c and d from the switching circuit as condition attributes and output - e and f as the decision attribute.

MULTIPLE-OUTPUT SWITCHING FUNCTION

abcd

ef

U a b c d e f1 0 0 0 1 1 1

2 1 1 1 1 0 1

3 1 1 1 0 0 1

4 1 0 0 1 1 1

5 1 0 1 1 0 1

6 0 0 0 0 0 0

7 0 1 0 1 0 0

8 0 1 1 1 0 0

9 0 1 1 0 1 0

10 1 0 0 0 1 0

TABLE FOR MINIMIZATION

U a b c d y1 0 0 0 1 ( 1 1 )

2 1 1 1 1 ( 0 1)

3 1 1 1 0 ( 0 1)

4 1 0 0 1 ( 1 1)

5 1 0 1 1 (0 1)

6 0 0 0 0 (0 0)

7 0 1 0 1 (0 0)

8 0 1 1 1 (0 0)

9 0 1 1 0 (1 0)

10 1 0 0 0 (1 0)

REPLACE DECISION ATTRIBUTE BY SINGLE FOUR VALUED VARIABLE Y.

U a b c d y1 0 0 0 0 i

2 0 1 0 1 i

3 0 1 1 1 i

4 1 1 1 1 ii

5 1 1 1 0 ii

6 1 0 1 1 ii

7 0 1 1 0 iii

8 1 0 0 0 iii

9 0 0 0 1 iv

10 1 0 0 1 iv

GROUP AND REMUNERATE ROWS OF THE TABLE W.R.T. OUTPUT VARIABLE

U b c D y1 0 0 0 i

2 1 0 1 i

3 1 1 1 i

4 1 1 1 ii

5 1 1 0 ii

6 0 1 1 ii

7 1 1 0 iii

8 0 0 0 iii

9 0 0 1 iv

10 0 0 1 iv

COMPUTE Y REDUCTS OF INPUT VARIABLE: REMOVING I/P VARIABLE a

U a c d y1 0 0 0 i

2 0 0 1 i

3 0 1 1 i

4 1 1 1 ii

5 1 1 0 ii

6 1 1 1 ii

7 0 1 0 iii

8 1 0 0 iii

9 0 0 1 iv

10 1 0 1 iv

COMPUTE Y REDUCTS OF INPUT VARIABLE: REMOVING I/P VARIABLE b

U a b d y1 0 0 0 i

2 0 1 1 i

3 0 1 1 i

4 1 1 1 ii

5 1 1 0 ii

6 1 0 1 ii

7 0 1 0 iii

8 1 0 0 iii

9 0 0 1 iv

10 1 0 1 iv

COMPUTE Y REDUCTS OF INPUT VARIABLE: REMOVING I/P VARIABLE c

U a b c y1 0 0 0 i

2 0 1 0 i

3 0 1 1 i

4 1 1 1 ii

5 1 1 1 ii

6 1 0 1 ii

7 0 1 1 iii

8 1 0 0 iii

9 0 0 0 iv

10 1 0 0 iv

COMPUTE Y REDUCTS OF INPUT VARIABLE: REMOVING I/P VARIABLE d

U a b c d y

1 0 - - 0 i

2 0 1 - - i

3 0 - - 1 i

4 1 - - - ii

5 1 - - - ii

6 - - 1 - ii

7 0 - - 0 iii

8 1 - - 0 iii

9 - 0 - 1 iv

10 - - 0 1 iv

COMPUTE CORE VALUES

REDUCT VALUE TABLE

U a b c d y1 0 - 0 0 i1’ 0 0 - 0 i2 0 1 0 - i2’ 0 1 - 1 i3 0 - 1 1 i3’ 0 1 - 1 i4 1 1 - - ii4’ 1 - 1 - ii5 1 1 - - ii5’ 1 - 1 - ii

REDUCT VALUE TABLE

U A b c d 11y6 - 0 1 - ii6’ 1 - 1 - ii7 0 1 - 0 iii7’ 0 - 1 0 iii8 1 0 - 0 iii8’ 1 - 0 0 iii9 0 0 - 1 iv9’ - 0 1 1 iv10 1 - 1 1 iv10’ - 0 1 1 iv

U a b c d y1’ 0 0 - 0 i2’,3’ 0 1 - 1 i4’,5’,6’ 1 - 1 - ii7 0 1 - 0 iii8 1 0 - 0 iii9’,10’ - 0 0 1 iv

MINIMAL SOLUTION

The equivalent decision algorithm from the above minimal solutions are as follows ::

1.) a0b0d0 i 2.) aob1d1 i 3.) a1c1 ii 4.) a0b1d0 iii 5.) a1b0d0 iii 6.) b0c0d1 iv OR

a0b0d0 V aob1d1 ia1c1 iia0b1d0 V a1b0d0 iiibocod1 iv

EQUIVALENT DECISION ALGORITHM

Representing the algorithm in boolean notation we get the following. Also by representing in this form it gives user with easy implementatio of the switching circuits using AND, OR and NOT gates.

a'b'd‘ i a'bd i ac ii a'bd' iii ab'd' iii b'c'd iv OR

a'b’d’ V a’bd i ac ii a'bd’ V ab’d’ iii b'c’d iv

DECISION ALGORITHM IN BOOLEAN NOTATION

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