Oct 14, 2015
Microcomputer Systems 1Introduction to DSPs
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*Veton Kpuska*Introduction to DSPsDefinition:DSP Digital Signal Processing/ProcessorIt refers to:Theoretical signal processing by digital means (subject of ECE3541), Specialized hardware (processor) that can process signals in real-time (subject of this course ECE3551&3)
This classs focus is on:Hardware Architecture of a real-world DSP platform: ADSP BlackFin Processor, Software Development on DSPs, andApplied Signal Processing theory and practice.
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*Veton Kpuska*Introduction to DSPsDSPs process signalsSignal a detectable physical quantity or impulse (as a voltage, current, or magnetic field strength) by which messages or information can be transmitted (Webster Dictionary)
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*Veton Kpuska*Introduction to DSPsSignal Characteristics:Signals are Physical Quantities:Signals are Measurable Signals are AnalogSignals Contain Information.
Examples:Temperature[oC]Pressure[Newtons/m2] or [Pa]Mass[kg]Speed[m/s]Acceleration[m/s2]Torque[Newton*m]Voltage[Volts]Current[Amps]Power[Watts]
In this class, analog signals are electrical.Sensors: are devices that convert other physical quantities (temperature, pressure, etc.) to electrical signals.
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*Veton Kpuska*Introduction to DSPsDSP process digital signals:Analog-to-Digital Converter (ADC)Binary representation of the analog signalDigital-to-Analog Converter (DAC)Digital representation of the signal is converted to continuous analog signal.
Analog Continuous
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*Veton Kpuska*ADCx(t)
Analog Low-pass FilterSample andHoldfsb) Amplitude Quantized Signal xa(nT)
x[n]
Quantizer DSPc) Amplitude & Time Quantized Digital Signal a) Continuous Signal
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*Veton Kpuska*Example of ADC
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*Veton Kpuska*DAC DSPDigital to AnalogConverterAnalog Low-pass Filtery[n]y(t)ya(nT)c) Continuous Low-pass filtered Signalb) Analog Signala) Digital Output Signal
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*Veton Kpuska*Why Processing Signals?Extraction of InformationAmplitudePhaseFrequencySpectral Content
Transform the SignalFDMA (Frequency Division Multiple Access)TDMA (Time Division Multiple Access)CDMA (Code Division Multiple Access)
Compress DataADPCM (Adaptive Differential Pulse Code Modulation)CELP (Code Excited Linear Prediction)MPEG (Moving Picture Experts Group)HDTV (High Definition TV)Generate Feedback Control SignalRobotics (ASIMOV)Vehicle ManufacturingProcess Control
Extraction of Signal in NoiseFilteringAutocorrelationConvolution
Store Signals in Digital Format for AnalysisFFT
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*Veton Kpuska*Digital Telephone Communication System Example:
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*Veton Kpuska*Typical Architecture of a DSP System SensorADCAnalog Signal ConditioningDigital Signal ConditioningDSPDACAnalog Signal ProcessingDigital Signal Processing
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*Veton Kpuska*Why Using DSP?Low-pass Filtering example:Chebyshev Analog Filter of Type I and Order 6, vs.FIR 129-Tap Filter
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*Veton Kpuska*Chebyshev Analog Filter of Type IChebyshev Type I (Pass-Band Ripple)6-Pole1.0 dB Pass-Band RippleNon-liner PhaseMATLAB: fdatoolOrder = 6Fs = 10,000 HzFpass = 1,000 HzApass = 1 [dB]
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*Veton Kpuska*Example of a 3-rd order Active low-pass filter implementation
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*Veton Kpuska*Magnitude Response of Chebyshev Filter Type I Order 6.
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*Veton Kpuska*Pass-Band Ripple 1.0 dB
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*Veton Kpuska*Digital Filter DesignFIR,129-Tap, Less then 0.002 dB Pass Band RippleLinear Phase
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*Veton Kpuska*FIR Filter Magnitude Response
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*Veton Kpuska*Less then 0.002 dB Pass-Band Ripple
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*Veton Kpuska*Analog vs. Digital ImplementationsAnalog Cons:Approximate Filter CoefficientsOnly standard components availableEnvironment Temperature dependentLess accurateCan be used only for designed purposePros:Operate in real-time
Digital (DSP)Cons:Real-time operation is dependent on the speed of processor and the complexity of problem at hand.Pros:Accurate Filter implementation to desired precisionOperation independent on the environment.FlexibleDSPs can be reprogrammed.
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*Veton Kpuska*DSP Implementation of the FIR Filter129-tap digital filter requires 129 multiply-accumulates (MAC)Operation must be completed within sampling interval (1/Fs) to maintain real-time.Fs=10000Hz = 10kHz 100 sADSP-21xx family performs MAC process in single instruction cycleInstruction rate > 129/100 s = 1.3 MIPSADSP-218x 16-bit fixed point series: 75 MIPS.
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