Ch1 Background

8/12/2019 Ch1 Background

1/27

1: Background 1

System Programming ()

Main goal:What is a system

software?

Compiler

Assembler

Loader and Linker

Debugger

To design andimplementation ofsystem software.

Book content:

Background (SIC & SIC/XE)

Assemblers

Loaders and LinkersMacro Processors

Compilers

Operating SystemsOther system software

Software Engineering Issues


2/27

1: Background 2

Chapter I: Background

Chapter goal:

To familiar with a pseudo

machines: SIC (SIC/XE)

SIC(Simplified Instructional

Computer)

SIC/XE

(XE stands for extra

equipment)

Overview: The SIC

SIC machine architecture

SIC programming examples

SIC/XE machine architecture

SIC/XE programmingexamples

Machine dependency


3/27

1: Background 3

Why using SIC machine?

Most system software differs from application

software is machine dependency.

System software are usually related to the architectureof the machine on which they are to run.

SIC is a hypothetical computer that has been carefully

designed to include the hardware features most oftenfound on real machine.

The SIC machine


4/27

1: Background 4

Memory 8-bit bytes

Word: 24 bits (three consecutive bytes)

Registers

Each register is 24 bits in length.

The SIC machine architecture


5/27

1: Background 5

Data formats

Addressing modes.

The SIC machine architecture (cont.)


6/27

1: Background 6

Instruction set Load and store registers (LDA, LDX, STA, STX, etc.)

Integer arithmetic operations (ADD, SUB, MUL, DIV)

Compare the value in register A with a wordin memory (COMP)

Conditional jump instructions (JLT, JEQ, JGT)

For detailed see Appendix A

Input and Output

Test device (TD), Read data (RD), Write data (WD)

The SIC machine architecture (cont.)


7/27

1: Background 7

Data movement

The SIC programming examples


8/27

1: Background 8

Arithmetic operations

The SIC programming examples (cont.)


9/27

1: Background 9

Looping and indexing operations


MOVECH

STR1

STR2

ZERO

ELEVEN


10/27

1: Background 10

Indexing and looping operations



11/27

1: Background 11

Input and output operations



12/27

1: Background 12

Subroutine call and record input operations



13/27

1: Background 13

Memory The same as that previously described for SIC.

Maximum memory available on a SIC/XE system is

1MB.

Registers

The SIC/XE machine architecture


14/27

1: Background 14

Data formats (48-bit floating point) f*2^(e-1024)

Instruction formats and addressing modes e=0 means Format 3 ; e=1 means Format 4

i=0, n=0 means SIC machine (for upward compatible)

i=1, n=0 means immediate addressing

i=0, n=1 means indirect addressing

i=1, n=1 means simple addressing

The SIC/XE machine architecture (cont.)


15/27

1: Background 15


16/27

1: Background 16


17/27

1: Background 17

Instruction set SIC/XE provides all of the instructions that are available on

the standard versions.

It also provides instructions to perform floating-point

arithmetic operations (ADDF, SUBF, MULF, DIVF..) Register-to-register arithmetic operations (ADDR,

SUBR,)

Input and Output

SIO (start I/O channel), TIO (test I/O channel) and HIO (haltI/O channel)

The SIC/XE machine architecture (cont.)


18/27

1: Background 18

Data movement

The SIC/XE programming examples


19/27

1: Background 19

Data movement

Compared the SIC with SIC/XE


20/27

1: Background 20

Arithmetic operations

The SIC/XE programming examples (cont.)


21/27

1: Background 21

Looping and indexing operations


MOVECH

STR1

STR2


22/27

1: Background 22

Indexing and looping operations



23/27

1: Background 23

Subroutine call and record input operations



24/27

1: Background 24

CISC: Complex Instruction Set Computers machine. relatively large and complicated instruction set.

several different instruction formats and length

many different addressing modes.

E.g., VAX, Pentium

The implementation of such an architecture inhardware tends to be complex.

CISC vs. RISC


25/27

1: Background 25

Introduced by Digital Equipment Corporation(DEC) in 1978.

Memory

All addresses used are byte addresses.

2 bytes forms a word, 4 bytes forms a longword 8 bytes forms a quadword, 16 bytes forms a octaword

Registers

16 general-purpose register. (R15: program counter,

R14: stack pointer, R13: frame pointer, R12: argumentpointer)

The VAX architecture (CISC)


26/27

1: Background 26

RISC: Reduced Instruction Set Computers machine Standard, fixed instruction length

Single-cycle execution of most instructions

Relatively large number of general-purpose registers

Relatively small number of machine instructions Relatively small number of instruction formats and

addressing modes.

E.g., UltraSPARC, PowerPC, Cray T3E

The implementation of such an architecture inhardware tends to be simple.

CISC vs. RISC


27/27

1: Background 27

Introduced by Sun Microsystem in 1995.

Memory

All addresses used are byte addresses.

2 bytes forms a halfword, 4 bytes forms a word

Registers

A large register file (more than 100 general-purpose

register)

Fixed instruction length

The UltraSPARC architecture (RISC)

Ch1 Background

Documents