Ch04

SEMICONDUCTOR MANUFACTURING - CLEAN ROOMS, WAFER CLEANING AND GETTERING- Chapter 4

Year of Production 1998 2000 2002 2004 2007 2010 2013 2016 2018

Technology Node (half pitch) 250 nm 180 nm 130 nm 90 nm 65 nm 45 nm 32 nm 22 nm 18 nm

MPU Printed Gate Length 100 nm 70 nm 53 nm 35 nm 25 nm 18 nm 13 nm 10 nm

DRAM Bits/Chip (Sampling) 256M 512M 1G 4G 16G 32G 64G 128G 128G

MPU Transistors/Chip (x106) 550 1100 2200 4400 8800 14,000

Critical Defect Size 125 nm 90 nm 90 nm 90 nm 90 nm 90 nm 65 nm 45 nm 45 nm

Starting Wafer Particles (cm-2 ) <0.35 <0.18 <0.09 <0.09 <0.05 <0.05

Starting Wafer Total Bulk Fe (cm-3 ) 3x1010 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010

Metal Atoms on Wafer Surface

After Cleaning (cm-2 )

5x109 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010 1x1010

Particles on Wafer Surface After

Cleaning (#/wafer)

75 80 86 195 106 168

Three Tiered Approach

Modern IC Factories Employ a Three Tiered Approach to Controlling Unwanted Impurities

• 1. Clean Factories, Clean Room with Clean Environment: Air is Filtered, Machines Designed to Produce Minimum Particles, and Ultra Pure Chemicals and Gases Are used in Wafer Processing

• 2. Wafer Cleaning is Done Often and Thoroughly to Remove Particles and Contaminant Films on the Wafer Before They Get in to the Devices

• 3. Gettering: A Method by which unwanted impurities that get into wafer are pushed to non critical parts of wafer, typically wafer backside or wafer bulk, far away from active devices on the top wafer surface

Silicon Wafer

SiO2 or other thin films

PhotoresistAu

Cu

Fe

Particles

Interconnect Metal

Na

N, P

• Contaminants may consist of particles, organic films (photoresist), heavy metals or alkali ions.

Level 1 Contamination Reduction: Clean Factories

• Particles may originate from People, Machines, Chemicals, and Process Gases

• Particles may be Airborne or Suspended in Liquids and Gases

• Air Quality is Measured by the “Class” of the Facility

• Class X Means in Cubic Foot of Air There are Less Than X Total Particles Greater than 0.5 um.

• Typical Office Bldg is Class 100,000(Photo courtesy of Stanford Nanofabrication Facility.)

Factory environment is cleaned by:• Hepa Filters and Recirculation for Air,• “Bunny Suits” for Workers.• Filtration of Chemicals and Gases.• Manufacturing Protocols.

• In Clean Rooms Most Concern are 10 nm and 10 um Particles

• People Typically Emit Several Hundred Particles per Minute from Each cm2 Surface Area (5-10 million Particles per Minute per Person Typical). [Robots to Minimize Particle Generation]

• Bunny Suits to Cover Bodies and Clothing to Block Particle Emission

• Face Masks to Prevent Exhale of Particles

• Air Showers at Entrance

• Specially designed Machines to Minimize Particle generation

• Material Used Inside Clean Rooms are also Special

• Constant Air Filtration to Remove Particles as They are Generated

• Filtration of Chemicals to Minimize Particles coming from there

Level 2 Contamination Reduction: Wafer Cleaning

• RCA clean is “standard process” used to remove organics, heavy metals and alkali ions.

• Ultrasonic agitation is used to dislodge particles.

120 - 150ÞC 10 min

Strips organics especially photoresist

DI H2O Rinse Room T

80 - 90ÞC 10 min

Strips organics, metals and particles

DI H2O Rinse Room T

80 - 90ÞC 10 min

Strips alkali ions and metals

Room T 1 min

Strips chemical oxide

DI H2O Rinse Room T

H2SO4/H2O2 1:1 to 4:1

HF/H2O 1:10 to 1:50

NH4OH/H2O2/H2O 1:1:5 to 0.05:1:5

SC-1

HCl/H2O2/H2O 1:1:6 SC-2

Level 3 Contamination Reduction: Gettering

• Gettering is used to remove metal ions and alkali ions from device active regions.

H 1.008

1

3 4

11 12

19 20

Li 6.941

Be 9.012

Na 22.99

Mg 24.31

K 39.10

Ca 40.08

Rb 85.47

Cs 132.9

Fr 223

Sr 87.62

Ba 137.3

Ra 226

37 38

55 56

87 88

Sc 44.96

Ti 47.88

V 50.94

Cr 51.99

Mn 54.94

Fe 55.85

Co 58.93

Ni 58.69

Cu 63.55

Zn 65.39

21 22 23 24 25 26 27 28 29 30

Y 88.91

Zr 91.22

Nb 92.91

Mo 95.94

Tc 98

Ru 101.1

Rh 102.9

Pd 106.4

Ag 107.9

Cd 112.4

39 40 41 42 43 44 45 46 47 48

La 138.9

Hf 178.5

Ta 180.8

W 183.9

Re 186.2

Os 190.2

Ir 192.2

Pt 195.1

Au 197.0

Hg 200.6

57 72 73 74 75 76 77 78 79 80

Ac 227.0

Unq 261

Unp 262

Unh 263

Uns 262

89 104 105 106 107

B 10.81

Al 26.98

Ga 69.72

In 114.8

Tl 204.4

C 12.01

Si 28.09

Ge 72.59

Sn 118.7

Pb 207.2

N 14.01

P 30.97

As 74.92

Sb 121.8

Bi 209.0

O 16.00

S 32.06

Se 78.96

Te 127.6

Po 209

F 19.00

Cl 35.45

Br 79.90

I 126.9

At 210

He 4.003

Ne 20.18

Ar 39.95

Kr 83.80

Xe 131.3

Rn 222

5 6 7 8 9 10

2

13 14 15 16 17 18

31 32 33 34 35 36

49 50 51 52 53 54

81 82 83 84 85 86

Period

1

2

3

4

5

6

7

I A

IIA

IIIB

IVB

VA

I BIIB

III A IV A

VB

VIB

VIIB

VIII

VIA VIIA

Noble Gases

Sh

allow

Don

ors

Sh

allow

Acc

epto

rs

Ele

men

tal

Sem

icon

du

ctors

Deep Level Impurites in Silicon

Alkali Ions

• For the alkali ions, gettering generally uses dielectric layers on the topside (PSG or barrier Si3N4 layers).• For metal ions, gettering generally uses traps on the wafer backside or in the wafer bulk.• Backside = extrinsic gettering. Bulk = intrinsic gettering.

Devices in near surface region

Denuded Zone or Epi Layer

Intrinsic Gettering

Region

Backside Gettering

Region

10 - 20 µm

500+ µ m

PSG Layer

• Heavy metal gettering relies on: • Metals diffusing very rapidly in silicon. • Metals segregating to “trap” sites.

• “Trap” sites can be created by SiO2 precipitates (intrinsic gettering), or by backside damage (extrinsic gettering).

• In intrinsic gettering, CZ silicon is used and SiO2 precipitates are formed in the wafer bulk through temperature cycling at the start of the process.

SiO2 precipitates (white dots) in bulkof wafer.

Modeling Particle Contamination and Yield

• ≈ 75% of yield loss in modern VLSI fabs is due to particle contamination.

• Yield models depend on information about the distribution of particles.

• Particles on the order of 0.1 - 0.3 µm are the most troublesome: • larger particles precipitate easily • smaller ones coagulate into larger particles

Summary of Key Ideas

• A three-tiered approach is used to minimize contamination in wafer processing.

• Particle control, wafer cleaning and gettering are some of the "nuts and bolts" of chip manufacturing.

• The economic success (i.e. chip yields) of companies manufacturing chips today depends on careful attention to these issues.

• Level 1 control - clean factories through air filtration and highly purified chemicals and gases.

• Level 2 control - wafer cleaning using basic chemistry to remove unwanted elements from wafer surfaces.

• Level 3 control - gettering to collect metal atoms in regions of the wafer far away from active devices.

• Bottom line is chip yield. Since "bad" die are manufactured alongside "good" die, increasing yield leads to better profitability in manufacturing chips.