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a. ModulePin-out......................................................................................09b. PinDescription......................................................................................10
a. AbsoluteMaximumRatings.............................................................12b. RecommendedOperatingRatings................................................12c. Current......................................................................................................12
1.GeneralDescriptionThemoduleCBTMN320008_1.0isamultiprotocolmodulethatsupportsBluetooth5.0stackfor BLE (Bluetooth Low Energy) and is designed for high data rate short-range wirelesscommunication in the 2.4GHz ISM band. Further themodule supports SIGMESH protocolandANTprotocol.ThemoduleisbasedonNordicSemiconductorchipsetNRF52832radiotransceiverICthathasa32bitARMCortex-M4FCPU,Flashmemoryandanaloganddigitalperipherals. The CBTMN320008_1.0 module provides a low power and ultra-low costsolution for wireless transmission applications. The module also supports NFC-A taginterfaceforOOBpairing.
a. ComputerperipheralsandI/OdeviceslikeMouse,Keyboard,Multi-touchtrack-padb. Interactive entertainment devices like Remote control, 3D Glasses and Gaming
key-fobsandwristwatchesd. Remotecontroltoyse. Beaconsf. BluetoothGatewayg. Indoorusage like homeappliances,meshcontrolled lighting systems, color control
5.2.2Two-wireInterface(I2CCompatible)Thetwo-wireinterfacecancommunicatewithabi-directionalwired-ANDbuswithtwolines(SCL, SDA). The protocol makes it possible to interconnect up to 127 individuallyaddressable devices. The interface is capable of clock stretching, supporting data rates of100kbps,250kbpsand400kbps.5.2.3FlashProgramI/OsThemodulehastwoprogrammerpins,respectivelySWDCLKpinandSWDIOpin.ThetwopinSerialWireDebug(SWD) interfaceprovidedasapartof theDebugAccessPort(DAP)offers a flexible and powerful mechanism for non-intrusive debugging of program code.Breakpointsandsinglesteppingarepartofthissupport.
5.2.4SerialPeripheralInterfaceThe SPI interfaces enable full duplex synchronous communication between devices. Theysupportathree-wire(SCK,MISO,MOSI)bi-directionalbuswithfastdatatransfers.TheSPIMastercancommunicatewithmultipleslavesusingindividualchipselectsignalsforeachofthe slave devicesattached toabus.Control of chip select signals is left to theapplicationthroughuseofGPIOsignals.SPIMasterhasdoublebufferedI/Odata.TheSPISlaveincludesEasyDMAfordatatransferdirectlytoandfromRAMallowingSlavedatatransferstooccurwhiletheCPUisIDLE.TheGPIOsareusedforeachSPIinterfacelinecanbechosenfromanyGPIOs on the device and configed independently. This enables great flexibility in devicepinoutandefficientuseofprintedcircuitboardspaceandsignalrouting.TheSPIperipheral support SPImode0,1,2,and 3.Themodulehave3SPI ports and theirstheypropertiesareasbelow:
5.2.5UARTsThe Universal Asynchronous Receiver/Transmitter offers fast, full-duplex, asynchronousserial communicationwith built-in flow control (CTS, RTS), support in hardware up to 1Mbps baud. Parity checking is supported. Support the following baud rate in bps unit:1200/2400/4800/9600/14400/19200/28800/38400/57600/76800/115200.Note: TheGPIOs are used for each SPI/TWI/UART interface line can be chosen from anyGPIOsonthedeviceandconfigedindependently.5.2.6AnalogtoDigitalConverter(ADC)The 12 bit incremental Analog to Digital Converter (ADC) enables sampling of up to 8external signals through a front-end multiplexer. The ADC has configurable input andreferenceprescaling,andsampleresolution(8,10,and12bit).Note:TheADCmoduleusesthesameanaloginputsastheLPCOMPmodule.Onlyoneofthemodulescanbeenabledatthesametime.
5.2.7LowPowerComparator(LPCOMP)InSystemON,theblockcangenerateseparateeventsonrisingandfallingedgesofasignal,orsamplethecurrentstateofthepinasbeingaboveorbelowthethreshold.Theblockcanbe configured to use any of the analog inputs on the device. Additionally, the lowpowercomparatorcanbeusedasananalogwakeupsource fromSystemOFForSystemON.Thecomparatorthresholdcanbeprogrammedtoarangeoffractionsofthesupplyvoltage.5.2.8ResetThe reset pin of themodule is in the internal pull-high state , when the reset pin of themoduleisinputtoalowlevel,themodulewillbeautomaticallyreset.Aftertheresetpinisused,theparametersofthecurrentsettingwillnotbeANT.5.2.9NFCThe NFC peripheral (referred to as the 'NFC peripheral' from now on) supportscommunicationsignalinterfacetypeAand106kbpsbitratefromtheNFCForum.Withappropriatesoftware,theNFCperipheralcanbeusedtoemulatethelisteningdeviceNFC-AasspecifiedbytheNFCForum.ListedherearethemainfeaturesfortheNFCperipheral:•NFC-Alistenmodeoperation•13.56MHzinputfrequency•Bitrate106kbps•Wake-on-fieldlowpowerfielddetection(SENSE)mode•FrameassembleanddisassemblefortheNFC-AframesspecifiedbytheNFCForum•Programmableframetimingcontroller•Integratedautomaticcollisionresolution,CRCandparityfunctions
8.PCBDesignGuidePlease reserve empty area for PCB Antennawhen designing a device’s board, the emptyrangeminimumsizeshouldbe20.6x6.88mm.Docheckthe“PCBfootprintanddimensions”forreference.9.PCBFootprintandDimensions