Copyright 2005, Data Mining Research Lab, The Ohio State University Cache-conscious Frequent Pattern Mining on a Modern Processor Amol Ghoting , Gregory Buehrer, and Srinivasan Parthasarathy Data Mining Research Laboratory, CSE The Ohio State University Daehyun Kim, Anthony Nguyen, Yen-Kuang Chen, and Pradeep Dubey Intel Corporation
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Cache-conscious Frequent Pattern Mining on a Modern Processor
Cache-conscious Frequent Pattern Mining on a Modern Processor Amol Ghoting , Gregory Buehrer, and Srinivasan Parthasarathy Data Mining Research Laboratory, CSE The Ohio State University Daehyun Kim, Anthony Nguyen, Yen-Kuang Chen, and Pradeep Dubey Intel Corporation. Roadmap. - PowerPoint PPT Presentation
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Copyright 2005, Data Mining Research Lab, The Ohio State University
Cache-conscious Frequent Pattern Mining on a Modern Processor
Amol Ghoting, Gregory Buehrer, and Srinivasan Parthasarathy
Data Mining Research Laboratory, CSEThe Ohio State University
Daehyun Kim, Anthony Nguyen, Yen-Kuang Chen, and Pradeep Dubey
Intel Corporation
Copyright 2005, Data Mining Research Lab, The Ohio State University
Roadmap
• Motivation and Contributions• Background• Performance characterization• Cache-conscious optimizations• Related work• Conclusions
Copyright 2005, Data Mining Research Lab, The Ohio State University
Motivation
• Data mining applications– Rapidly growing segment
in commerce and science– Interactive response
time is important– Compute- and memory-
intensive• Modern architectures
– Memory wall– Instruction level
parallelism (ILP)
FP-Growth
Note: Experiment conducted on specialized hardware
SATURATION
2.4x
1.6x
Copyright 2005, Data Mining Research Lab, The Ohio State University
Contributions
• We characterize the performance and memory access behavior of three state-of-the-art frequent pattern mining algorithms
• We improve the performance of the three frequent pattern mining algorithms– Cache-conscious prefix tree
• Spatial locality + hardware pre-fetching• Path tiling to improve temporal locality• Co-scheduling to improve ILP on a
simultaneous multi-threaded (SMT) processor
Copyright 2005, Data Mining Research Lab, The Ohio State University
Roadmap
• Motivation and Contributions• Background• Performance characterization• Cache-conscious optimizations• Related work• Conclusions
Copyright 2005, Data Mining Research Lab, The Ohio State University
• Finds groups of items that co-occur frequently in a transactional data set
• When one thread waits, the other thread can use CPU resources
• Identifying independent threads is not good enough• Unlikely to hide long cache miss latency• Can lead to cache interference (conflicts)
• Solution: Restructure multi-threaded computation to reuse cache on a tile-by-tile basis
r
Tile 1 Tile 2 Tile NTile N-1
Thread1 Thread2 Same data but different computation
Copyright 2005, Data Mining Research Lab, The Ohio State University
Speedup for FP-Growth (Synthetic data set)
4000 4500 5000 5500
Copyright 2005, Data Mining Research Lab, The Ohio State University
Speedup for FP-Growth(Real data set)
50000 58350 66650 75000
For FP-Growth, L1 hit rate improves from 89% to 94%L2 hit rate improves from 43% to 98%
SpeedupGenmax – up to 4.5x Apriori – up to 3.5x
Copyright 2005, Data Mining Research Lab, The Ohio State University
Roadmap
• Motivation and Contributions• Background• Performance characterization• Cache-conscious optimizations• Related work• Conclusions
Copyright 2005, Data Mining Research Lab, The Ohio State University
Related work (1)
• Data mining algorithms– Characterizations
• Self organizing maps– Kim et al. [WWC99]
• C4.5– Bradford and Fortes [WWC98]
• Sequence mining, graph mining, outlier detection, clustering, and decision tree induction
– Ghoting et al. [DAMON05]– Memory placement techniques for association rule
mining• Considered the effects of memory pooling and coarse
grained spatial locality on association rule mining algorithms in a serial and parallel setting
– Parthasarathy et al. [SIGKDD98,KAIS01]
Copyright 2005, Data Mining Research Lab, The Ohio State University
Related work (2)
• Data base algorithms– DBMS on modern hardware
• Ailamaki et al. [VLDB99,VLDB2001] – Cache sensitive search trees and B+-trees
• Rao and Ross [VLDB99,SIGMOD00]– Prefetching for B+-trees and Hash-Join
• Chen et al. [SIGMOD00,ICDE04]
Copyright 2005, Data Mining Research Lab, The Ohio State University
Ongoing and future work
• Algorithm re-design for next generation architectures – e.g. graph mining on multi-core architectures
• Cache-conscious optimizations for other data mining and bioinformatics applications on modern architectures– e.g. classification algorithms, graph mining
• Out-of-core algorithm designs• Microprocessor design targeted at data
mining algorithms
Copyright 2005, Data Mining Research Lab, The Ohio State University
Conclusions
• Characterized the performance of three popular frequent pattern mining algorithms
• Proposed a tile-able cache-conscious prefix tree– Improves spatial locality and allows for cache line pre-fetching– Path tiling improves temporal locality
• Proposed novel thread-based decomposition for improving ILP by utilizing SMT– Overall, up to 4.8-fold speedup
• Effective algorithm design in data mining needs to take into account modern architectural designs.
Copyright 2005, Data Mining Research Lab, The Ohio State University
Thanks
• We would like to acknowledge the following grants– NSF: CAREER-IIS-0347662– NSF: NGS-CNS-0406386– NSF: RI-CNS-0403342– DOE: ECPI-DE-FG02-04ER25611