Bus interface 8086

12063122-005

M.Ayyaz idrees

12063122-063

M.Bilal Akram

12063122-059

M.Zeeshan

12063122-091

Ihtishaam hussain

12063122-081

Taimoor Kamil

Group #5

University Of Gujrat

BUS INTERFACE

BUS

Interface

o Lines used to Exchange

data between different

components of

computer .

o Systems require custom

interface connected to

one of bus.

Types

Industrial

standard

architecture

bus

(ISA)

Peripheral

component

Interconnect

(PCI) bus

Universal

serial bus

(USB)

Advanced

graphics

port

(AGP)

The Industrial

standard

architecture bus

• Evolved from original 8-bit

standard to 16-bit standard

• Vanished in home systems now a

days but found in industrial

systems due to low cost

• Nowadays 32 bit version used

“extended ISA”

The 8-bit ISA Bus output Interface

1 GND IO CHK

2 RESET D7

3 +5V D6

4 IRQ9 D5

5 -5V D4

6 DRQ2 D3

7 -12V D2

8 OWS D1

9 +12V D0

8-BIT ISA BUS

12 MEMR A19

13 IOW A18

14 IOR A17

15 DACK3 A16

16 DRQ3 A15

17 DACK1 A14

18 DRQ1 A13

19 DACK0 A12

20 CLOCK A11

21 IRQ7 A10

22 IRQ6 A9

23 IRQ5 A8

24 IRQ4 A7

25 IRQ3 A6

26 DACK2 A5

27 T/C A4

10 GND IO RDY

11 MEMW AEN

For controlling

I/O and

memory

• DACK0-DACK3

Acknowledge outputs

• DRQ1-DRQ3 DMA request

inputs

Interrupt Request Lines

useful for I/O interface

8-bit ISA Bus input interface

A pair of Analog to digital converter is interfaced with ISA

bus

Connections are made

through 9pin converter

Complex task because each each

converter need1 )A write pulse to

start.

2) A read pulse to read digital data

3) a pulse to enable selection of INTR

output

The 16-bit ISA Bus

• Additional connector is connected behind the 8-bit connector

• One plugs into original 8-bit connector and other to new 16-bit connector

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Parallel Printer InterfacePRESENTED BY:

IHTISHAM HUSSAIN(091)

LPT

LPT stands for line printer. The printer interface gives the user access to eight lines that can be programmed to receive or send parallel data.

Port DetailsThe parallel port (LPT1) is normally at I/O port addresses 378H, 379H, and 37AH from DOS or using a driver in Windows.

The secondary (LPT2) port, if present, is located at I/O port addresses 278H, 279H, and 27AH.

A 25-pin D-type on the back of the PC

A 36-pin Centronicson the back of the

printer

The Centronics interface implemented by the parallel port uses two connectors.

The parallel port can work as both a receiver and a transmitter at its data pins (D0–D7).This allows devices other than printers, such as CD-ROMs, to be connected to and used by the PC through the parallel port.

Table

Port 378H

The data port that connects to bits D0 – D7 (pins 2 – 9)

Port 379H

THIS IS A READ-ONLY PORT THAT RETURNS THE INFORMATION FROM THE PRINTER THROUGH SIGNALS SUCH AS BUSY, #ERROR AND SO FORTH .

It is a additional Status Port

Port 37AH

Using the Parallel Port

To read the port, it must first be initialized by sending 20H to register 37AH as illustrated..

Example:

MOV AL,20H

MOV DX,37AH

OUT DX,AL

• Once the parallel port is programmed as an input port, reading is accomplished byaccessing the data port at address 378H.

To write data to the parallel port, reprogram the command register at address 37A by writing 00H to program the bidirectional bit with a zero. Once the bidirectional bit is programmed,data are sent to the parallel port through the data port at address 378H.

12063122-059 . ZEESHAN

PCI BUS Peripheral Component Interconnect, or PCI,

is a standardized mode for connecting

peripheral devices to a computer system.

The PCI standard was proposed by Intel in

1991 and became common in 1994.

The plug-and-play feature of Windows 95

was largely responsible for the acceptance

of the PCI interface

FUNCTION

The function of PCI devices is to expand the capabilities of a

computer and allow it to perform functions it could not perform

before (such as connecting to the Internet through an internal

modem), or could perform better (as a dedicated graphics card would do).

CONFIGURATION

To utilize it, a computer must be able to locate or address a PCI

mechanism within the system's BIOS. The BIOS, or basic

input/output system, is the base program in the computer that

detects and manages all hardware devices. The PCI codes

communicate to the computer the location and functions of

each PCI mechanism. If the codes are misread or are incorrect, the system does not detect the device. The configuration of the

PCI device is recorded in the Extended System Configuration

Data, or ESCD.

PLUG AND PLAY

Windows contains a plug-and-play, or PNP, feature for hardware

devices, including PCI devices. PNP enables the system to detect

and address new hardware without the user having to manually change settings in the BIOS. If for some reason the PNP feature

does not work for a hardware component, the user can manually

enter the device in the system's BIOS setup.

DRAWBACK

One of the primary disadvantages of PCI is that you can only

connect as many devices as there are slots in your

motherboard's PCI bus. Also, PCI was superseded by PCI Express,

which is faster and benefits from serial communication between the computer and devices.

PROCESSOR CONNECTION WITH PCI

BUS

The microprocessor connects the PCI bus through an integrated

circuit called “PCI BRIDGE”

INTERFACING

Complex

PCI bus controller.

Registers, Parity block, Initiator, Target, Vendor ID EPROM as required components

COMMANDS

0000 Interrupt Acknowledge

This is a special form of read cycle implicitly addressed to the

interrupt controller.

0001 Special Cycle

Special cycle is used to transfer the data to all PCI components.

0010 I/O Read

This performs a read from I/O space.

CONTINUED

0011 I/O Write

This performs a write to I/O space.

0100-0101 Reserved

A PCI device must not respond to an address cycle with these command

codes.

0110 Memory Read

This performs a read cycle from memory space.

CONTINUED

0111 Memory Write

This operates similarly to a memory read.

1000-1001 Reserved

A PCI device must not respond to an address cycle with these

command codes.

1010 Configuration Read

This is similar to an I/O read, but reads from PCI configuration

space.

PCI BUS SIGNALS

PCI DIAGRAM

FUTURE HORIZONS

In future all computer systems may use PCI bus.

Macintosh and Apple systems are also switching to PCI bus.

(UNIVERSAL SERIAL BUS)

USB

(12063122-063) bilal

Define USB?• Stands for "Universal Serial Bus." USB is the most common type of

computer port used in today's computers. It can be used to connect

keyboards, mice, game controllers, printers, scanners, digital cameras,

and removable media drives. With the help of a few USB hubs, you can

connect up to 127 peripherals to a single USB port and use them all at

once

History:• Defined by Intel and other industry leaders

in early 1990s

• Ease of use was primary goal

Specification of USB about speed:

Data transfer speeds are 480 Mbps for full speed USB 2.0

operations, 11 Mbps for 1.1

1.5 Mbps for low speed

Limit of cable length and Power Specification of

USB:

Cable length 5m max for full speed and 3m max for low speed.

Max power through these cables is at 100 mA and max current at 5.0 V

If the amount of current exceeds 100 mA, windows will display a yellow

exclamation point next to the device, indicates a over load condition

Connectors:

USB Pins:

Pin Number Signal Front View

1 +5.0v

2 -Data

3 +Data

4 Ground

NRZI(non-return to zero, inverted):

The USB uses NRZI data encoding for transmitting packets. This

encoding method does not change the signal level for logic 1, but the

signal level is inverted for each change to a logic 0.

NRZI Encoding:

Fig. illustrate a digital data stream and the USB signal produced using this

encoding method.

Bit Stuffing:

• The actual data transmitted includes sync bits using a method

called bit stuffing.

Flow chart of bit stuffing:

USB Commands:

Know we will discuss the commands use to transfer data and select the

receptor.

There are following commands:

• PID(Packet identification byte)

• ADDR

• ENDP

• CRC

• ACK and NAK

PID:

The PID contain 8 bit, but only the right most 4 bits contain the type

of packet that follows, if any. The left most 4 bit of the PID are the

1s complementing the right most 4 bit. If a command of 1000 is

send, the actual byte send for the PID is 0111 1000.

ADDR(address field):

• The ADDR contain the 7-bit address of the USB device. As

mentioned earlier there are 127 devices present on the USB at a

time.

ENDP:

The ENDP is a 4 bit number used by the USB. Endpoint 0000 is

used for initialization; other endpoint numbers are unique to each

USB device.

CRC(cyclic redundancy checks):

There are two types of CRC used on USB.

CRC is a serial checking mechanism. Using 5bit CRC a residual of 01100

is received for no error and for 16bit CRC a residual of 100000000001101

received for no error.

5 bit CRC16 bit CRC

ACK and NAK tokens:

USB uses these tokens to coordinate the transfer of data packets

data b/w the host system and USB device.

Data transfer from host to USB device. The USB device transmit

ACK or NAK back to host.

If data received correctly the ACK sent otherwise NAK.

If host receives a NAK token it retransmits the data packet until the

receiver receives it correctly. This method is called stop and wait

flow control.

The Accelerated Graphics Port (also called Advanced Graphics Port) is a high-speed point-to-point channel for attaching a graphics card to a computer’s motherboard, primarily to assist in the acceleration of 3D computer graphics.

is an advanced port designed for Video cards and 3D accelerators. AGP introduces a dedicated point-to-point channel that allows the graphics controller direct access the system memory.

Some motherboards have been built with multiple independent AGP slots. AGP is currently being phased out in favor of PCI Express.

AGP 1x

A 32-bit channel operating at 66 MHz resulting in a maximum data rate of 266 megabytes per second (MB/s), doubled from the 133 MB/s transfer rate of PCI bus

AGP 2x

A 32-bit channel operating at 66 MHz double pumped to an effective 133 MHz resulting in a maximum data rate of 533 MB/s; signaling voltages the same as AGP 1x;

AGP 4x

A 32-bit channel operating at 66 MHz quad pumped to an effective 266 MHz resulting in a maximum data rate of 1066 MB/s (1 GB/s)

AGP 8x

A 32-bit channel operating at 66 MHz, strobing eight times per clock, delivering an effective 533 MHz resulting in a maximum data rate of 2133 MB/s (2 GB/s); 0.8 V signaling.

AGP Pro

AGP Pro is a extention to the standard AGP connector and slot on both sides to provide additional power to an AGP card.It comes in two flavors, AGP Pro110 provides for 50-110W of power and requires two adjacent PCI slots for cooling. AGP Pro50 provides for 20-50W of power and requires a single adjacent PCI slot for cooling.

Texturing: Also called Direct Memory Execute mode, allows textures to be stored in main memory.

Throughput: Various levels of throughput are offered: 1X is 266 MBps, 2X is 533 MBps; and 4X provides 1.07 GBps.

Sideband Addressing: Speeds up data transfers by sending command instructions in a separate, parallel channel.

Pipelining: Enables the graphics card to send several instructions together instead of sending one at a time.

Not all operating systems support AGP because of limited or no driver support. For example, Windows 95 did not incorporate AGP support.

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