Bus Interconnect, SERDES and Signal Integrityrmason/elec4706/signalIntegrity.pdf · Switch Matrix ¾For systems that requires the very highest throughput possible ¾Advantages are

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Bus Interconnect, SERDES and Signal

Integrity

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Bus Configurations (1)Bus Configurations (1)

1. Single1. Single--Termination MultidropTermination MultidropConsists of one driver (D) and multiple receivers (R). The driveConsists of one driver (D) and multiple receivers (R). The driver is r is restricted to be located at one end of the bus and the other endrestricted to be located at one end of the bus and the other end has a has a resistive termination (RT)resistive termination (RT)

2. Double2. Double--Termination MultidropTermination MultidropConsists of one transmitter positioned between multiple receiverConsists of one transmitter positioned between multiple receivers. The s. The driver can be placed anywhere in the multidrop bus and the bus idriver can be placed anywhere in the multidrop bus and the bus is s terminated at both ends.terminated at both ends.

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3. Data distribution with Point3. Data distribution with Point--toto--Point LinksPoint LinksA distribution amplifier is used to buffer the signal into multiA distribution amplifier is used to buffer the signal into multiple copies which ple copies which then drive independent interconnects to their loads.then drive independent interconnects to their loads.

4. Multipoint4. MultipointThe multipoint bus requires the least amount of interconnect (roThe multipoint bus requires the least amount of interconnect (routing channels uting channels and connector points) while providing bidirectional, halfand connector points) while providing bidirectional, half--duplex communication. duplex communication. However, on this type of bus, their can only be one transaction However, on this type of bus, their can only be one transaction at a time.at a time.

Bus Configurations (2)Bus Configurations (2)

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Switch MatrixSwitch MatrixFor systems that requires the very highest throughput possiblFor systems that requires the very highest throughput possibleeAdvantages are that simultaneous transactions can occur on thAdvantages are that simultaneous transactions can occur on the e

bus at the same time and it has the cleanest electrical signal pbus at the same time and it has the cleanest electrical signal path of ath of all the bus optionsall the bus options

Disadvantages are the interconnect density and complexity of Disadvantages are the interconnect density and complexity of the the central switching card increases with the number of loadscentral switching card increases with the number of loads

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Mesh and FabricMesh and FabricTwo types of switch backplane bus architectures: fabric and meshTwo types of switch backplane bus architectures: fabric and meshThe key characteristic: allows interconnection of multiple line The key characteristic: allows interconnection of multiple line cards using only pointcards using only point--toto--point interconnectspoint interconnects

PointPoint--toto--point switch interconnects: (a) backplane fabric interconnects, point switch interconnects: (a) backplane fabric interconnects, (b) backplane (b) backplane mesh interconnects from slot 1, (c) backplane mesh interconnectsmesh interconnects from slot 1, (c) backplane mesh interconnects from slot 2.from slot 2.

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SERDESSERDES

‘‘SERSER’’ stands for serializer. It takes parallel data and serializes stands for serializer. It takes parallel data and serializes it into a serial bit streamit into a serial bit stream‘‘DESDES’’ stands for deserializer. It takes the serial data, decodes stands for deserializer. It takes the serial data, decodes

it if needed, and converts it back to parallel interface: data ait if needed, and converts it back to parallel interface: data and nd a (recovered) clock. A clock recovery from the data stream is a (recovered) clock. A clock recovery from the data stream is needed.needed.

SerDesSerDes transceivertransceiver

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SERDES SERDES -- continuedcontinued

SerDes block diagramSerDes block diagram

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SERDES SERDES -- continuedcontinued

SerDes functional diagramSerDes functional diagram

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Electrical Interconnects vs. Fiber OpticsElectrical Interconnects vs. Fiber Optics

The competitive advantages of transmission technologies The competitive advantages of transmission technologies are a function of data rate and interconnection distanceare a function of data rate and interconnection distance

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Transmission MediaTransmission Media

Twisted pairTwisted pairCoax CablesCoax CablesPCB trace PCB trace Backplane traceBackplane trace

Common model: transmission line model Common model: transmission line model

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Transmission Line Equations (1)Transmission Line Equations (1)RLCG model for a transmission line RLCG model for a transmission line

For a single R, L, C, and G stage, the following two equationFor a single R, L, C, and G stage, the following two equations s are generated:are generated:

* R, L, G, and C are treated as constants here, while in reali* R, L, G, and C are treated as constants here, while in reality, they do vary with ty, they do vary with frequency. The equations assume that a narrowfrequency. The equations assume that a narrow--enough range of frequencies is enough range of frequencies is being used so that R, L, G, and C can be considered to be constabeing used so that R, L, G, and C can be considered to be constantnt

dxxIjwLRxVxdVxVdxxVjwCGxIxdIxI)()()())()((

)()()())()((+=−+

+=−+

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Transmission Line Equations (2)Transmission Line Equations (2)

tILRI

xV

tVCGV

xI

∂∂

+=∂∂

−

∂∂

+=∂∂

−

xx

xx

eZVe

ZVxI

eVeVxV

γγ

γγ

0

0

0

0

00

)(

)(−

−+

−−+

+=

+=

))(( jwCGjwLRj ++=+= βαγ

Partial derivatives are taken with respect to t and x, Partial derivatives are taken with respect to t and x, telegraphertelegrapher’’s equationss equations are obtained:are obtained:

The solutions to the telegrapherThe solutions to the telegrapher’’s equations are:s equations are:

where is the propagation function of the transmission line givwhere is the propagation function of the transmission line given by:en by:

where is the attenuation constant and is the phase constanwhere is the attenuation constant and is the phase constant. They are t. They are dependent upon frequency.dependent upon frequency.

γ

α β

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Transmission Line Equations (3)Transmission Line Equations (3)The characteristic impedance of the transmission line is also a The characteristic impedance of the transmission line is also a function of function of R, L, G and C: R, L, G and C:

For lossless transmission lines, the characteristic impedance beFor lossless transmission lines, the characteristic impedance becomes:comes:

In case the transmission lines are In case the transmission lines are lossylossy, the propagation function is:, the propagation function is:

where is the velocity of propagation of the signal down the twhere is the velocity of propagation of the signal down the transmission ransmission line.line.

jwCGjwLR

IV

IVZ

++

=== −

−

+

+

0

0

0

0

CLZ =

LCv /1=

v

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Reflections (1)Reflections (1)Whether a signal is reflected when it arrives at a load is deterWhether a signal is reflected when it arrives at a load is determined by the mined by the reflection coefficient:reflection coefficient:

0

0

ZZZZ

L

L

+−

=ρ

Example: Example: internal voltage Vinternal voltage VSS =2.5V, Z=2.5V, Z00 =50Ohm, and Z=50Ohm, and ZLL =75Ohm. The internal =75Ohm. The internal signalsignal--source output impedance, Zsource output impedance, ZSS =25Ohm. The source reflection coefficient:=25Ohm. The source reflection coefficient:

The loadThe load--end reflection coefficient is:end reflection coefficient is:

333.050255025

0

0 −=+−

=+−

=ZZZZ

S

Ssourceρ

20.050755075

0

0 =+−

=+−

=ZZZZ

L

Lloadρ

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Reflections (2)Reflections (2)The initial voltage is calculated as a simple voltage divider:The initial voltage is calculated as a simple voltage divider:

A way to calculate the total cumulative signal after more than aA way to calculate the total cumulative signal after more than a couple of couple of reflections is by use of reflections is by use of ““lattice diagramlattice diagram””

The voltage at the beginning of the trace after the second refleThe voltage at the beginning of the trace after the second reflection is given by:ction is given by:

VZZ

ZVVS

Sinitial 667.10

0 =+

=

VVVVVBegTrace 889.1111.0333.0667.1 =−+=

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Reflections (3)Reflections (3)Example: Example: Assume the dielectric constant of the trace material is 4.1, calAssume the dielectric constant of the trace material is 4.1, calculate the culate the signal velocity v, and the trace propagation delay of the signalsignal velocity v, and the trace propagation delay of the signal. Assuming the total . Assuming the total propagation delay of signal from the source to the load is 200pspropagation delay of signal from the source to the load is 200ps, calculate the , calculate the transmission line length.transmission line length.

Velocity:Velocity:

Delay/unit length:Delay/unit length:

Length:Length:

Thus the total propagation delay isThus the total propagation delay is

inpsinpsvtdelay /172)/1083.5/(1/1 3 =×== −

incmincmpsctLengthr

D 167.1)54.2/1(1.4

sec)/103)(200( 10

=×

==ε

cLengtht r

D

ε=

psincmincmcvr

/1083.5)54.2/1sec(/1.4

103 310

−×=×

==ε

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Reflections (4)Reflections (4)Waveforms seen at the beginning of the trace and at the loadWaveforms seen at the beginning of the trace and at the load

Note:Note:1.1. The voltage levels at the transmission line ends change only The voltage levels at the transmission line ends change only

when a signal (or reflected signal) hits that endwhen a signal (or reflected signal) hits that end2.2. The steadyThe steady--state or finalstate or final--voltage levels at both ends are the voltage levels at both ends are the

same values (with DC resistance of the line = 0), which can be same values (with DC resistance of the line = 0), which can be calculated from a simple voltage divider of the source calculated from a simple voltage divider of the source impedance and the load impedanceimpedance and the load impedance

3.3. ZZ00 does not determine of the final voltage levelsdoes not determine of the final voltage levels

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Reflections (5)Reflections (5)Consider the following questionConsider the following questionFind conditions under which a Find conditions under which a ““damped oscillationdamped oscillation”” could be observed at the could be observed at the receiver end. receiver end.

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Important HighImportant High--Speed ConceptsSpeed ConceptsRise time ( ): Rise time ( ): the time measured between 10% and 90% points of the time measured between 10% and 90% points of

the signalthe signal’’s peaks peak--toto--peak amplitude peak amplitude

Edge Rate: Edge Rate: the slope of the line as measured between the same 10% the slope of the line as measured between the same 10% and 90% pointsand 90% points

Duration of the rising edge: Duration of the rising edge: the distance the signal will travel down the distance the signal will travel down a transmission medium in the time it takes to transition from loa transmission medium in the time it takes to transition from low to high ( w to high ( as measured by 10% and 90% amplitude values). Mathematically, itas measured by 10% and 90% amplitude values). Mathematically, it is is defined bydefined by

Generally, a trace, transmission line, or circuit can be accuratGenerally, a trace, transmission line, or circuit can be accuratelyelymodeled with lumped parameters if its physical length is much lemodeled with lumped parameters if its physical length is much less than ss than 1/6 of the signal1/6 of the signal’’s length of rising edge. s length of rising edge.

Bandwidth and rising time: Bandwidth and rising time:

r

rre

ctlε

=

rt

rdB t

BW 5.03 =−

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NonNon--idealitiesidealities

Fast edge causes stronger reflectionsFast edge causes stronger reflectionsReflections:Reflections:

•• IC pin (pad) capacitanceIC pin (pad) capacitance•• Trace width discontinuityTrace width discontinuity•• CornersCorners•• ViasViasneed to be modeled and simulated by ADS / need to be modeled and simulated by ADS / HSPICEHSPICE

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PCB Material NonPCB Material Non--idealitiesidealitiesGroup delay distortion: Group delay distortion: the derivative of phase over frequencythe derivative of phase over frequencySkin effectSkin effectDielectric loss Dielectric loss

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PCB PCB TrasmissionTrasmission Line TopologiesLine Topologies

coaxstripline

microstrip coplanar waveguide

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Eye Pattern (1)Eye Pattern (1)

Eye Diagram is:Eye Diagram is:•• Useful in measuring the amplitude of jitter Useful in measuring the amplitude of jitter

versus the unit interval* to establish data rate versus the unit interval* to establish data rate versus cable length curvesversus cable length curves

•• A very accurate way to predict the expected A very accurate way to predict the expected signal quality in the final applicationsignal quality in the final application

•• Used to measure the effects of interUsed to measure the effects of inter--symbol symbol interference** on random data being transmitted interference** on random data being transmitted through a particular mediumthrough a particular medium

* Unit interval [UI] == one baud period == signaling period* Unit interval [UI] == one baud period == signaling period

** Inter** Inter--symbol interference [ISI] symbol interference [ISI] –– residue of the previous residue of the previous symbol extending to current and future symbolssymbol extending to current and future symbols

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Eye pattern formation by superpositionEye pattern formation by superposition

Eye Diagram (2)Eye Diagram (2)

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Eye Eye DiagramDiagram (3)(3)Example:Example: eye diagram with XAUI (10Gb Attachment Unit eye diagram with XAUI (10Gb Attachment Unit

Interface) jitter templateInterface) jitter templateDetermines the signal integrity at receiverDetermines the signal integrity at receiverThe eye opening must stay outside of this template to assure The eye opening must stay outside of this template to assure that that

the receiver proper operationthe receiver proper operation

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Jitter parameters:Jitter parameters:The thresholdThe threshold--crossing jitter, tcrossing jitter, ttcstcs, the jitter measured at the 0V (for a , the jitter measured at the 0V (for a differential receiver) input voltage level. Jitter amplitude is differential receiver) input voltage level. Jitter amplitude is minimum at minimum at this point.this point.The worstThe worst--case jitter. For a receiver specified threshold between +/case jitter. For a receiver specified threshold between +/--100mV, the worst100mV, the worst--case is obtained by drawing a box between +/case is obtained by drawing a box between +/--100mV and measuring the jitter between first and last crossing a100mV and measuring the jitter between first and last crossing at +/t +/--100mV100mVUnit interval Unit interval ttUIUI, the width of the ideal eye opening as measured at 0V for , the width of the ideal eye opening as measured at 0V for no jitter presentno jitter present

Eye Diagram (4)Eye Diagram (4)