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Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

May 01, 2023

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Page 1: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

Bu�er losses vs. Deadline Violations for ABRTra�c in an ATM Switch: A ComputationalApproach �Meera Balakrishnanyy, Antonio Pulia�tozx, Kishor Trivedixy, Ioannis ViniotiszNCSU-Duke Center for Advanced Computing and Communicationy Dept. of Elect. and Comp. Engg. x Istituto di Informatica z Dept. of Elect. and Comp. Engg.Duke University Universita' di Catania North Carolina State UniversityDurham, NC 27708-0291. 95125 Catania, Italy. Raleigh, NC 27695.�An earlier version of this paper was presented at the ICC'95, Seattle.ySupported by an NSF Postdoctoral RA Grant No. NSF CDA 93-10243. The author is now with BellLaboratories of Lucent Technologies.zSupported by an Italian CNR fellowship, No. 203.15.5.xSupported in part by an Grant No. NSF EEC 94-18765.

Page 2: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

AbstractThe B-ISDN will carry a variety of tra�c types: the Variable Bit Rate tra�c (VBR), of whichcompressed video is an example, Continuous Bit Rate tra�c (CBR), of which telemetry is anexample, Data tra�c, and Available Bit Rate tra�c (ABR) that represents aggregate data tra�cwith very limited guarantees on quality. Of these, VBR and CBR have timing constraints andneed synchronous bandwidth; data tra�c is relatively delay insensitive. In this paper, we considerthe VBR, Data and ABR tra�c types and obtain the cumulative distribution function (cdf) ofthe queueing delay experienced by a burst of ABR tra�c in the output bu�er of an ATM switch.The cdf is used to trade o� bu�er loss probabilities against deadline violation probabilities throughadjusting the bu�er size and (delay) deadline values. Large bu�ers result in low losses but queueingdelays can become excessive and cause a high level of deadline violations. Both losses and violationsare detrimental and an operating point must be chosen to achieve a balance. In this paper we studythe nature of the trade o�. We develop a stochastic Petri net model assuming periodic burst arrivalsfor VBR and Poisson arrival processes for the Data and ABR tra�c types at the burst level, andsolve the model analytically (numerically) using a decomposition approach. This decomposition,along with the inherent decomposability of the tagged customer approach for obtaining the cdfopens up a possibility of carrying out fast computations using a parallel machine for selecting theoperating point each time that a call is admitted.Keywords: ATM switch, ABR tra�c, output bu�ers, loss-delay characteristics.

Page 3: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

1 IntroductionThe success of the B-ISDN depends on the network's ability to provide adequate service todi�erent types of tra�c generated by the users. Since the resources are shared, the networkmust perform adequately for each tra�c type in spite of resource sharing. The evaluationindices for the network are a function of the tra�c type as well as the level of granularity atwhich tra�c is abstracted (cell-level, burst-level, session-level). Since the work of Golestani[4], it is being increasingly accepted that the segregation of tra�c types into those requiringguaranteed services and those with less stringent requirements can lead to practical imple-mentations which can simultaneously satisfy the requirement of guaranteed services to theformer while employing the latter to maintain high levels of link utilization. Several tra�ctypes have been de�ned for the B-ISDN by the ATM Forum and is in keeping with thisgeneral acceptance: the Variable Bit Rate tra�c (VBR), the Continuous Bit Rate tra�c(CBR), two types of Data tra�c representing aggregate data-sources of tra�c, and Avail-able Bit Rate tra�c (ABR) that represents aggregate data tra�c with virtually no guaranteeof quality. Nevertheless, ABR tra�c management strategies require careful analysis becausethe number of users requesting this service is expected to be very large.The VBR and CBR tra�c classes have real-time constraints such as delay deadlines andare classi�ed as delay sensitive and requiring service guarantees; in contrast data tra�c isdelay insensitive. ABR di�ers from Data in that it is allocated a relatively small synchronousbandwidth, but is allowed resources leftover from the other tra�c classes. With respect tobandwidth, all the tra�c classes are assigned �xed time slices for transmission where, theduration of the time slice determines the amount of bandwidth allocated; leftover time inany time slice is given to the ABR tra�c. A natural set-up to achieve service guarantees isto control each tra�c type individually and to provide insulation among them: changes inthe behavior of one tra�c type should not adversely a�ect the others. This is the premise in[2], [9] and [11] where the two requirements are realized, respectively, by means of schedulingand by providing separate bu�ers for the di�erent tra�c types.In this paper we focus on an ATM switch having several output bu�ers and a simplescheduling policy for managing the tra�c at a given output link. We consider the VBR,Data and ABR tra�c types and obtain the cumulative distribution function (cdf) of the1

Page 4: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

queueing delay experienced by an ABR-burst admitted to an output bu�er of an internallynon-blocking ATM switch. While large bu�ers imply low losses, they can introduce excessivedelays resulting in an unacceptable level of deadline violations: we use the cdf to trade o�the bu�er losses with deadline violations for ABR tra�c at a given switch output.A stochastic Petri net description o�ers a convenient means of unambiguously specifyingthe switch output functions as well as the tra�c characteristics in the same representation.The advantage of a Petri net speci�cation is that several tools (Stochastic Petri Net Package[1], for example) exist for automatically generating and analyzing the underlying stochasticprocess for various measures. One limitation of the Petri net approach, however, is thateven compact representations can result in state spaces too large for a practical numericalsolution. Many times discrete-event simulation is an ine�cient option when rare events areinvolved because of the di�culty in getting statistically signi�cant results in a reasonabletime; although it is possible to speed up simulation by means of variance reduction techniquessuch as importance sampling, they have limited applicability at present. In order to obtainfast and e�cient numerical solutions, in this paper, we handle the state space problemthrough decomposition at the speci�cation level and by modeling tra�c at the burst levelrather than at the cell level.To obtain the cdf, we assume periodic burst arrivals for VBR, Poisson arrivals for Dataand ABR at the burst level, and solve the sub-models of the decomposition numerically.Such a decomposition is possible because no bandwidth is traded between classes otherthan the ABR or taken from ABR, and the arrival processes of the three tra�c types areassumed to be independent of each other. The VBR and Data classes are solved �rst toobtain the bandwidth available to ABR and this information is used in the ABR sub-model.The model is inherently decomposable into three non-Markovian sub-models and each can beindependently solved as single server queue with vacation; we use a Markovian approximation(n-stage Erlang distributions to approximate deterministic behavior) to solve the sub-models.Since our goal is to obtain the cdf of the ABR bu�er delay, the VBR and Data models aresolved for the probability of the queues being idle while the ABR model is solved for the cdfof burst-delay using a tagged-customer approach. However, our model can also be solved forthe delay cdfs of the VBR and Data tra�c, if desired. The delay cdf provides a network-perceived measure of the quality of service for the VBR, Data and ABR tra�c at the burst2

Page 5: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

level for a single switch in the ATM layer, and in conjunction with other measures can beused for determining end-to-end quality of service.The thrust of this paper is to determine the loss-delay trade-o�s for a given tra�c situ-ation; in contrast, in [11] and [14] the focus is on the determination of bounds. Althoughtra�c characterization is not easy, tra�c models re ecting the e�ect of the number of connec-tions of each tra�c type may be adequate to obtain a reasonable estimate of the operatingpoint in a short time. For scheduling policies that o�er decomposability with respect totra�c types (and by modeling at the burst-level), parallel processors can make real-timenumerical solutions to queueing systems a feasible option. Per-session bounds on delay andqueue length distributions are suggested in [14] using the decomposability o�ered by theGeneralized Processor Sharing scheduling policy.This paper is organized as follows. In Section 2 we outline the ATM-switch architecturefocusing on the features relevant to this paper, and in Section 3 we summarize our tra�cmodeling assumptions. In Section 4 we use stochastic Petri nets to give a formal descriptionof the ATM switch-functions, including the tra�c characteristics and the burst-schedulingpolicy. Because of the similarity of the ATM scheduling policy to polling systems, we alsobrie y discuss time-limited polling systems in this section. Section 4.1 contains the stochas-tic Petri net description of the ATM switch, the decomposition into sub-Petri nets and adiscussion of the solution approach (the tagged-customer approach) for obtaining the delaycdf. Numerical results are given in Section 5, hardware implementation issues in Section 6and concluding remarks in Section 7.2 The ATM Switch ArchitectureThe ATM-based B-ISDN architecture uses the notion of Virtual Paths and Virtual Circuitsto share network resources among the users. Using ATM switches, virtual paths are concate-nated to de�ne a virtual network topology. Accordingly, each cell that enters the networkis assigned a Virtual Path Identi�er (VPI) and a Virtual Circuit Identi�er (VCI) which itcarries in its header [6]. The information in the VPI/VCI �elds of a cell is used by ATMswitches to switch cells at the virtual path and virtual circuit levels, respectively. With each3

Page 6: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

1

2

3

4

Output Functions

Output Functions

Output Functions

Output Functions

Cells forTransmissionon output link 1

Cells forTransmissionon output link 4

Output Links

1

2

3

4

Input Links

Figure 1: A 4x4 ATM Switch.optical link in the network is associated a set of VPIs to be assigned to cells which use thelink. The VP-level switching function of an ATM switch assigns an output link to each cellarriving on its input link and overwrites the VPI �eld of the incoming cell with a VPI ofthe output link. The mapping to the output link and VPI pair is determined at the time ofvirtual network setup.The virtual path concept thus supports a network topology which can be recon�guredfrom time to time. Another feature supported by the notion of virtual paths is that virtualcircuits can be grouped together by VPI. (Each virtual circuit is formed by a sequence ofcells having the same VPI and VCI. VCI switching occurs at the edge of the ATM layer,VPI switching within the ATM layer.) The tra�c associated with a given VPI on a link isheterogeneous, made up of the tra�c types described in Section 1, and bound for the samepoint at the edge of the ATM layer. Figure 1 shows an ATM switch with four input linksand four output links. From the discussion in the previous paragraph, cells belonging toan aggregate heterogeneous tra�c of all assigned VPIs of the input link arrive at an inputof an ATM switch. A cell having a speci�c VPI at an input link is directed by the switchto a speci�c output and assigned a VPI associated with the output link. (Cells arriving atdi�erent input links may be bound for the same output link.) Thus, consider the functionsassociated with a given output link in Figure 1. Figure 2 shows a block diagram of theoutput link functions where cells are dispatched to an output queue based on the tra�c typeand the assigned (output link) VPI. Each cell carries information about its tra�c type and4

Page 7: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

BuffersOutput

Dispatcher

Traffic Type

Dispatcher

VPI

DispatcherVPI

Dispatcher

VPI

Type 1 cell

Type K cell

Type i cell

(VBR)

(Data)

(ABR)

Scheduler

Output

LinkCell arrives fortransmissionon output link

j

j

Figure 2: Functions at an ATM switch output.VPI in its header and this information is used by the dispatchers.Cells queued in the output bu�ers are transmitted on the associated output link. Ascheduler allocates a �xed time slice Ti (equal to the transmission time of Ki cells) for theservice of type-i tra�c where Ti depends on the transmission medium and on the minimumbandwidth requirement for the tra�c type. The scheduler emulates the timers. For thepurposes of modeling, we assume that it schedules as many cell bursts as can be transmittedin the allotted time-slice. If type i queues are empty, bursts from the ABR queues are usedto �ll up the time slot. Thus, the scheduler uses a weighted round-robin policy with ABR�ll-in.3 Tra�c IssuesThe purpose of this section is to de�ne a burst and to summarize our assumptions foreach tra�c type in the framework of the switch described above. We will assume that thescheduler allocates all leftover bandwidth to the ABR tra�c without a�ecting the VBRand Data tra�c in any way whatsoever { that is, ABR service is pre-empted by an arrivalof the owner of the time slice. Recall that the ABR tra�c also gets a limited amount of5

Page 8: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

K 2 1

aggregate VBR traffic

VBR source packet

DATA source packet

aggregate DATA traffic

K 2 1

VBRDATAVBR

MUX

switchATM

Input

OutputFigure 3: ATM cell-bursts at a switch input.synchronous bandwidth.In Figure 3, each VBR and Data source input is broken into segments consisting of groupsof cells by the adaptation layers built into the MUX. Cells of the segments are multiplexedand held in a bu�er (one per tra�c type). A scheduler similar to the one described forthe switch allocates bandwidth on the access line by assigning time slices to each tra�ctype. In the VBR time slice, a regulator periodically outputs groups of VBR cells. We referto the group of cells as VBR burst, and the burst size and the inter-burst arrival periodis determined by the number of VBR sessions multiplexed together. We assume that theregulator parameters are programmable and are calculated each time that there is a changein the number of sessions (or at least when a new connection is admitted). We expect to beable to calculate meaningful parameters for the VBR tra�c because of its predictability.For the Data source tra�c, we arrive at a burst level model as follows. We assume anON-OFF model at the cell level (actually a 2-state MMPP model where the cell arrival ratesare 1:100) to approximate cell level aggregate data tra�c at the MUX input. We de�ne Databurst to be cells transmitted during one ON period. The burst level arrival process is assumedto be Poisson and is derived from the cell-level model; burst service times are exponentiallydistributed and decided by sojourn times of the MMPP states. Bu�ering e�ects at the MUXare not considered. VBR and Data tra�c (burst-level) are depicted in Figure 3. Next, weconsider the tra�c arriving to the output bu�ers of the switch.6

Page 9: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

We model each set of bu�ers associated with the tra�c types (Figure 2) as a singlebu�er and assume a bursty and periodic input to the bu�er. By assuming periodicity, weassume that VBR-bursts arrive periodically with a period determined by the period of theindividual sources and the number of sources multiplexed to form the aggregate tra�c at theVBR bu�er input. This implies that the periodicity of the tra�c generated by individualsources manifests itself as a periodic aggregate tra�c at the bu�er input. By VBR-burst wemean a group formed of cells of VBR-type that may have arrived at any input link, but arebound for the output link under consideration. We assume this burst has variable lengthbecause of encoding/compression of each periodic source which causes a variable amount ofinformation to be injected into the network on a per-source basis. The length of each burstis assumed to be exponentially distributed with the parameter depending on the number ofVBR connections bound for a �xed output link. A formula for the calculation of the burstinter-arrival time and the average burst length is given in Section 5. With these assumptionswe use a queueing model with a periodic arrival and an exponentially distributed (burst)service time to model the switch output with respect to the VBR tra�c. Note that thetra�c arriving at the VBR bu�er of the switch is assumed to be a multiplexed stream of oneor more VBR burst sequences shown at the MUX output in Figure 3; the e�ect of bu�eringin the switch fabric has not been addressed in this paper.With regard to the Data model we use the same model of aggregate tra�c as describedto be the Data tra�c input to the MUX, and a queue with a Poisson burst arrival process,and an exponentially distributed burst service time is used. For the ABR, as with Data, weassume a Poisson arrival process and exponentially distributed burst service times, but modelthe additional bandwidth available to ABR by adjusting the time slice. As mentioned inSection 1, the VBR and Data models are �rst solved to determine the additional bandwidthavailable and then input to the ABRmodel which is solved for the cdf of the delay experiencedby an ABR burst.Burst level correlations captured by Markov Modulated Poisson Processes [3] and Marko-vian Arrival Processes (MAP) [8] can be incorporated with ease; as will be apparent inSection 4.1, this is achieved by making the parameter of the arrival transition in the corre-sponding Petri net tra�c model dependent on the state of the Markov chain governing theburst-level MMPP or MAP. Further, if tra�c regulators control individual tra�c types at7

Page 10: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

the output bu�ers, the tra�c at a switch output can be modeled like the tra�c at the MUXoutput.4 Polling Systems and the ATM SwitchIn the previous section we described the nature of the arrival process for each tra�c typeand of the work brought to the switch by each. In this section, we consider the natureof the scheduler. As pointed out in the introduction, the scheduling activity in an ATMswitch can be represented by a polling model with a time-limited service policy. In time-limited polling systems, a timer is started with a �xed initial value (visit-time limit) assoon as service begins, and requests of a source are served until either the timer expiresor there are no requests to serve, whichever occurs �rst. Time-limited service models havebeen used to model timed-token protocols as well as network services. Such systems havebeen widely studied under di�erent hypotheses and simpli�cations [7]. Time-limited servicesystems where the server serves a queue for a duration of time �xed apriori (even if there areno customers to serve) model synchronous time division multiplexing (STDM) systems [12].For these systems bandwidth is wasted when idling at an empty queue to enable quality ofservice guarantees to be made. Our ATM switch model is a variation of this type of pollingsystem: the wasted bandwidth is assigned to the ABR tra�c.A stochastic Petri net description of a generic time-limited polling system with N sources,S1; : : : ; SN , is shown in Figure 4. The queues are served in cyclic order by a single server. Inthe Petri net, place PSi represents the condition that the server is serving source i. PlacePQi represents the queue of bursts generated by source i and containsMi tokens, so that Miis the the number of customers waiting to be served. The server token at source Si enablestransition Tslicei which models the visit-time limit and the server serves as many requests ofsource i as possible during the period for which it is enabled. If place PQi becomes empty,the server still remains at the source awaiting the arrival of any new customer to be serveduntil timer Tslicei expires. The server token then moves from place PSi to place PSi+1 andbegins serving source Si. When the visit-time limit at source N expires, the server tokenreturns to source 1. Transition Tarri models the inter-arrival time at source Si, and Tser�i8

Page 11: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

Source i

PQ1

Tslice 1

PS1

Tser 1

Tarr 1

PQiPSi

Tslice i

Tarr i

Tser i

PQnPSn

Tslice n

Tarr n

Tser nFigure 4: Model of a time-limited service polling systemthe service time.If the arrival processes are mutually independent and visit time limits are �xed apriori,then, the congestion at each queue is independent of the congestion at other queues. Thuseach queue can be analyzed separately by a single-queue model with server vacations. Thevacation approach has been followed in di�erent papers and solved analytically for steady-state measures, even assuming interaction among the sources [7]. In this paper we considerthe cdf of the delay experienced by an admitted customer in the steady-state; this delay-cdfcomputation involves a transient analysis (detailed in Section 4.2).4.1 Petri net Model of the ATM SwitchWith the assumption that the switch allocates bandwidth to the VBR and Data tra�ceven if there are no cell-bursts to serve, the congestion in the VBR and Data queues isindependent of the congestion in other queues. The congestion for the ABR tra�c, however,9

Page 12: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

TarrVBR

TserVBR

QueueVBR

TVBR

a)

PserVBR

PvacVBRTvacVBR

TsliceVBR

TVBR>(TarrVBR, TserVBR, TsliceVBR, TvacVBR)TDATA>(TarrDATA, TserDATA, TsliceVBR, TvacDATA)TABR>(TarrABR, TserABR, TsliceABR, TvacABR)

Transition Priority Relationship

TarrABR

QueueABR

TserABR

TABR

PserABR

PvacABRTvacABR

c)

TsliceABR

TserDATA (#PserDATA)=1TserVBR (#PserVBR)=1

TserABR (#PserABR)=1

Transition Guard

TDATA (#QueueDATA)=dimDATA+1TVBR (#QueueVBR)=dimVBR+1

TABR (#QueueABR)=dimABR+1TvacDATA (#Pstart)=0

TvacVBR=TsliceDATA+TsliceABRTvacDATA=TsliceABR+TsliceVBRTvacABR=TsliceVBR+TsliceDATATstart=TsliceVBR

QueueDATA

TarrDATA

TserDATA

PserDATA

b)

TsliceDATA

TDATA

Tstart

TvacDATA

Pstart

PvacDATA

Figure 5: VBR, Data and ABR models.time

VBR

DATA

ABR Figure 6: Time-slices and Vacation times.10

Page 13: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

depends on the bandwidth used by the VBR and Data tra�c. While this still permits us todecompose the polling model into three vacation models, the VBR and Data models mustbe solved �rst to obtain the bandwidth given to ABR. Accordingly, we solve the VBR andData sub-models for their steady-state time-averaged bandwidth normalized over one round-robin cycle time and limt!1 PfVBR queue is empty at a time instant t, t 2 TsliceV BRg +limt!1 PfData queue is empty at a time instant t, t 2 TsliceDATAg is equal to the steadystate average asynchronous bandwidth available to the ABR tra�c in a round-robin cycle.The Petri nets describing the three vacation models are shown in Figure 5. Transitionslabeled TsliceV BR, TsliceDATA and TsliceABR represent the time allocated to VBR, Data andABR tra�c, respectively, for transmission of VBR, Data and ABR cell-bursts. For eachtra�c type, the Tvac transition models the time for which the server is on vacation andis equal to the sum of the visit times of the other two tra�c types. Places QueueVBR,QueueDATA and QueueABR represent cell-bursts awaiting transmission. Inter-arrival timesand service times are denoted by Tarr and Tserv. In Figure 5, �lled rectangles representdeterministic times, un�lled rectangles, exponentially distributed times, and thin bars areimmediate transitions. When the Petri net is processed to generate the state space of thestochastic process underlying it, the thin bar is used to construct the boundaries of the�nite state space. In CSPL, the C-based Stochastic Petri net Language used by SPNP[1] (Stochastic Petri net Package), the guard (a boolean transition-enabling function) is aversatile construct which considerably simpli�es the Petri net speci�cation. In our modelit is used to enable transitions TVBR; TDATA; TABR so as to ush out one token as soon asthe number of cell-bursts exceeds the dimension of the bu�er. In the model, guards are alsoused to provide interaction between the sub-graphs of each tra�c model; guard functionsare tabulated in the Figure 5. A token in place PserVBR indicates that VBR tra�c is beingserved; otherwise, the token is in place PvacVBR. Further details of the Petri net formalismare available in [1].We will assume that the �rst time slice is given to VBR followed by Data, followed byABR; the initial distribution of tokens is shown in Figure 5. Note that the Data sub-Petrinet is slightly di�erent from the other sub-Petri nets because its vacation time in the very�rst round-robin cycle is TsliceV BR rather than TsliceV BR + TsliceABR (Figure 6). The VBRand Data sub-models are solved to obtain the bandwidth available to ABR as a function of11

Page 14: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

time (Figure 8), but in this paper, we consider the cdf of the burst-delay in the ABR queueafter the queues have reached steady state and so use steady state quantities from Figure 8.We solve the ABR model after increasing TsliceABR by the steady-state bandwidth availablefrom VBR and ABR, and decrease the vacation time by the same amount. Then the delaycdf is obtained as detailed in the next section.4.2 The Tagged Customer MethodThe tagged customer approach is a method for computing the response time distribution(delay response) of queueing systems. This is a two-step process which requires:1. computation of the steady-state probabilities for each of the states seen by an admittedcustomer.2. use of these probabilities to compute the time-to-absorption distribution of the admit-ted customer.Following the approach in [10] we use Stochastic Reward Nets (SRNs) for a precise andcompact speci�cation of the interaction between the various concurrent processes in ourmodel. This enables us to automatically generate and solve the unwieldy Markov chainsunderlying Figure 5 and Figure 7. With the n-stage Erlang approximations for deterministicbehavior, these SRNs represent multidimensional Markov chains which, in the absence of anautomated solution would be extremely tedious if not impossible, to construct by hand andcheck for correctness. In applying the tagged customer approach to our current problem,the �rst step is to solve the ABR model of Figure 5 for the steady-state probabilities �0 � � ��dimABR, where dimABR is the size of the queue (including the burst being served) and eachvector-element is itself a vector whose length depends on the number of Erlang stages used.We may then apply PASTA (Poisson Arrivals See Time Averages) to arriving ABR burstsso that the state probabilities as seen by a typical arriving burst are the same as those at anarbitrary time instant [13]. But since the admitted burst will never encounter a full queue,we divide [�0; � � � ; �dimABR�1] by the scalar 1:0�Pk �dimABR(k).12

Page 15: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

TslotABR

PvacABRTvacABR

PserABR

N

TserABRQueueABR

ALL (#end)=0TserABR (#PserABR)=1Ttagg (#PserABR)=1

Transition Guard

Tagged Ttagg end

Figure 7: Tagged customer model.In the second step, the movement of the admitted (i.e., tagged) customer (place Tagged)through the system is modeled by the SRN shown in Figure 7. In this picture, placeQueueABR implements the FIFO queue corresponding to the ABR bu�er. The probabilityvector [�0; � � � ; �dimABR�1] (scaled vector) gives the probability of the number of customersahead of the admitted customer for each of the server's stages of service and vacation. Theinhibitor arc from place QueueABR to transition Ttagg ensures that the tagged customeris served only after the customers ahead of it. A guard is used to inhibit the �ring of ALLthe transitions as soon as the token corresponding to the tagged customer reaches placeend. The probability of place end being non-empty at time t gives the probability that thetagged customer has been served by time t, which is the conditional delay cdf when thereare 0 � N � (dimABR� 1) customers ahead of the tagged customer and server is in a par-ticular stage of service/vacation. [�0; � � � ; �dimABR�1] is used to uncondition. Note that eachconditional cdf can be computed on a separate processor so that with an adequate numberof parallel processing elements, the compute time is that of computing the conditional cdffor N = ndimABR� 1.13

Page 16: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

5 An Example to Illustrate the Loss-delay Trade-o�sIn this section we calculate values for the parameters indicated in Figures 5 and 7, computethe cdf of the delay seen by ABR tra�c and compare bu�er loss probabilities with deadlineviolation probabilities as a function of the bu�er size.An output link capacity of 155 Mbps is assumed. For the VBR tra�c we assume videosources, each generating a maximum of 750 cells per frame with a peak-to-mean value of 2.5for a given source. Thus, each source generates about 7 Mbps at the video codec outputwhich, with adaptation layer and ATM overheads is about 10 Mbps (6 Mbps MPEG-2video codecs are anticipated [5]), and injects frames into the network every 1/30 th of asecond; so there are 33,333 �S available to transmit the 750 cells of a given source. Thiscould be done in several ways. (i) Start transmission of one cell every 33,333/750 = 44.4�S. (ii) Transmit all 750 cells in one burst, but this will need relatively large bu�ers. (iii)Something in between, such as every 33; 333 � UVBR=750 �S. For our example, we assume amaximum of UV BR = 16 cells transmitted every 711 �S, that is, every 253 cell-transmissiontime units (CTxT = 2:8�S). Thus, the round-robin cycle time is TRR = 253 CTxT =TsliceV BR + TsliceDATA + TsliceABR. Assuming that VBR, Data and ABR are allocated 60%,30%, and 10% of TRR, respectively, TsliceV BR = 152:36 CTxT, TsliceV BR = 76:18 CTxT,TsliceABR = 25:36 CTxT. In the allocated bandwidth, the maximum number of VBR sourcesthat can be served is 9 (0.567 Erlangs). If four VBR sources are active, the inter-arrival timebetween bursts and the average burst length for the aggregate VBR tra�c are calculated tobe � = 64:4 CTxT and B = 7:2 cells according to the following formula.Let p = UV BR=TRR, where UVBR is the transmission time (in CTxT) of a burst of a VBRsource transmitting at maximum intensity. If NV BR are the number of sources multiplexedtogether, and p is small, then, the probability that k sources collide with the �rst source,resulting in a merger of cell bursts is roughly given bypk = NVBR � 1k ! pk (1 � p)NV BR�1�k:Then, � = NV BR�1Xk=0 pk TRRNVBR � k14

Page 17: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

0.0 100.0 200.0 300.0 400.0 500.0 600.0 700.0 800.0 900.01000.0Time in Cell-Tx-Time Units

0.0

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Inst

anta

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ted

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th

MInimum Guaranteed Inst. Expected bandwidth for ABR TrafficInst. Expected bandwidth available from DATA Traffic slotsInst. Expected bandwidth available from VBR Traffic slotsTotal Inst. Expected bandwidth for ABR Traffic

Steady state value = 0.4867

Steady state value = 0.1

Steady state value = 0.1040

Steady state value = 0.6907

Figure 8: Bandwidth available to ABR tra�c.and B = NV BR�1Xk=0 pk UV BR � (k + 1):If all the sources collide, the time-period is TRR and the burst length is NV BR � UV BR ifall sources transmit at maximum rate, but this has a very small probability. For 4 sourcesand a peak-to-mean value of 2.5, � = 64.4 CTxT, and B = 7.2 cells and the correspondingtra�c intensity is �VBR = 0.113. If necessary, more sophisticated models of video sourcescan be used to get better estimates of the VBR burst-tra�c parameters.Assuming a link utilization of 0.65, and extremely low bu�er losses, we choose �Data =0:195 and �ABR = 0:342 for the tra�c intensities of Data and ABR. We use a two stateMMPP source as a burst generator for Data and ABR tra�c aggregates. Thus, let 1=a and1=b denote the mean times (in CTxT) spent in the two MMPP states and ra, rb, the cellarrival rates for the two states. Also, let ra = 100rb. Then for a burstiness of 1.2, andusing (a+ b) = 0:04, the average burst arrival rate and average number of cells per burst arecalculated to be 1=(a�1 + b�1) = 0:0056 bursts per CTxT and (ra � a�1 + rb � b�1) = 34:815

Page 18: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

cells for Data tra�c, and 0.0056 bursts per CTxT and 61 cells for the ABR tra�c.Using these parameters, the steady-state bandwidth available from VBR and Data tra�cwas computed to be 0.4867*TRR and 0.104*TRR { bu�er sizes of 8 and 50 burst units were usedfor the VBR and Data models and the burst loss probabilities were found to be 9:45� 10�9and 1:1 � 10�9. TsliceABR was increased by 0.5907*TRR and TvacABR decreased by this sameamount in the ABR model. We approximated each deterministic transition in the Petrinets by 10-stage Erlang distributions and Figure 8 contains four graphs showing the 10%bandwidth initially allocated to ABR (obtained using a burst-level bu�er size giving lowbu�er losses), the 48% and 10:4% bandwidth made available by VBR and Data, respectively,and the 69% received in total by the ABR tra�c. This �gure indicates that the steady-statedelay response is valid after the transient phase which lasts for about 1000 cell transmissiontimes.The cdf of the delay experienced by an ABR burst in the output bu�er (for the set ofABR queues at an output link) is plotted in Figure 9 for �ve values of bu�er size in burstunits. As expected, the probability of violating a given deadline increases with increasingbu�er sizes. The increase in the violation probability for each increase of ten burst unitshowever, is seen to decrease. By extrapolating, we conclude that for a given tra�c situationthere exists a bu�er size above which the probability of violation increases insigni�cantly,but it is likely that the region of small increases of deadline violation probability will occur atunacceptably large values of violation probability: in Figure 9, (by extrapolating) we see thatthe violation probabilities get closer to each other at bu�er sizes greater than 50 burst unitswhere the violation probability is unacceptably high (with a high level of re-transmissionsdue to deadline violation). The corresponding bu�er loss probability is extremely low (10�15)with a correspondingly low level of re-transmissions.Within the acceptable region of deadline violations (10�6�10�8, see Figure 10), decreasesin the probability of deadline violation can be achieved by decreasing the bu�er size (withan increased bu�er loss probability). Alternately, the bu�er size can be held constant andthe deadline slackened with a corresponding decrease in the throughput for re-transmissionsdue to bu�er losses. A practical approach would be to start with a bu�er size to get a valuefor the bu�er losses, then adjust the deadline value so as to achieve the desired violation16

Page 19: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

losses (and accept the corresponding throughput). Bu�er size and deadline value will needto be set after every call admission because the ABR tra�c is a�ected by the loads of allthe tra�c types.Once an operating point is decided, there is the problem of converting bu�er sizes ex-pressed in burst units to number of cells. Since the maximum throughput is 1 cell perCTxT, a possible conversion is to locate the cdf in Figure 9 corresponding to the bu�ersize (in burst units) and to use the delay in CTxT corresponding to the deadline violationprobability chosen for the operating point as a lower bound on the bu�er size in cells. Themean and the variance of the burst length can be used to estimate the actual value. To givean idea of the magnitudes of the deadline values, at 155 Mbps, these are 4.2, 7.0, 9.8 and12.6 milliseconds, for 10, 20, 30 and 40 burst units respectively for operating points wheredeadline violation probabilities compare with bu�er loss probabilities. These values are lessthan one round trip propagation delay (60 mS).6 A Discussion of the Hardware RequirementIn this section we show that an implementation of Figure 2 can be achieved in a relativelysimple manner: Figure 11 sketches the hardware requirements for inserting an ATM cellinto the appropriate queue and Figure 12 shows the hardware requirement for schedulerimplementation. The arriving cell is held in a register, denoted by cell-register in Figure 11and is 53 bytes. The VPI-VCI bits of the cell header are used to index a table (marked asLook up table for tra�c type in the �gure) for obtaining the tra�c type of the cell. Thistable can be implemented by a static RAM with about 70 nS access delay, or more expensivefast memory can be used if smaller delays are desired for gigabit rates. In the �gure, eachtra�c type's circuitry has an associated tra�c type comparator whose output is activated ifthe tra�c type of the cell matches the reference tra�c type. Note that selection is inhibitedif the FIFO is full. Each FIFO is managed by a headPTR and a tailPTR contained inregisters. The implementation uses distributed decoding for tra�c-type decoding to allowfor easy expansion when including new tra�c types (i.e., there is no centralized decoder atthe output of the look-up table for tra�c types). Separate modules can be designed for each17

Page 20: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

tra�c type after the number and size of the FIFOs are determined for each. Indeed, moduleimplementations may di�er only in the mod value that de�nes the bu�er size.FIFOs are implemented by dual port memories to permit concurrent cell-insert and cell-delete operations. As sketched in Figure 12, the scheduler implementation is simple, requiringa programmable timer, a ring counter and some combinational logic. The scheduler takesthe Q-empty signals from the VBR and Data modules and combines it with the informationon the current time slice to select the VBR, Data or ABR module for cell transmission.Further, we have centralized the scheduler functions to a single module which can be easilyreplaced by modules implementing other scheduling policies if desired.While we have shown one queue per tra�c type in Figure 11 to re ect the analysis inprevious sections, the implementation is easily modi�ed to accommodate several FIFOs foreach tra�c type for example, by mapping the VPI values to FIFO addresses through asecond look-up table whose output is given to a decoder. Thus, a decoder line selects theappropriate queue if the corresponding comparator output is active.Multiported memories can implement several FIFOs on a single chip. The use of the look-up table for the FIFO address adds exibility in that the number of FIFOs implemented foreach tra�c type can be an arbitrary number. Additional hardware is required for schedulingqueues within each tra�c type module and each module can implement its own policy;standard hardware for selecting the next non-empty queue implemented by a barrel shifterand a priority encoder can be employed.7 ConclusionsIn this paper, we have modeled several tra�c types arriving at an ATM switch to obtainthe cdf of the delay as seen by an ABR burst and bu�er losses. Two parameters, the bu�ersize and the value of the deadline selected determine the trade o� between the probabilityof bu�er loss and the probability of deadline violation. In this paper we have derived loss-deadline characteristics for a given tra�c situation so that bu�er size and deadlines can bevaried to select an operating point for satisfying loss-delay requirements.18

Page 21: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

We have focused on a single switch (at the edge of the network) with FIFO output bu�er-ing and round robin scheduling. Our current implementation and analysis does not considerthe smoothing of tra�c at the switches. With some modi�cations our framework can ac-commodate a stop-and-go queueing [4] for example, both in the hardware implementationas well as in the analysis. With this additional control, the work in this paper should beextendable to switches in the interior of the network and we plan to evaluate the advan-tages/disadvantages of introducing this and other cell control schemes.References[1] G. Ciardo, J. Muppala, and K. S. Trivedi. SPNP: Stochastic Petri Net Package. InProc. Int. Conf. on Petri Nets and Performance Models, Kyoto, Japan., pages 142{150,December 1989.[2] A. Demers, S. Keshav, and S. Shenker. Analysis and Simulation of a Fair QueueingAlgorithm. Internetworking: Research and Experience, 1:3{26, 1990.[3] W. Fischer and K. Meier-Hellstern. The Markov-modulated Poisson process(MMPP)Cookbook. Performance Evaluation, 18:149{171, 1992.[4] S. J. Golestani. A Stop and Go Queueing Framework for Congestion Management. InProc. of the ACM Sigcomm, Philadelphia, pages 8{18, September 1990.[5] L. W. Grovenstein, C. Pittman, J. H. Simpson, and D. R. Spears. NCIH Services, Archi-tecture and Implementation. IEEE Network Special Issue: North Carolina InformationHighway, 8(6):20, 37, December 1994.[6] R. Handel and M. N. Huber. Integrated Broadband Networks: An Introduction to ATM-based Networks. Addison-Wesley, 1991.[7] K.K. Leung and D.M. Lucantoni. Two Vacation Models for Token Ring Networks whereService is Controlled by Timers. Performance Evaluation, 20:165{184, 1994.[8] D. M. Lucantoni, G. L. Choudhury, and W. Whitt. The Transient BMAP/G/1 Queue.Stochastic Models, 10(1), 1994. 19

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[9] P. E. McKenney. Stochastic Fairness Queueing. Internetworking: Research and Experi-ence, 2:113{131, 1991.[10] J.K. Muppala, K.S. Trivedi, V. Mainkar, and V.G. Kulkarni. Numerical computationof Response Time Distributions using Stochastic Reward Nets. Annals of OperationsResearch, 48:267{318, 1994.[11] A. K. Parekh and R. G. Gallager. A Generalized Processor Sharing Approach to FlowControl in Integrated Services Networks: The Single-Node Case. IEEE Transactions onNetworking, 1(3):344{357, June 1993.[12] H. Takagi. Queueing analysis of polling models: An update. In H. Takagi, editor,Stochastic Analysis of Computer and Communication Systems, pages 267{318. North-Holland, 1990.[13] R. W. Wol�. Stochastic Modeling and the Theory of Queues. Prentice Hall, 1989.[14] Z-L. Zhang, D. Towsley, and J. Kurose. Statistical analysis of generalized processor shar-ing scheduling discipline. In Proceedings of the Third INFORMS TelecommunicationsConference, Boca Raton, Florida, page 143, 1994.

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Page 23: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

0.0 1000.0 2000.0 3000.0 4000.0 5000.0Delay in Cell Transmission Time Units

0.0

0.2

0.4

0.6

0.8

1.0

Pro

babi

lity

of m

eetin

g de

adlin

e

Buffer size = 10 burst units, Burst loss probability = 6.1488e-04Buffer size = 20 burst units, Burst loss probability = 7.2874e-07Buffer size = 30 burst units, Burst loss probability = 8.6421e-10Buffer size = 40 burst units, Burst loss probability = 1.8319e-12Buffer size = 50 burst units, Burst loss probability = 2.5159e-15Figure 9: Cdf of delay seen by admitted ABR bursts.21

Page 24: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

0.0 10.0 20.0 30.0 40.0 50.0Buffer size in burst units

10-10

10-8

10-6

10-4

10-2

100

Dea

dlin

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olat

ion/

buffe

r-lo

ss p

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Deadline = 1000 CTxTDeadline = 2000 CTxTDeadline = 3000 CTxTDeadline = 4000 CTxTDeadline = 5000 CTxTBuffer Loss Probability

Figure 10: Bu�er loss, deadline value trade o�s.22

Page 25: Buffer losses vs. deadline violations for ABR traffic in an ATM switch: A computational approach

VPI VCI

Look up

table for

traffic type

traffic typeReference

comparator

traffic type

53 bytes

comparator

traffic type

traffic typeReference

comparator

traffic type

53 bytes

head PTRtail PTR A

BR

mo

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le

select ABR

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head PTRtail PTR D

ata

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le

+

select Data

Data Q-empty

Q-full

head PTRtail PTR

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VB

R m

od

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+

Q-full{

cell-register

VCI, VPI

Input Bus

Out

put B

us

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Figure 11: Schematic for Cell Enqueuing.Shift register

Traffic module

selection logic

TimerVBR Q-empty

Data Q-emptySelect VBR

Select ABRSelect DataFigure 12: Scheduler Implementation.23