Brief Introduction of High-Speed Circuits for Optical Communication Systems Zheng Wang Instructor: Dr. Liu.

Brief Introduction of High-Speed Brief Introduction of High-Speed Circuits for Optical Circuits for Optical

Communication SystemsCommunication Systems

Zheng WangZheng Wang

Instructor: Dr. LiuInstructor: Dr. Liu

OutlineOutline

IntroductionIntroduction System OverviewSystem Overview TIA designTIA design Limiter DesignLimiter Design Frequency Acquisition Frequency Acquisition CDR DesignCDR Design ProspectsProspects

Global Internet Backbone GrowthGlobal Internet Backbone Growth((data released by research firm TeleGeography in 2002data released by research firm TeleGeography in 2002))

0100200300400500600700800900

1,000

Mbps

2000 2001 2002

Asia

Europe

US & Canada

SerDes TransceiversSerDes Transceivers(high–speed, full–duplex, serializer/deserializer)

Dedicated line broadband speedsDedicated line broadband speeds

T-1 - 1.544 megabits per second (24 T-1 - 1.544 megabits per second (24 DS0 lines) Ave. cost $1,200./mo.DS0 lines) Ave. cost $1,200./mo.

T-3 - 43.232 megabits per second (28 T-3 - 43.232 megabits per second (28 T1s) Ave. cost $28,000./mo.T1s) Ave. cost $28,000./mo.

OC-3 - 155 megabits per second (100 OC-3 - 155 megabits per second (100 T1s) Ave. cost $49,000./mo.T1s) Ave. cost $49,000./mo.

OC-48 - 2.5 gigabits per seconds (4 OC-48 - 2.5 gigabits per seconds (4 OC12s) no est. price availableOC12s) no est. price available

OC-192 - 9.6 gigabits per second (4 OC-192 - 9.6 gigabits per second (4 OC48s) no est. price availableOC48s) no est. price available

Optical Communication SystemOptical Communication System

TIA (Transimpedance TIA (Transimpedance Amplifier )Amplifier )

Transimpedance GainTransimpedance Gain Bandwidth & Power DissipationBandwidth & Power Dissipation Voltage HeadroomVoltage Headroom Input & Output ImpedanceInput & Output Impedance

TIA Circuit (a)TIA Circuit (a) Gain = ?Gain = ?

Noise contributed by Noise contributed by M1 rises at high M1 rises at high frequencyfrequency

Poor performance at Poor performance at low voltage supplylow voltage supply

TIA Circuit (b)TIA Circuit (b) Gain = RGain = RFF

Value of RValue of RFF can be can be maximized because maximized because it does not limit the it does not limit the voltage headroomvoltage headroom

TIA Building BlockTIA Building Block

Intel LXT16865. Power Supply 3.3V. Power Intel LXT16865. Power Supply 3.3V. Power dissipation less than 160mWdissipation less than 160mW

high optical input sensitivity (as good as -high optical input sensitivity (as good as -20dBm). Suitable for long-haul 20dBm). Suitable for long-haul transmissions. Up to 10.7Gbps speed.transmissions. Up to 10.7Gbps speed.

Limiter DesignLimiter Design

Voltage GainVoltage Gain Bandwidth (Low End & High End)Bandwidth (Low End & High End) Phase ResponsePhase Response DC OffsetDC Offset

Two Limiter TopologiesTwo Limiter Topologies

Limiter Design by MOSFETLimiter Design by MOSFET

With ideal inductors, bandwidth is increased by 82%With ideal inductors, bandwidth is increased by 82% With actual inductors, bandwidth is increased by 50%With actual inductors, bandwidth is increased by 50% But inductors consume substantial areaBut inductors consume substantial area

CDR DesignCDR Design((clock-and-data recovery)

Jitter Generation, Transfer, and ToleranceJitter Generation, Transfer, and Tolerance Frequency Capture RangeFrequency Capture Range Response to Long RunsResponse to Long Runs Flip-flop and Oscillator SpeedFlip-flop and Oscillator Speed

Typical CDR ArchitectureTypical CDR Architecture

Frequency AcquisitionFrequency Acquisition Capture range is typically a few percent.Capture range is typically a few percent. VCO center frequency can vary substantially VCO center frequency can vary substantially

with process and temperature.with process and temperature. Must drive the VCO frequency toward the data Must drive the VCO frequency toward the data

rate before phase-locking can occurrate before phase-locking can occur

Definition of Jitter Definition of Jitter Synchronous networks such as the Synchronous networks such as the

Synchronous Digital Hierarchy (SDH) Synchronous Digital Hierarchy (SDH) and the Synchronous Optical NETwork and the Synchronous Optical NETwork (SONET) rely on highly accurate and (SONET) rely on highly accurate and stable synchronization to process data stable synchronization to process data in and out of network elements.in and out of network elements.

Jitter is used to describe short term, Jitter is used to describe short term, non-cumulative variations of the non-cumulative variations of the significant instants of a digital signal significant instants of a digital signal from their ideal positions in time from their ideal positions in time

CDR Jitter GenerationCDR Jitter Generation

Jitter Generation: Peak-to-peak jitter produced Jitter Generation: Peak-to-peak jitter produced by CDR circuit itself. Must typically remain by CDR circuit itself. Must typically remain below 0.1dB. To eliminate the jitter, there are below 0.1dB. To eliminate the jitter, there are several ways. (reference: several ways. (reference: Cheung, Jonathan, Cheung, Jonathan, “Low Jitter Phase-Locked Loop”)“Low Jitter Phase-Locked Loop”)

Prospects of CMOS TechnologyProspects of CMOS Technology The transit frequency of 0.13-um NMOS The transit frequency of 0.13-um NMOS

devices exceeds 100 GHz.devices exceeds 100 GHz. As with RF circuits, optical communication As with RF circuits, optical communication

circuits can greatly benefit from CMOS circuits can greatly benefit from CMOS technology.technology.

The cost and integration advantages of The cost and integration advantages of CMOS manifest themselves in:CMOS manifest themselves in:

- Wave-Division Multiplexing Systems- Wave-Division Multiplexing Systems - Multiple Transceivers for Bundle of Fibers- Multiple Transceivers for Bundle of Fibers - Highly-Integrated Transceivers- Highly-Integrated Transceivers CMOS at 40 Gb/s? Why Not?CMOS at 40 Gb/s? Why Not?

Recommended BookRecommended Book

“Design of Integrated Circuits for Optical Communications”by Behzad Razavi

List Price: $144.15 Half.com: $56.35

Reference PaperReference Paper Cheung, Jonathan, “Low Jitter Phase-Locked Loop”Cheung, Jonathan, “Low Jitter Phase-Locked Loop”

““LXT16865 Transimpedance Amplifier (TIA)” LXT16865 Transimpedance Amplifier (TIA)” http://www.intel.com/design/network/products/optical/phys/lxt16http://www.intel.com/design/network/products/optical/phys/lxt16865.htm865.htm

Mauldin, Alan, “Global Internet Backbone Growth Slows Mauldin, Alan, “Global Internet Backbone Growth Slows Dramatically,” October 16, 2002 October 21, 2003 Dramatically,” October 16, 2002 October 21, 2003 http://www.telegeography.com/press/releases/2002/16-oct-2002.http://www.telegeography.com/press/releases/2002/16-oct-2002.htmlhtml

Schmitt, Nicolas, “Jitter Measurements of Agilent Technologies Schmitt, Nicolas, “Jitter Measurements of Agilent Technologies OC-48 Optical Transceivers using the OmniBER718”OC-48 Optical Transceivers using the OmniBER718”

http://ftp.agilent.com/pub/semiconductor/morpheus/docs/jitter_mhttp://ftp.agilent.com/pub/semiconductor/morpheus/docs/jitter_measurements2.pdfeasurements2.pdf

““T1, T3, OC3, OC12, OC48 and OC192 Research Information” T1, T3, OC3, OC12, OC48 and OC192 Research Information” http://www.broadband-internet-provider.com/research-informatiohttp://www.broadband-internet-provider.com/research-information.htmn.htm

Thank You for your timeThank You for your time

Questions?Questions?