Foundations of Global Networked Computing: Building a Modern Computer From First Principles IWKS 3300: NAND to Tetris Spring 2019 John K. Bennett This course is based upon the work of Noam Nisan and Shimon Schocken. More information can be found at (www.nand2tetris.org ). Boolean Logic
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Boolean LogicFrom a theoretical perspective, physical realizations of logic gates are irrelevant. From an engineering perspective, physical realizations of logic gates are essential
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Foundations of Global Networked Computing:
Building a Modern Computer From First Principles
IWKS 3300: NAND to Tetris
Spring 2019
John K. Bennett
This course is based upon the work of Noam Nisan and Shimon Schocken.
More information can be found at (www.nand2tetris.org).
A Boolean function can be expressed using a logic expression, a truth table or a schematic.
Important observation:Every Boolean function can be expressed using And, Or & Not, so, if your function can implement these 3, it is “functionally complete.”
x y Nand(x,y)
0 0 1
0 1 1
1 0 1
1 1 0
x y And(x,y)
0 0 0
0 1 0
1 0 0
1 1 1
x y Or(x,y)
0 0 0
0 1 1
1 0 1
1 1 1
x Not(x)
0 1
1 0
All Boolean Functions of Two Variables
How many
for n
variables?
Boolean Algebra
Given: Nand(a,b), false
We can build:
Not(a) = Nand(a,a)
true = Not(false)
And(a,b) = Not(Nand(a,b))
Or(a,b) = Not(And(Not(a),Not(b)))
Xor(a,b) = Or(And(a,Not(b)),And(Not(a),b)))
Etc. (i.e., any Boolean function) We can prove this!
George Boole, 1815-1864
(“A Calculus of Logic”)
Gate Logic
Gate logic – a gate architecture designed to implement a Boolean function
Elementary gates:
Composite gates:
Important distinction: Interface (what) VS implementation (how).
Gate Logic
And
And
Not
Or out
a
b
Not
Xor(a,b) = Or(And(a,Not(b)),And(Not(a),b)))
An (Inefficient) Implementation
Xora
bout
0 0 00 1 1
1 0 11 1 0
a b out
Interface
Claude Shannon, 1916-2001
(“Symbolic Analysis of Relay and
Switching Circuits” )
0 0 0
0 1 01 0 0
1 1 1
a b out
a b
out
power supply
AND gate
power supply
a
b
out
0 0 0
0 1 1
1 0 1
1 1 1
a b out
OR gate
Circuit Implementations
From a theoretical perspective, physical realizations of logic gates are irrelevant.
From an engineering perspective, physical realizations of logic gates are essential to performance.
Diode Transistor Implementation of NAND
Project 1: Elementary Logic Gates
Given: Nand(a,b), false
Build:
Not(a) = ...
true = ...
And(a,b) = ...
Or(a,b) = ...
Mux(a,b,sel) = ...
Etc. - 12 gates altogether.
a b Nand(a,b)
0 0 1
0 1 1
1 0 1
1 1 0
Q: Why these particular 12 gates?
A: Since …
They are commonly used gates
They provide all the basic building
blocks needed to build our
computer.
Multiplexor
Proposed Implementation: based on Not, And, Or gates (since
we can build all of these from NAND.
a
b
sel
outMux
a b sel out
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
sel out
0 a
1 b
See Lab Notes: Multiplexors can be used a “function generators.”
For example, how might a 4:1 mux be used to generate all possible
combinations of two Boolean variables?
outa
bAnd
a b out
0 0 0
0 1 0
1 0 0
1 1 1
And.cmp
load And.hdl,
output-file And.out,
compare-to And.cmp,
output-list a b out;
set a 0,set b 0,eval,output;
set a 0,set b 1,eval,output;
set a 1,set b 0,eval,output;
set a 1, set b 1, eval, output;
And.tstAnd.hdl
CHIP And
{ IN a, b;
OUT ;
// implementation missing
}
Example: Building an AND Gate
Contract:
When running your
.hdl on our .tst,
your .out should be
the same as
the book’s .cmp.
Building an AND Gate
outa
bAnd
CHIP And
{ IN a, b;
OUT out;
// implementation missing
}
And.hdl
Interface: And(a,b) = 1 exactly when a=b=1
Implementation: And(a,b) = Not(Nand(a,b))
outa
b
Building an AND Gate
CHIP And
{ IN a, b;
OUT out;
// implementation missing
}
And.hdl
outNot
a
b
outNand
ain out
x
b
Implementation: And(a,b) = Not(Nand(a,b))
CHIP And
{ IN a, b;
OUT out;
// implementation missing
}
And.hdl
Building an AND Gate
CHIP And
{ IN a, b;
OUT out;
Nand(a = a,
b = b,
out = x);
Not(in = x, out = out)
}
Implementation: And(a,b) = Not(Nand(a,b))
outNOT
a
b
outNAND
ain out
x
b
Building an AND Gate
And.hdl
Equation: And(a,b) = Not(Nand(a,b))
outNOT
a
b
outNAND
ain out
x
b
Building an AND Gate with LogicCircuit
Building an AND Gate in LogicCircuit
Building an AND Gate in LogicCircuit – NAND Gate First
Building an AND Gate in LogicCircuit – NAND First
How Will We Create the HDL Files?
CHIP Nand {
IN a, b;
OUT out;
PARTS:
Nand2 (x1 = a, x2 = b, q = out);
}
Building the AND Gate
// This file was generated from LogicCircuit CircuitProject: And
// This is beta release code. Please report bugs to [email protected]