BJT Fixed Bias ENGI 242 ELEC 222 January 2004 ENGI 242/ELEC 222 2 BJT Biasing 1 For Fixed Bias Configuration: • Draw Equivalent Input circuit • Draw Equivalent Output circuit • Write necessary KVL and KCL Equations • Determine the Quiescent Operating Point – Graphical Solution using Loadlines – Computational Analysis • Design and test design using a computer simulation
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ENGI 242/ELEC 222 January 2004
Fixed Bias 1
BJT Fixed Bias
ENGI 242ELEC 222
January 2004 ENGI 242/ELEC 222 2
BJT Biasing 1For Fixed Bias Configuration:• Draw Equivalent Input circuit• Draw Equivalent Output circuit• Write necessary KVL and KCL Equations• Determine the Quiescent Operating Point
– Graphical Solution using Loadlines– Computational Analysis
• Design and test design using a computer simulation
ENGI 242/ELEC 222 January 2004
Fixed Bias 2
January 2004 ENGI 242/ELEC 222 3
Complete CE Amplifier with Fixed Bias
January 2004 ENGI 242/ELEC 222 4
Fixed Bias and Equivalent DC Circuit
ENGI 242/ELEC 222 January 2004
Fixed Bias 3
January 2004 ENGI 242/ELEC 222 5
Fixed-Bias Circuit
January 2004 ENGI 242/ELEC 222 6
DC Equivalent Circuit
ENGI 242/ELEC 222 January 2004
Fixed Bias 4
January 2004 ENGI 242/ELEC 222 7
Base-Emitter (Input) Loop
Using Kirchoff’s voltage law: – VCC + IBRB + VBE = 0
Solving for IB:C C BE
B B
V - VI = R
January 2004 ENGI 242/ELEC 222 8
Collector-Emitter (Output) Loop
Since: IC = β IB
Using Kirchoff’s voltage law: – VCC + IC RC + VCE = 0Because: VCE = VC – VE
Since VE = 0V, then: VC = VCE
And VCE = VCC - IC RC
Also: VBE = VB - VE
with VE = 0V, then: VB = VBE
ENGI 242/ELEC 222 January 2004
Fixed Bias 5
January 2004 ENGI 242/ELEC 222 9
BJT Saturation Regions
When the transistor is operating in the Saturation Region, the transistor is conducting at maximum collector current (based on the resistances in the output circuit, not the spec sheet value) such that:
CC CE Csat
C
CEwhere
V - VI = R
V = 0 .2 V
January 2004 ENGI 242/ELEC 222 10
Determining Icsat
ENGI 242/ELEC 222 January 2004
Fixed Bias 6
January 2004 ENGI 242/ELEC 222 11
Determining ICSAT for the fixed-bias configuration
January 2004 ENGI 242/ELEC 222 12
Load Line Analysis
ENGI 242/ELEC 222 January 2004
Fixed Bias 7
January 2004 ENGI 242/ELEC 222 13
Load Line AnalysisThe end points of the line are : ICsat and VCEcutoffFor load line analysis, use VCE = 0 for ICSAT, and IC = 0 for VCEcutoff
ICsat:
VCEcutoff:
Where IB intersects with the load line we have the Q pointQ-point is the particular operating point: • Value of RB• Sets the value of IB• Where IB and Load Line intersect• Sets the values of VCE and IC.
CE
C
CC Csat V 0V
C
CE CC I 0mA
VI = R
V = V
|
|=
=
January 2004 ENGI 242/ELEC 222 14
Circuit values effect Q-point
ENGI 242/ELEC 222 January 2004
Fixed Bias 8
January 2004 ENGI 242/ELEC 222 15
Circuit values effect Q-point (continued)
January 2004 ENGI 242/ELEC 222 16
Circuit values effect Q-point (continued)
ENGI 242/ELEC 222 January 2004
Fixed Bias 9
January 2004 ENGI 242/ELEC 222 17
Load-line analysis
January 2004 ENGI 242/ELEC 222 18
DC Fixed Bias Circuit Example
ENGI 242/ELEC 222 January 2004
Fixed Bias 10
January 2004 ENGI 242/ELEC 222 19
Loadline Example Family of Curves
Emitter Stabilized Bias
ENGI 242ELEC 222
ENGI 242/ELEC 222 January 2004
Fixed Bias 11
January 2004 ENGI 242/ELEC 222 21
BJT Emitter BiasFor the Emitter Stabilized Bias Configuration:• Draw Equivalent Input circuit• Draw Equivalent Output circuit• Write necessary KVL and KCL Equations• Determine the Quiescent Operating Point
– Graphical Solution using Loadlines– Computational Analysis
• Design and test design using a computer simulation
January 2004 ENGI 242/ELEC 222 22
Improved Bias StabilityThe addition of RE to the Emitter circuit improves the stability of a transistor output
Stability refers to a bias circuit in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor forward current gain (β)The temperature (TA or ambient temperature) surrounding the transistor circuit is not always constantTherefore, the transistor β is not a constant value
ENGI 242/ELEC 222 January 2004
Fixed Bias 12
January 2004 ENGI 242/ELEC 222 23
Emitter-Stabilized Bias Circuit
Adding an emitter resistor to the circuit between the emitter lead and ground stabilizes the bias circuit over Fixed Bias
We can write: - VCC + IB RB + VBE + (β + 1) IB RE = 0
Grouping terms and solving for IB:
Or we could solve for IE with:
CC BEB
B E
V - VI = R + (β+1)R
BCC E BE E E
R- V + I + V + I R = 0 ( + 1)
β
January 2004 ENGI 242/ELEC 222 28
Collector-Emitter Loop
ENGI 242/ELEC 222 January 2004
Fixed Bias 15
January 2004 ENGI 242/ELEC 222 29
Collector-Emitter Loop
Applying Kirchoff’s voltage law: - VCC + IC RC + VCE + IE RE = 0Assuming that IE ≅ IC and solving for VCE: VCE = VCC – IC (RC + RE) If we can not use IE ≅ IC the IC = αIE and: VCE = VCC – IC (RC + αRE)Solve for VE: VE = IE RE