A Project on Bidirectional Visitor Counter Submitted for partial fulfillment of award of BACHELOR OF TECHNOLOGY degree in Electronics & Communication Engineering by Rahul Kumar Verma() Rajeev Ranjan Singh() Rajkumar Singh () Anoop Kumar () H.R. INSTITUTE OF TECHNOLOGY
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
A Project on
Bidirectional Visitor Counter
Submitted for partial fulfillment of award ofBACHELOR OF TECHNOLOGY
Submitted for partial fulfilment of the requirement for the degree of
Bachelor of Technologyin
Electronics & Communication Engineering
H.R. INSTITUTE OF TECHNOLOGY7th Km Milestone Meerut Road Morta, Ghaziabad
G.B.T.U. LUCKNOWJune, 2011
Table of ContentsDECLARATION.........................................................................................................................iiiCERTIFICATE..........................................................................................................................ivACKNOWLEDGEMENT............................................................................................................vABSTRACT.................................................................................................................................viLIST OF FIGURE....................................................................................................................viiCHAPTER 1...............................................................................................................................1
INTRODUCTION..................................................................................................................11.1 Block Diagram..............................................................................................................21.2 Sensor arrangement at the way..................................................................................2
2.1 IR Transmitter.............................................................................................................32.2 Photo-transistors...........................................................................................................32.3 Symbol and typical view of photo-transistor:............................................................42.4 Features:........................................................................................................................4
CHAPTER 3...............................................................................................................................5LOGIC CONTROL CIRCUIT...............................................................................................5
3.1 Comparators...............................................................................................................53.2 Pin Diagram of LM324:..............................................................................................63.3 General description on LM324...................................................................................63.4 Features:......................................................................................................................63.5 Typical Applications:..................................................................................................7
4.1 JK Flip-flop:................................................................................................................84.2 Symbol for JK flip-flop:..............................................................................................84.3 Equation and Truth table.............................................................................................94.4 Pin Diagram of Dual JK flip-flop IC 74LS76:...........................................................10
CHAPTER 10...........................................................................................................................33PCB DESIGN AND FABRICATION..................................................................................33
10.1 Protel for windows PCB 1.5 capabilities...............................................................3310.2 PCB fabrication.......................................................................................................34
I hereby declare that this submission is my own work and that, to the best of my knowledge and belief, it contains no material previously published or written by another person nor material which to a substantial extent has been accepted for the award of any other degree or diploma of the university or other institute of higher learning except where due acknowledgement has been made in text.
Certified that Rahul Kumar Verma, Rajeev Ranjan Singh, Rajkumar Singh, Anoop Kumar has
carried out the research work presented in this project entitled “Bidirectional Visitor
Counter” for the award of Bachelor of Technology from Gautam Buddh Technical University,
Lucknow under my supervision. The project embodies result of original work and studies
carried out by Student himself and the contents of the project do not form the basis for the
award of any other degree to the candidate or to anybody else.
Prof. Sukhbir Singh Mr.Bhaskar GuptaH.O.D. SUPERVISOR LecturerDepartment Of Electronics & Department of Electronics&Communication Engineering Communication EngineeringH.R.Institute Of Technology H.R.Institute Of Technology
P.S. Kushwaha
(Project Guide) External Examiner
ii
ACKNOWLEDGEMENT
All praise to almighty God, who provided us this opportunity to work under our beloved & respected teachers for making us able to complete the present study successfully.It gives us a great sense of pleasure to present the report of B. Tech project under taken during B.TECH final year.I owe special debt of gratitude to our respected teacher “Prof. Sukhbir Singh (HOD of ECE department), H.R. Institute of Technology Ghaziabad for his constant support & guidance throughout the course of my work.His sincerity, throughout & preservance have been a constant source of inspiration for me.I am thankful to my project guide “Mr. P.S. Kushwaha” for his invaluable guidance constructive suggestions, practical help through securitization and affectionate attitude throughout the period of project enabled us to face this challenge.I am also thankful to every one whom I could not mention here but who directly or indirectly supported me to face this challenge.Lastly but not the least my warmest thanks goes to my parents who helped me by their constructive views during some time or other in life.
Microcontroller/Microprocessor is the most versatile device in the world. It’s once a creature of science fiction is today a reality. In real sense it is a device which allows human beings to implement their intelligence in machines. Visitor counting is simply a measurement of the visitor traffic entering and exiting offices, malls, sports venues, etc. Counting the visitors helps to maximize the efficiency and effectiveness of employees, floor area and sales potential of an organization. Visitor counting is not limited to the entry/exit point of a company but has a wide range of applications that provide information to management on the volume and flow of people throughout a location. A primary method for counting the visitors involves hiring human auditors to stand and manually tally the number of visitors who pass by a certain location. But human-based data collection comes at great expense. Here is a low-cost microcontroller based visitor counter that can be used to know the number of persons at a place. All the components required are readily available in the market and the circuit is easy to build.The final result of this project is a thorough design for an autonomous visitor counter including a detailed test plan for the use by subsequent design teams.
iv
LIST OF FIGUREFigure 1.0.1 Schematic View.....................................................................................................1Figure1.0.2 Block Diagram.........................................................................................................2Figure1.0.3 Sensor arrangement.................................................................................................2Figure 3. 0.1 Input/Output references.........................................................................................5Figure 3.2 Pin Diagram of LM324.............................................................................................6Figure 3.3 Typical Application...................................................................................................7Figure 4.1 JK flip flop symbol....................................................................................................8Figure 4.2 Logic Symbol............................................................................................................9Figure 4.3 State Table...............................................................................................................10Figure 4.4 IC 74LS76...............................................................................................................10Figure 4.5Logic Diagram..........................................................................................................11Figure 5.1 Pin Diagram of AT89C52.......................................................................................13Figure 5.2 Architecture.............................................................................................................14Figure 5.3P1.0,P1.1 function....................................................................................................15Figure 5.4 P3.0-P3.8 Fnction....................................................................................................16Figure 5.5 Interrupt Enable (IE) Register.................................................................................18Figure 5.6 Interrupt Switching..................................................................................................19Figure 5.7 Interrupt Source.......................................................................................................19Figure 5.8 Oscillator connection...............................................................................................20Figure 5.0.9 Programming mode..............................................................................................20Figure 6.1 A Typical 7-segment display component, with decimal point................................23Figure 6.2 The individual segment of a seven-segment display...............................................23Figure 7.1 Power Supply...........................................................................................................25Figure 8.1Schematic Diagram of Bidirectional Visitor Counter..............................................28Figure 11.1 Internal architecture of relay................................................................................37Figure 11.2 Relay......................................................................................................................38Figure 12.1 ULN Device Driver...............................................................................................40Figure 12.2 Drivers...................................................................................................................41Figure 12.3 ULN pin configuration..........................................................................................42
v
CHAPTER 1
INTRODUCTION
This project titled “Microcontroller based Bidirectional Visitor counter” is designed and
presented in order to count the visitors of an auditorium, hall, offices, malls, sports venue, etc.
The system counts both the entering and exiting visitor of the auditorium or hall or other
place, where it is placed. Depending upon the interrupt from the sensors, the system identifies
the entry and exit of the visitor. On the successful implementation of the system, it displays
the number of visitor present in the auditorium or hall. This system can be economically
implemented in all the places where the visitors have to be counted and controlled. Since
counting the visitors helps to maximize the efficiency and effectiveness of employees, floor
area and sales potential of an organization, etc.
Figure 1.0.1 Schematic View
1.1 Block Diagram
1.2 Sensor arrangement at the way
SensorsLogic
Control Circuit
Micro-controllerAT89C52
Display
PowerSupply +5V
Figure1.0.2 Block Diagram
Figure1.0.3 Sensor arrangement
CHAPTER 2
SENSORS
Enter
Exit
IR TX1
IR TX2 RX2
RX1
The block shows the sensor arrangement at the entrance cum exit passage. Here a pair of IR
transmitter – receiver is used as sensor. Photo transistors are used as IR receiver, since it has
sensitivity to receive IR rays.
2.1 IR Transmitter
Infrared (IR) radiation is electromagnetic radiation of a wavelength longer than that of visible
light, but shorter than that of microwaves. The name means "below red" (from the Latin infra,
"below"), red being the color of visible light with the longest wavelength. Infrared radiation
has wavelengths between about 750 nm and 1 mm, spanning five orders of magnitude. A
longer wavelength means it has a lower frequency than red, hence "below". Objects generally
emit infrared radiation across a spectrum of wavelengths, but only a specific region of the
spectrum is of interest because sensors are usually designed only to collect radiation within a
specific bandwidth.
Remote controls and IrDA devices use infrared light-emitting diodes (LEDs) to emit infrared
radiation which is focused by a plastic lens into a narrow beam. The receiver uses a silicon
photodiode to convert the infrared radiation to an electric current. It responds only to the
rapidly pulsing signal created by the transmitter, and filters out slowly changing infrared
radiation from ambient light. IR does not penetrate walls and so does not interfere with other
devices in adjoining rooms.
2.2 Photo-transistors
Phototransistors are examples of photodiode-amplifier combinations integrated within a single
silicon ship. These combinations are put together in order to overcome the major fault of
photodiodes: unity gain. Many applications demand a greater output signal from photodiode
can
always be amplified through use of an external op-amp or other circuitry, this approach is
often not as practical or as cost effective as the use of phototransistors.
The phototransistor can be viewed as a photodiode whose output photocurrent is fed into the
base of a conventional small signal transistor. While not required for operation of the device
A circuit symbol for a JK flip-flop, where > is the clock input, J and K are data inputs, Q is
the stored data output, and Q' is the inverse of Q.
Figure 4.8 Logic Symbol
4.3 Equation and Truth table
The characteristic equation of the JK flip-flop is:
And the corresponding truth table is:
J K Qnext Comments
0 0 Hold State
0 1 0 Reset
1 0 1 Set
1 1 ToggleFigure 4.9 State Table
4.4 Pin Diagram of Dual JK flip-flop IC 74LS76:
Figure 4.10 IC 74LS76
Figure 4.11Logic Diagram
CHAPTER 5
MICROCONTROLLER AT89C52
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes
of Flash programmable and erasable read only memory (PEROM). The device is
manufactured using Atmel’s high-density nonvolatile memory technology and is compatible
with the industry-standard 80C51 and 80C52 instruction set and pin out. The on-chip Flash
allows the program memory to be reprogrammed in-system or by a conventional nonvolatile
memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip,
the Atmel AT89C52 is a powerful microcomputer which provides a highly-flexible and cost-
effective solution to many embedded control applications.
5.1 Features:
• Compatible with MCS-51™ Products
• 8K Bytes of In-System Reprogrammable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Programmable Serial Channel
• Low-power Idle and Power-down Modes
5.2 Pin configuration of Microcontroller AT89C52:
Figure 5.12 Pin Diagram of AT89C52
5.3 Block Diagram of Atmel 89C52 Microcontroller
Figure 5.13 Architecture
5.4 Pin Description of Microcontroller AT89C52:
Port 0
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight
TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance
inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus during
accesses to external program and data memory. In this mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes
during program verification. External pull-ups are required during program verification.
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (IIL) because of the internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input
(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
Figure 5.14P1.0,P1.1 functionPort 1 also receives the low-order address bytes during Flash programming and verification.
Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being
pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-
order address byte during fetches from external program memory and during accesses to
external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application, Port 2
uses strong internal pull-ups when emitting 1s. During accesses to external data memory that
use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function
Register. Port 2 also receives the high-order address bits and some control signals during
Flash programming and verification.
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of
various special features of the AT89C51, as shown in the following table. Port 3 also receives
some control signals for Flash programming and verification.
Figure 5.15 P3.0-P3.8 Fnction RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets
the device.
ALE/PROG
Address Latch Enable is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data memory. If desired, ALE operation
can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only
during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the
ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN:
Program Store Enable is the read strobe to external program memory. When the AT89C52 is
executing code from external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.
EA/VPP:
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should
be strapped to VCC for internal program executions. This pin also receives the 12-volt
programming enable voltage
(VPP) during Flash programming when 12-volt programming is selected.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2:
Output from the inverting oscillator amplifier.
5.5 Data Memory
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel
address space to the Special Function Registers. That means the upper 128 bytes have the
same addresses as the SFR space but are physically separate from SFR space. When an
instruction accesses an internal location above address 7FH, the address mode used in the
instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR
space. Instructions that use direct addressing access SFR space.
5.6 Interrupts
The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1),
three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all
shown in Figure below. Each of these interrupt sources can be individually enabled or
disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global
disable bit, EA, which disables all interrupts at once. Note that Table shows that bit position
IE.6 is unimplemented.
Figure 5.16 Interrupt Enable (IE) Register
In the AT89C51, bit position IE.5 is also unimplemented. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.
Figure 5.17 Interrupt Switching
Figure 5.18 Interrupt Source
5.7 Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can
be configured for use as an on-chip oscillator, as shown in Figure below. Either a quartz
crystal or ceramic resonator may be used. To drive the device from an external clock source,
XTAL2 should be left unconnected while XTAL1 is driven. There are no requirements on the
duty cycle of the external clock signal, since the input to the internal clocking circuitry is
through a divide-by-two flip-flop, but minimum and maximum voltage high and low time
specifications must be observed.
Figure 5.19 Oscillator connection
5.8 Programming the Flash
The AT89C52 is normally shipped with the on-chip Flash memory array in the erased state
(that is, contents = FFH) and ready to be programmed. The programming interface accepts
either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The Low-
voltage programming mode provides a convenient way to program the AT89C52 inside the
user’s system, while the high-voltage programming mode is compatible with conventional
third party Flash or EPROM programmers. The AT89C52 is shipped with either the high-
voltage or low-voltage programming mode enabled. The respective top-side marking and
device signature codes are listed in the following table.
Figure 5.0.20 Programming mode
The AT89C52 code memory array is programmed byte-by-byte in either programming mode.
To program any nonblank byte in the on-chip Flash Memory, the entire memory must be
erased using the Chip Erase Mode.
5.9 Programming Algorithm:
Before programming the AT89C52, the address, data and control signals should be set up
according to the Flash programming mode. To program the AT89C52, take the following
steps.
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V for the high-voltage programming mode.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write
cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5,
changing the address and data for the entire array or until the end of the object file is reached.
5.10 Data Polling
The AT89C52 features Data Polling to indicate the end of a write cycle. During a write cycle,
an attempted read of the last byte written will result in the complement of the written data on
PO.7. Once the write cycle has been completed, true data is valid on all outputs, and the next
cycle may begin. Data Polling may begin any time after a write cycle has been initiated.
5.11 Ready/Busy
The progress of byte programming can also be monitored by the RDY/BSY output signal.
P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled
high again when programming is done to indicate READY.
5.12 Program Verify
If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read
back via the address and data lines for verification. The lock bits cannot be verified directly.
Verification of the lock bits is achieved by observing that their features are enabled.
5.13 Chip Erase
The entire Flash array is erased electrically by using the proper combination of control signals
and by holding ALE/PROG low for 10 ms. The code array is written with all 1s. The chip
erase operation must be executed before the code memory can be reprogrammed.
5.14 Programming Interface:
Every code byte in the Flash array can be written, and the entire array can be erased, by using
the appropriate combination of control signals. The write operation cycle is self timed and
once initiated, will automatically time itself to completion.
CHAPTER 6
DISPLAY
The circuit comprises three seven segment displays to represent the number of visitors
present.
6.1 Seven segment display
Figure 6.21 A Typical 7-segment display component, with decimal point
A seven segment display, as its name indicates, is composed of seven elements. Individually
on or off, they can be combined to produce simplified representations of the Hindu-Arabic
numerals. Often the seven segments are arranged in an oblique, or italic, arrangement, which
aids readability.
Figure 6.22 The individual segment of a seven-segment display