AUTOSAR MCAL for i.MX 8 Application Processors

Company Public – NXP, the NXP logo, and NXP secure connections for a smarter world are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2019 NXP B.V.

Sr. Project ManagerMICR Advanced Technologies

Salam Zeidan

AUTOSAR MCAL for i.MX 8 Application Processors

AMF-AUT-T3902

COMPANY PUBLIC 1COMPANY PUBLIC 1

• General Information• i.MX 8 AUTOSAR MCALs:

− Implementation For All Derivatives In i.MX 8/8X Families− Example Startup− Configuration Tool View− Microcontroller Drivers − I/O Drivers − Communications Drivers− Memory Drivers− Crypto Drivers− Complex Drivers

Agenda

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General Information

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AUTOSAR MCAL low level drivers

AUTOSAR Operating System

Self Test Application oriented Libraries

i.MX AUTOSAR Solution

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AUTOSAR – NXP Automotive SWAUTOSAR (AUTomotive Open System ARchitecture) Org. aims to improve complexity management of integrated E/E architectures through increased reuse and exchangeability of SW modules between OEMs and suppliers. The essential means is the standardization of the software architecture of ECUs.

As a premium member of the AUTOSAR partnership NXP continues to develop its AUTOSAR SW offering across its product lines for use in automotive applications

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i.MX 8 AUTOSAR Classic Platform (CP) Product

i.MX 8 AUTOSAR OS, MCALs, and Complex Drivers

Micro-controller Drivers

Com

plex

Driv

ers

i.MX Hardware

Memory HW Abstr.

AUTOSAR Runtime Environment (RTE)

Onboard Dev. Abstr.

Memory Services

Communi-cation Drivers

Communi-cation Services

COM HW Abstr.

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

System Services

Application Software

Component


Component


Component


Component

I/O DriversMemory Drivers

Ope

ratin

g Sy

stem

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AUTOSAR Software Release Framework Overview • BETA Release (Select Customers)/ PRC (Product Release Candidate)− Includes all MCAL Drivers (Feature Complete) fully verified and documented− Includes Integration Testing− Complete Quality Package: on-request delivery− Code coverage: generated− No open S1 and S2 defects

• Release to Market Candidate – RTMC (All Customers)/ RFP (Relapse for Production)− Beta criteria +− 100% statement coverage, branch coverage for non-configurable SW− 80% statement coverage, branch coverage for configurable SW− Complete Quality Package: externally delivery− No open S1 and S2 defects

• Each AUTOSAR Classic Platform MCAL version will have an individual release

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MCAL Software Life Cycle Methodologies & Quality: Engineering Discipline

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MCAL Quality Assurance• Quality Assurance Plan• QA audit, Assessment (TS16949, ASPICE, ISO26262)• NXP process compliance audit• Release Readiness review• Metrics collection and tracking( Quality Metric, KPI…)• Quality Management System• Customer satisfaction monitoring

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MCAL Safety ManagementSafety Management:

We follow the ISO26262 part that address SW development. In line with implicit safety for MCAL part 10

Safety Element out of Context (SEooC.)

ISO26262_SW_SEooC_SMCAL4.2_i.MX8_Safety_Case

Define the tailoring of ISO 26262 Work Products for a SW SEooC product development in

conjunction with the safety plan, as well as progressively compile the deliverables generated during

the safety lifecycle which form the safety case

ISO26262 (S)MCAL Development Sign-Off

Technical safety concept

Safety analyses: ASIL- and safety- oriented analysis

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Complex Drivers/Services

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AUTOSAR MCALs for i.MX 8Series

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i.MX 8 AUTOSAR MCALs Product• Autosar 4.2/4.3 MCAL: Tested running from RAM using NXP MEK/EVB• FlexRay, and WDG-External can be provided as a additional drivers Services• Core Test, Flash Test, or RAM Tests can be provided as a additional drivers Services• All components configurable in any AUTOSAR-compliant configuration tool• Configuration Tool EB tresos StudioTM and plugins are part of the product• MCALs also been deployed using Vector DaVinci Configuration Tool

ETH

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i.MX8 AUTOSAR MCAL Roadmap

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Licensing Options

License Description Support Upgrade options

Project License One NXP Target Part only for one Customer Target Project. One OS.

1 year support included, 20% of the license price year 2 and beyond.

To any higher priced production license. Additional OS/SoC at a discount.

Product Line License One NXP Target Part only for one Customer Product Line (ex. Cluster), One OS


To any higher priced production license. Additional OS/SoC at a discount.

Family Multi-Project LicenseOne NXP Target Part Family, (ex. i.MX6 Family,), only for Customer Target Project or Customer Product Line, no restrictions. One OS


Additional OS/SoC at a discount.

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AUTOSAR Software i.MX 8 Product Selection Matrix Worksheet

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i.MX 8 MCAL Startup Example

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i.MX 8 Secure Boot Flow

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Background – System Controller Firmware (SCFW)

SCFW

Linux

SCFW Library

AUTOSAR MCAL

SCFW Library

The System Controller Firmware (SCFW) runs on the System Controller Unit and is responsible for managing requests from other cores in the system.

MCAL software components communicate with System Controller Unit (SCU) via an Application Programming Interface (API) library.

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• The SCU Boot ROM loads an initial region from the selected boot media.

• This region contains all the information the device needs to continue the boot process.

Initial Loading Region Layout

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MCAL BSW Configuration Tool

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Basic Software Configuration Process.h

.c

.h.c

.h.c

.h.c

ECU Configuration Description

(XML)

MCAL Generators

Communication Services

Generator

OS Generator

RTE Generator

AUTOSAR BSWConfiguration Tool

AUTOSAR SystemDesign Tool

ECU Parameter Definitions

(XML)


(XML)


(XML)

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AUTOSAR BSW Configuration Tool

Example: Tresos® ECU

• Graphical representation of ECU configuration description (ECD)

• Import/export of ECD

• Easy configuration of AUTOSAR BSW using pre-compile methodology

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i.MX 8 MCAL Microcontroller Drivers

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i.MX MCALs— Microcontroller Abstaction Layer• Microcontroller Drivers−Drivers for internal peripherals (e.g.

Watchdog, General Purpose Timer)−Functions with direct µC access

MPU

ADC

CC

U

PWM

LIN or

SCI

CAN

SPI

EEPRO

M

FLASH

WD

T

GPT

Microcontroller Drivers

Watchdog D

river

MC

U D

river

Core Test

GPT D

river

MC

U

Power &

Clock U

nit

DIO

OC

U

Source:


Com

plex

Driv

ers

Microcontroller (µC)

Memory Drivers

Memory HW Abstr.

RTE

Onboard Dev. Abstr.

Memory ServicesSystem Services


Communi-cation

Services

COM HW Abstr.

I/ODrivers

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

Crypto

ETH

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MCU Module – NXP Implementation

MCU implementation:Mcu_Init (...)

Mcu_InitRamSection (...)Mcu_InitClock (...)

Mcu_GetResetReason(...)Mcu_DistributePllClock (...)

Mcu_GetPllStatus (...) (Mcu_GetResetRawValue (...)

Mcu_PerformReset (...)Mcu_SetMode (...)

Mcu_GetVersionInfo (...)Mcu_GetRamState (...)

IMX8

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Watchdog Module – NXP ImplementationWatchdog implementation:

Wdg_Init (...)Wdg_SetMode (...)

Wdg_SetTriggerCondition(...)Wdg_GetVersionInfo (...)

IMX8

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GPT Module – NXP Implementation

GPT implementation:Gpt_Init(...)

Gpt_StartTimer (...)Gpt_SetMode (...)

Gpt_GetTimeElapsed (...)Gpt_GetTimeRemaining (...)

Gpt_GetVersionInfo (...)Gpt_DeInit (...)

Gpt_StartTimer (...)Gpt_StopTimer (...)

Gpt_EnableNotification (...)Gpt_DisableNotification (...)Gpt_DisableWakeup (...)Gpt_EnableWakeup (...)Gpt_CheckWakeup (...)

GPT, FTM, TPM peripherals(FTM does not support wakeup feature)

(TPM peripheral belongs to M4 core)

IMX8

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i.MX 8 MCAL I/O Drivers

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AUTOSAR – Microcontroller Abstaction Layer

• I/O Drivers−Drivers for analog and digital I/O

(e.g. ADC, PWM, DIO)

I/O Drivers

ADC

Driver

DIO

Driver

OC

U D

river

PWM

Driver

ICU

Driver

POR

T Driver

Source:

I/ODrivers


Com

plex

Driv

ers


Memory Drivers

Memory HW Abstr.

RTE

Onboard Dev. Abstr.



Communi-cation

Services

COM HW Abstr.

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

MPU

ADC

CC

U

PWM

LIN or

SCI

CAN

SPI

EEPRO

M

FLASH

WD

T

GPT

MC

U

Power &

Clock U

nit

DIO

OC

U

Crypto

ETH

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ADC Modules – NXP Implementation

Adc Access:Adc_Init(...)

Adc_DeInit(...)Adc_StartGroupConversion(...)Adc_StopGroupConversion(...)

Adc_ReadGroup (...)Adc_DisableHardwareTrigger (...)Adc_EnableHardwareTrigger (...)Adc_EnableGroupNotification(...)Adc_DisableGroupNotification(...)

Adc_StopGroupConversion(...)Adc_GetGroupStatus(...)

Adc_GetStreamLastPointer (...)Adc_GetStreamLastPointer (...)

Adc_GetVersionInfo(...)Adc_SetPowerState (...)

Adc_GetCurrentPowerState (...)Adc_GetTargetPowerState (...)Adc_PreparePowerState (...)

IMX8

APIs in white are for ASR4.0, ASR4.2 and ASR4.3APIs in yellow are new APIs in ASR4.2 and ASR4.3

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PORT/DIO Modules – NXP Implementation

Port Access:Port_Init(...)

Port_SetPinDirection(...)Port_RefreshPinDirection(...)

Port_SetPinMode(...)

Dio Read Accesses:Dio_ReadChannel

Dio_ReadPortDio_ReadChannelGroup

Dio Write Accesses:Dio_WriteChannel

Dio_WritePortDio_WriteChannelGroup

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PWM Module – NXP Implementation

PWM implementation:Pwm_Init (...)

Pwm_SetDutyCycle (...)Pwm_SetPeriodAndDuty (...)

Pwm_SetOutputToIdle(...)Pwm_DeInit (...)

Pwm_GetOutputState (...)Pwm_DisableNotification (...)Pwm_EnableNotification (...)

Pwm_GetVersionInfo (...)Pwm_SetPowerState (…)

Pwm_GetCurrentPowerState (…)Pwm_GetTargetPowerState (…)Pwm_PreparePowerState (…)Pwm_PreparePowerState (…)

PWM, FTM, TPM peripheral(TPM peripheral belongs to

M4 core)

IMX8

APIs in white are for ASR4.0, ASR4.2 and ASR4.3APIs in yellow are new APIs in ASR4.2 and ASR4.3

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ICU Module – NXP Implementation

ICU implementation:Icu_Init(...)Icu_DeInit(...)Icu_SetMode(...)Icu_DisableWakeup (...)Icu_EnableWakeup (...)Icu_SetActivationConditionIcu_DisableNotification (...)Icu_EnableNotification (...)Icu_GetInputState (...)Icu_StartTimestamp (...)Icu_StopTimestamp (...)Icu_GetTimestampIndex (...)Icu_ResetEdgeCount (...)Icu_EnableEdgeCount (...)Icu_DisableEdgeCount (...)Icu_GetEdgeNumbers(...)Icu_StartSignalMeasurement (...)Icu_StopSignalMeasurement (...)Icu_GetTimeElapsed (...)Icu_GetDutyCycleValues (...)Icu_GetVersionInfo (...)

GPT, TPM and FTM peripheral(TPM peripheral belongs to M4 core)

IMX8

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OCU Module – NXP Implementation

OCU implementation:Ocu_Init(...)Ocu_DeInit(...)Ocu_StartChannel(...)Ocu_StopChannel(...)Ocu_SetPinState(...)Ocu_SetPinAction(…)Ocu_GetCounter(...)Ocu_SetAbsoluteThreshold(...)Ocu_SetRelativeThreshold(...)Ocu_DisableNotification(...)Ocu_EnableNotification(...)Ocu_GetVersionInfo(...)

GPT, TPM and FTM peripheral(TPM peripheral belongs to M4 core)

IMX8

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i.MX 8 MCAL Communication Drivers

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AUTOSAR – Microcontroller Abstaction LayerCommunication Drivers• Drivers for ECU onboard

(e.g. SPI) and vehicle communication (e.g. CAN)

• OSI Layer: Part of Data Link Layer

Communication Drivers

CAN

Driver

LIN D

river

FlexRay D

river

SPI Handler D

river

Ethernet Driver

Source:

MPU

ADC

CC

U

PWM

LIN or

SCI

CAN

SPI

EEPRO

M

FLASH

WD

T

GPT

MC

U

Power &

Clock U

nit

DIO

OC

U

Crypto


I/ODrivers


Com

plex

Driv

ers


Memory Drivers

Memory HW Abstr.

RTE

Onboard Dev. Abstr.


Communi-cation

Services

COM HW Abstr.

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

ETH

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Ethernet Module – NXP Implementation

Ethernet implementation:Eth_Init (...)

Eth_ControllerInit (...)Eth_SetControllerMode (...)

Eth_GetControllerMode (...)Eth_GetPhysAddr (...)

Eth_WriteMii (...)Eth_ReadMii (...)

Eth_GetCounterState (...)Eth_ProvideTxBuffer (...)

Eth_Transmit (...)Eth_Receive (...)

Eth_TxConfirmation (...)Eth_GetVersionInfo (...)Eth_SetPhysAddr (…)

Eth_UpdatePhysAddrFilter (…)Eth_GetDropCount (…)Eth_GetEtherStats (…)

Eth_GetCurrentTime (…)Eth_EnableEgressTimeStamp (…)

Eth_GetEgressTimeStamp (…)Eth_GetIngressTimeStamp (…)

Eth_SetCorrectionTime (…)Eth_SetGlobalTime (…)

APIs in white are for ASR4.0, ASR4.2, and ASR4.3APIs in yellow are new APIs in ASR4.2 and ASR4.3 APIs are in red are removed from ASR4.2 and ASR4.3

Eth_GetDropCount (…)Eth_GetEtherStats (…)

Eth_SetCorrectionTime (…)Eth_SetGlobalTime (…)

Eth_GetCounterValues (…)Eth_GetRxStats (…)Eth_GetTxStats (…)

Eth_GetTxErrorCounterValues (…)

As comparing with ASR4.2APIs in red are removed from ASR4.2APIs in yellow are new APIs in ASR4.3

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CAN Module – NXP Implementation

CAN implementation:Can_Init (...)

Can_ChangeBaudrate (...)Can_SetControllerMode (...)

Can_EnableControllerInterrupts (...)Can_CheckWakeup (...)

Can_GetVersionInfo (...)Can_CheckBaudrate (...)

Can_DisableControllerInterrupts (...)Can_Write (...)

Can_MainFunction_Write (...)Can_MainFunction_Read (...)

Can_MainFunction_BusOff (...)Can_MainFunction_Wakeup (...)

Can_MainFunction_Mode (...)Can_SetBaudRate (...)

Can_GetControllerErrorState (…)Can_GetControllerMode (…)

Can_DeInit (…)

APIs in white are for ASR4.0, ASR4.2, and ASR4.3APIs in yellow are new APIs in ASR4.3APIs are in red are removed from ASR4.3

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LIN Module – NXP Implementation

LIN implementation:Lin_Init (...)

Lin_CheckWakeup (...)Lin_GetVersionInfo (...)

Lin_SendFrame (...)Lin_GoToSleep (...)

Lin_GoToSleepInternal (...)Lin_Wakeup (...) Lin_WakeUpInternal (...)

Lin_GetStatus (...)

LPUART(LPUART is shared with UART driver)

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SPI Module – NXP Implementation

SPI implementation:Spi_Init(...)

Spi_DeInit (...) Spi_ReadIB (...)Spi_WriteIB (...)

Spi_AsyncTransmit(...)Spi_SetupEB(...)

Spi_GetStatus (...) Spi_GetJobResult (...)

Spi_GetSequenceResult (...)Spi_GetVersionInfo (...)Spi_SyncTransmit (...)

Spi_GetHWUnitStatus (...) Spi_Cancel (...)

Spi_SetAsyncMode (...)

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i.MX 8 MCAL Memory Drivers

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AUTOSAR — Microcontroller Abstaction Layer• Memory Drivers−The Memory Hardware

Abstraction is a group of modules which abstracts from the location of peripheral memory devices (on-chip or on-board) and the ECU hardware layout

−The Memory Drivers are accessed via memory specific abstraction/emulation modules (e.g. EEPROM Abstraction)

Memory Drivers

RAM

Test

internal EEPRO

M D

river

internal Flash Driver

Flash Test

Memory Hardware AbstractionFLASH EEPROM

Emulation

MPU

ADC

CC

U

PWM

LIN or

SCI

CAN

SPI

EEPRO

M

FLASH

WD

T

GPT

MC

U

Power &

Clock U

nit

DIO

OC

U

Crypto

Source:

Memory Drivers

Memory HW Abstr.


I/ODrivers


Com

plex

Driv

ers


RTE

Onboard Dev. Abstr.


Communi-cation

Services

COM HW Abstr.

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

ETH

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Flash Module – NXP Implementation Per External Memory

Flash implementation:Fls_Init(...)

Fls_Erase (...) Fls_Write (...) Fls_Cancel (...) Fls_GetStatus (...)

Fls_GetJobResult (...)Fls_Read (...)

Fls_Compare (...) Fls_SetMode (...)

Fls_GetVersionInfo (...)Fls_MainFunction (...)

FlexSpi for IMX8QM/QXP

i.MX8

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FEE Module – NXP Implementation Per Flash Memory

FEE implementation:Fee_Init (...)

Fee_SetMode (...)Fee_Read (...)Fee_Write (...)

Fee_Cancel (...)Fee_GetStatus (...)

Fee_GetJobResult (...)Fee_InvalidateBlock (...)Fee_GetVersionInfo (...)

Fee_EraseImmediateBlock (...)

FEE is located in the “Memory Hardware Abstraction” layer which falls under the ECU Abstraction Layer

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i.MX 8 MCAL Crypto Drivers

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AUTOSAR — Microcontroller Abstaction LayerCRYDRV• Crypto driver communicates SHE/HSM

through SECO firmware by using message unit

MPU

ADC

CC

U

PWM

LIN or

SCI

CAN

SPI

SHE/H

SM

WD

T

GPT

MC

U

Power &

Clock U

nit

Crypto Drivers

Crypto D

river

DIO

OC

U

Source:

Com

plex

Driv

ers



Memory Drivers

Memory HW Abstr.

RTE

Onboard Dev. Abstr.



Communi-cation

Services

COM HW Abstr.

I/ODrivers

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

ETH

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i.MX 8 MCAL Complex Drivers

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AUTOSAR — Complex Device DriversA Complex Driver is a module which implements non-standardized functionality within the basic software stack.

Examples:

• Core and RAM/Flash Self Tests Library• CRC Driver• EMMC• ESAI (I2S)• Fault Monitoring Drivers• I2C• MicroController Library (MCL) – eDMA management/ Cache management• RPMSG• SDIO• UART• USB

Properties:• Implementation: highly µC, ECU and application dependent• Upper Interface to SW-Cs: specified and implemented

according to AUTOSAR (AUTOSAR interface)• Lower interface: restricted access to Standardized Interfaces

Complex Drivers

Electric Valve Control

Injection Control

Incremental Position D

etection

Com

plex Driver XY

µC

e.g. CC

U

e.g. PCP

e.g. TPU Source:

Example:



Memory Drivers

Memory HW Abstr.

RTE

Onboard Dev. Abstr.



Communi-cation

Services

COM HW Abstr.

I/ODrivers

I/O HW Abstraction

Application Layer

Crypto Drivers

Crypto Services

Crypto HW Abstr.

Com

plex

Driv

ers

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Professional Engineering Services Technical Competency

Customer Skill Set

Service Skill Set & Knowledge Value

Prim

ary

Focu

s Ar

ea

OS Kernel

NXP BSP

Drivers

UI & ApplicationsMiddleware

i.MX LPCKinetis

Customer

Eng.Services

Platform Provider, with Reach to the Middleware and Graphics Layers

NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2019 NXP B.V.

AUTOSAR MCAL for i.MX 8 Application Processors

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