Automotive MCU Overview - 2012 Ap

TM

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-

Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC, Processor

Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale

Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis,

Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play,

SafeAssure, the SafeAssure logo, SMARTMOS, Tower, TurboLink, Vybrid and Xtrinsic are

trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of

their respective owners. © 2013 Freescale Semiconductor, Inc.

April 2013

2 TM

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC,

Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet,

Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, Tower, TurboLink, Vybrid and

Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2013 Freescale Semiconductor, Inc.

2011 Market Share

Global MCUs1

2011 Market Share

Global Auto MCUs1

9% 21%

Sources:

1. IHS iSuppli, May 2012

Freescale Shipped 360M auto MCUs (> 4/car) in ’11

We are in Approx 55 million new vehicles / year

3 TM





Ele

ctr

on

ic c

os

t a

s %

of

tota

l c

ar

co

st

1950 1960 1970 1980 1990 2000 2005 2010

E.g.

1950 1960 1970 1980 1990 2000 2005 2025?

35%

30%

22%

15%

10%

5% 2.5%

Electronic

Fuel Injection

Airbag

ABS / ESP

Body Electronics

Multiplexing

Advanced Driver Assistance

Active-Passive Safety

Green Powertrain

Radar / Vision

Telematics

Infotainment

“80% percent of innovation is

electronic”

“Impossible to comply with regulation

without electronic systems”

-Automotive OEM

50%

?

E.g

. A

udi A

8: 1

00

EC

Us,

270

MB

of S

/W

TM









5 TM





• Steering column lock

• Steering column

adjustment

• Seat positioning

• Wipers and rain sensors

• Lighting and light sensors

• Convertible top

• Anti-pitch power windows

Safety Related Comfort Features

• Door Module

• Window Lift

• Seat Module

• HVAC

• Electric sunroof/shade

• Interior lighting

Vehicle Networking

• Central Body Control

Module

• Central Gateways: CAN,

LIN, Flexray, Ethernet,

MOST

Security

• Immobilizer

• Keyless Entry

• Preventing hacking and

counterfeit modules

Inte

gra

ted

BC

M

Ga

tew

ays

BCM

Light /

LED ctrl

CAN Input

• Switches

• etc.

W/D &

Safety

MCU

SBC

Input

Monitor

RF

Rx

Output

Driver Output

• Interior lighting

• etc.

Gateway

Front

Light

Front

Light

Rear

Light

Rear

Light

Light /

LED ctrl

Light /

LED ctrl

Light /

LED ctrl

LIN

MCU

32bit

176 pin

(208/256)

Door

SLP

ripple cnt

Door

SLP

ripple cnt

AFS

AFS

• Body systems embrace a broad variety of applications inside the cabin

• Body systems cover the widest range of performance requirements

− Small 8-bit controllers and watchdogs

− General purpose 16-bit controllers

− High performance 32-bit compute engines

http://www.google.com/imgres?imgurl=http://www.hondapartsnow.com/accessory-images/large/honda-keyless-entry-system.jpg&imgrefurl=http://www.hondapartsnow.com/genuine/2003-2005-honda-civic-coupe-keyless-entry-system-4473.html&usg=__VnH-LFxcZOp6gvWRLRZe6pLvk7k=&h=300&w=400&sz=6&hl=en&start=16&zoom=1&tbnid=Ay_r2P3GyCDcEM:&tbnh=93&tbnw=124&ei=v0LWTsq4LcWEsgKQ-N2xDw&prev=/images?q=keyless+entry+pictures&hl=en&sa=X&gbv=2&tbm=isch&itbs=1

6 TM





Connected

Cost Efficient

Green

Safe and

Secure

• More complex Gateways with higher performance and

multicore usage (Expanding memory )

• Ethernet and wireless communication

• Personalization options driving LIN nodes

• Functional Safety - ISO26262

Several body-apps need ASIL A/B (some C/D)

• Reduced ASIL-assessment effort

• Security/Cryptography for Gateway and BCM modules

• Power management in stop and run modes

• AUTOSAR SW management of partial/pretended

networking

• EC-motors, LED-lighting

• Cost reduction via ECU integration

• Electrification of the car replacing mech. components

• Scalability of hardware and software

• Auto generated code to decrease dev costs

Software

Integration:

• Autosar:

• Multicore-support

• OS

• MCAL

• Safety:

• SW-routines

supporting self-test

(Core/Memory)

• Security:

• Cryptography

algorithmic support

• Application-support

• Motor Control-library

• Reference designs

http://www.google.com/imgres?imgurl=http://embraceyourgifts.typepad.com/blog/images/2008/01/25/money2_2.jpg&imgrefurl=http://embraceyourgifts.typepad.com/blog/2008/01/post-1.html&h=357&w=450&sz=38&tbnid=WesmKehf4Z13AM:&tbnh=101&tbnw=127&prev=/images?q=picture+of+money&zoom=1&q=picture+of+money&hl=en&usg=__MdVgTvRE3H9IBwGPiIsVts0YIqY=&sa=X&ei=TjilTOD1G4KB8gb4j8n6AQ&ved=0CCkQ9QEwBg

7 TM





Today Future

Distributed Electronic Control Units

One ECU per mechanical function- Connected by

multiple CAN and LIN interfaces Distributed Computing

Major computing nodes on a high performance network

organized by “domains” which control “zones”

ECU

ECU

ECU ECU

Torque

Management

Driver Interface

(HMI)

Vehicle

Dynamics &

Safety

Body, Security

Lighting

Engine

Transmission

Electric

Motor

Generator

Seats Mirrors Doors Lighting

Navigation Instruments

Multimedia/

Telematics

Entertainment

Driver

Controls

Steering

Dampers ADAS

(Radar,Camera)

Airbags Tensioners

Ped. Protection

Brakes Dynamics

Sensors

• Up to 80 individual ECUs

• Local and proprietary network structures

• Increasing software complexity

• Increasing cabling weight

• Increasing ... everything

• Increasing data traffic

• Ethernet as the backbone

• Central Gateway will have an Ethernet Switch

• Lower power: Partial/pretended networking

• AUTOSAR 4.0

8 TM





S08 8-bit Microcontroller

Families

S12 16-bit Microcontroller

Families

S12 MagniV 16-bit with Analog

ASSP/MCUs

Qorivva 32-bit Single-Core Microcontr.

Families

Qorivva 32-bit Dual-Core Microcontr.

Families

System Basis Chip (SBC), Network Interconnect

High Side Switches (eXtreme Switch), H-Bridges, Switch Monitoring

Door, Window, Seat, HVAC, Other Body

BCM and Gateway

Motor Control,

Lighting, etc.

9 TM





Product Lines

Past 2012 2013 2014

2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q

First

Sample

Date (left edge)

Production

Proposal

130nm

90nm

55nm

Planning

Execution

250nm

180nm

Product

Qualification

(right edge)

MPC570xB

(Bolero Next)

S12G(A)

S08D

Qorivva

32-bit Power

Architecture

S12 MagniV

Integrated HV

Analog + MCU

S12

16bit CISC

S08

8bit CISC S08E

S08SG

S08SC

S08QD

S12XE

S12XS

S12P

MPC551xS/E/G

MPC5668G/E (Fado)

MPC56xxB/C

(Bolero)

S08RN (with TSI)

S12VR (Tomar)

S12ZVM

(Carcassonne)

Qualified S12ZVL (Knox)

Sampling

Sampling

S12ZVFP

S08RNA

MPC57xxC

(Calypso)

S12ZVB (Toledo)

S12ZVC (Hearst)

TM 10 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PEG, PowerQUICC,




• S08RN Family of MCUs integrates key features

like EEPROM, TSI (touch sensing interface) and motor control FlexTimer to further reduce system costs.

• Suitable for any kind of Sensor-, Actuator- or User interface-module in an automotive LIN-Network

• Fully AEC-Q100 qualified

suitable for any automotive application

with ambient temperatures up to 125°C

• The new scalable and pin-compatible

S08RN families reuses existing core, IP

and tools for easy migration from existing

8-bit S08 products.

New

11 TM





LG32

LG16 EL16

SL16

SC4

SG8

SG4 4K

RN(A)32

RN(A)16

RNA4

First

Sample

Date (left edge)

Production

Proposal

Planning

Execution

250 nm

180 nm

Product

Qualification

(right edge)

MP16

QD4

Past

2012 2013

2Q 1Q 2Q 3Q 4Q 1Q

SG32

SG16

SL8 EL8

DZ16

DZ32

DZ48

DZ60

DZ96

DZ128

DV16

DV32

DV48

DV60

DV96

DV128

DN16

DN32

DN48

DN60

AW16

AW32

AW48

AW60

EL32

8K

16K

RN(A)8

RN(A)60

RN(A)48

32K

48K

60K

96K

128K

Hi temp

EEPROM

C CAN

C

C

C

C

C

C

C

C

C

C

C

C

Flash Size

3Q 4Q

12 TM





• Key Features & Benefits: − Optional operation on low-power 32kHz Oscillator

reduces power consumption Typ. Ridd [20MHz] / Stop idd: 5mA / 1uA

− 6x16-bit FlexTimer PWM and analog comparator for power-conversion (DC/DC-converter, lighting, motor control, …)

− 16 channel Touch-Sense Interface (TSI) for implementing buttons, sliders rotary (Centerstack / Domelight / RKE...)

− LIN-UART & 12-bit ADC for Lin-based sensor- or I/O nodes

− 20mA sink on up to 8 pin reduces cost for external components

− Low-cost non intrusive singlewire debugging via BDM

− Low current Startup (500uA) on RN16/8 and RNA4/2

LIN/SCI

Up to 3

SPI

Up to 2

IIC

Up to 1

FlexTimer

Up to 6+2+2ch 16b

2ch 8b Mod.-timer

DBG

Flash

S08 CPU

20MHz Bus

WD+RTC

Analog

Comparator

6-Bit DAC

(internal)

12-16ch TSI

(not on RNA)

EEPROM

4 byte Block

(ECC)

RAM

GPIO

Up to 55

12Bit ADC

Up to 16ch

Interrupt

CRC

60kB

48kB

32kB

16kB

8kB

4kB

2kB

4kB

2kB

512B

256B

128B

Features S08RN60/48/32 S08RN16/8 S08RNA16/8 S08RNA4/2 Flash (KB) 60/48/32 16/8 16/8 4/2

RAM (KB) 4 2 2 0.5

EEPROM (Byte) 256 256 256 128

LIN/UART 3 2 2 1

SPI 2 1 1 -

IIC 1 1 1 -

TSI (cap. Touchsensing) 16ch 12ch - -

ADC channel (12-bit) 16ch 12ch 12ch 8ch

Comparator 1 1 1 1

Flex-Timer (16-bit) 6ch + 2ch + 2ch 6ch + 2ch 6ch + 2ch 2ch + 2ch

Mod. Timer (8-bit) 2ch 1ch 1ch -

Pincount 64, 48, 32 48, 32, 20, 16 48, 32, 20, 16 20, 16, 8

13 TM





Touch Sense Interface

Runs with minimal CPU intervention: interrupt

in the case of a capacitance variation

Low Power Operation (~1-3uA) allows wake-

up capability from stop-modes

No need for external components

Detect electrode fault

(too small or too big capacitance)

Compensate temperature and

Supply voltage variations

Touch Sense Software Library

Full API

Configurable Rotary, Slider, Keypad decoders

Flexible combination of any electrode array on the

same application

Configurable smart auto-calibration mechanisms

for environment hassles

Auto repeat, stuck-up key, gorilla hand and other

typical HMI functions

Noise rejection algorithms

+

System

Configuration

and

Management

System Setup

Decoders

Key Detector

Touch Sensing Module (TSI)

Application

Keypad Rotary Slider TSS Library

TSI Module

14 TM





S08RN TPS

VRS

Conditioning

ETEMP

Analog Input

Conditioning

VRS

Ignition Driver

IGNCOIL

Ignition Driver

IGNCOIL

POS_PULSE

NEG_PULSE

DC-DC

Converter PWM

50kHz to 200kHz

CHOKE

SOLENOID Solenoid

Driver

PULSE

F/B

• POS_PULSE – Configured as Input Capture requiring a 16-bit

Timer.

• NEG_PULSE – Configured as Interrupt.

• IGT_1, IGT_2 – Configured as Output Compares requiring a

16-bit Timer.

• PWM Output – Switching Frequency Range 50kHz to 200kHz.

IGT_1

IGT_2

• PULSE Output – Timer to Control the Pulse of Choke

Solenoid

• F/B – Configured as Interrupt

• TPS – Throttle Position Sensor, ADC resolution 10/12 bit ??.

• ETEMP – Engine Temperature Sensor, ADC resolution 10/12

bit ??.

15 TM





Key with

transponder

CDI / EMS

Network

Interface

Network

Interface

125kHz RF

Tag reader

MCU

V-reg

BAT Immobilizer ECU

BAT OFF

BAT ON

Enable / Disable

Ignition

Manchester Encoded Data

16 TM





TM









18 TM





Flash

Size

16K

32K

128K

256K

512K

1M

64K

S12P128,96 32MHz

48,64,80 pin

S12G(A)240 EEPROM

25MHz

48,.64.100pin

S12XE100,768 XGATE, MPU, EE

Up to 50MHz

112,144,208pin

Production Proposal Planning Execution

First Sample Date (left edge)

Product Qualification (right edge)

High temp

(Grade 0)

2012 2013

S12G64 EEPROM

25MHz

48LQFP

No X-Gate

X-Gate Coprocessor

Past

C CAN

A DAC

S12P64 32MHz

48,64,80 pin

S12P32 32MHz

48,64,80 pin

S12XS64 up to 40MHz

64, 80, 112pin

S12XE512,384 XGATE, MPU, EE

Up to 50MHz

80,112,144pin

S12XE256 XGATE, MPU, EE

Up to 50MHz

80,112,144pin

S12XE128 XGATE, MPU, EE

Up to 50MHz

80,112pin

S12XS128 up to 40MHz

64, 80, 112pin

S12G(A)128 EEPROM

25MHz

48,64,100pin

S12G(N)A48,64 EEPROM

25MHz

32,48,64pin

S12XS256 up to 40MHz

64, 80, 112pin

S12GN(A)32 EEPROM

25MHz

20, 32. 48pin

S12GN(A)16 EEPROM

25MHz

20, 32, 48pin

S12GN32 EEPROM

25MHz

48LQFP

L

L

C L

C L

C L

C L

C L

C L

C L

C L

C L

L LIN

A

C L

C L

2Q 3Q 4Q 1Q

C L

C L

C L

C L

2Q 3Q 4Q 1Q

19 TM





• One scalable family for all low-end body applications • 16-bit performance and convenience • True EEPROM onboard • Multiple SCI and SPI modules • Wide operating range Vdd = 3,13 .. 5,5V • 25MHz Bus speed

Device Flash RAM EEPROM Freq MSCAN SCI SPI ATD PWM Tim DAC ACMP Packages

S12GA240 240K 11K 4K 25MHz 1 3 3 16c12b 8c8b 8c16b 2c8b 0 48/64/100 LQFP

S12G240 240K 11K 4K 25MHz 1 3 3 16c10b 8c8b 8c16b 0 0 48/64/100 LQFP

S12GA192 192K 11K 4K 25MHz 1 3 3 16c12b 8c8b 8c16b 2c8b 0 48/64/100 LQFP



S12GA128 128K 8K 4K 25MHz 1 3 3 12c12b 8c8b 8c16b 0 0 48/64/100 LQFP





S12G48 48K 4K 1.5K 25MHz 1 2 2 12c10b 6c8b 6c16b 0 1 32/48/64 LQFP

S12GA48 48K 4K 1.5K 25MHz 1 2 2 12c12b 6c8b 6c16b 0 1 32/48/64 LQFP

S12GN48 48K 4K 1.5K 25MHz 0 2 2 12c10b 6c8b 6c16b 0 1 32/48/64 LQFP

S12GN32 32K 2K 1K 25MHz 0 1 1 8c12b 6c8b 6c16b 0 1 20TSSOP 32/48LQFP/48QFN

S12GNA32 32K 2K 1K 25MHz 0 1 1 8c10b 6c8b 6c16b 0 1 48LQFP

S12GN16 16K 1K 512B 25MHz 0 1 1 8c12b 6c8b 6c16b 0 1 20TSSOP 32/48LQFP/48QFN

S12GNA16 16K 1K 512B 25MHz 0 1 1 8c10b 6c8b 6c16b 0 1 48LQFP

1-3 LIN/SCI

1-3 SPI

GPIO

0-1 MSCAN

ATD 8-16ch 10 Bit

(12Bit on S12GA)

Timer 16b 6-8ch

32-100 LQFP

20TSSOP, 48QFN

PWM 6-8ch 8Bit

(or 3-4ch 16-Bit)

0,5-4 KB EEPROM

DBG INT

16-240KB Flash

1-11KB RAM

S12CPU 25MHz

Fa

mil

y M

em

be

r D

iffe

ren

ce

s

Note: Not all peripherals are available in all package types.

0-1 ACMP

DAC on S12GA

20 TM





2H Topology Power Stage

4mOhm

4mOhm

4-poles/2ph BLDC Motor

COP

1 LIN/SCI

1 SPI

48 LQFP

ATD

10b 16ch

Timer

16b 8ch

GPIO

1KB EEPROM

DBG INT

32KB Flash

2KB RAM

S12CPU

VBAT

New feature implemented on

GN32

S12GN32

Vreg 5V

API

A_IP_ACMP_1C_5V_TSMC18LL Features

supply voltage 3.13V - 5.5V

Analog input voltage range 0 to VDDA-1.5V*

Input offset max=40mV

output delay time max=0.6us (analog only)

Init delay max=1us

Input leakage max=1uA

Comp hysteresis min=3mv,typ=6mV,max=20mV

Stop mode CMP is off

Input Low Pass filter Yes, typ=10MHz cut-off

ACMP features:

ACMP MUX

21 TM





LIN P/L LIN P/L

• High beam left

• High beam right

• Rear break left

• Rear break right

• Interior 1 and 2

• Front side marker right

• Front side market left

• Low beam right

• Low beam left

• Center mount break lamp

• Fog lamp left

• Fog lamp right

• Rear, turn and hazard left

• Rear, turn and hazard right

Output blocks Processing block Input / Output blocks

Vreg

CAN P/L

Watchdog

CAN

Wakeup

S12G

SPI

SPI

Communication

+ power supply

LIN P/L

LIN

Switch inputs

Analog inputs

High side

drivers

Low side

drivers

High side

drivers

High side

drivers

High side

drivers

Power

distribution

relays.

22 TM





LH1

LH2

RH1

RH2

GND GND

LH Switch Unit RH Switch Unit Central BCM Unit

Switches in LH

1. Horn

2. Left Blinker

3. Right Blinker

4. Pass

5 .High Beam

Switches in RH

1. Starter Relay

2. Park Lamp

3. Low beam

4. Engine Kill

Outputs from BCM

1. Park Lamps

2. Low Beam

3. High Beam

4. Left Flasher

5. Right Flasher

6. Horn

7. Engine Kill

8. Starter Relay

Neutral

Switch Clutch

Switch RPM

Inputs from vehicle

Analog voltage

depending on

switch status

Analog voltage

depending on

switch status

Advantages:

1. Reduces losses due to elimination of

high current mechanical switches

2. Additional protection and diagnostics

for loads.

3. Reduces required number of high

current wires going into switch bar

units.

4. Reduces length of heavy gauge wires.

5. Eliminates Flasher Relay, Diode logic

in wiring harness required for Neutral

gear indication.

24 TM





TM









26 TM





Digital Logic S12, PWMs, Timers,

SRAM, SPI, SCI, GPIO,

Watchdogs, etc.

High-Voltage

Analog Low Side & High

Side Drivers,

Voltage Regulator

LIN/CAN Phy. etc.

Non-Volatile

Memory Flash, EEPROM

Existing

Low Leakage 180nm CMOS+NVM 40V UHV Devices

27 TM





With LIN-PHY

With CAN-PHY

Production Proposal Planning Execution

First Sample Date (left edge)

Product Qualification (right edge)

Motor Control

S12VRxx (Tomar) 2 LS for relay based DC

motor control

High temp

(Grade 0)

“Troy” Stepper motor

control

“Toledo” 4ch-MOSFET pre-

Driver for H-Bridge-driven

DC-motors

Instrument

Cluster

S12ZVHxx (Lumen 4W) LCD + Gauge

“Coco” 8# LIN-PHY Companion

Controller

LED Lighting

CAN enabled

LIN enabled S12ZVLxx (Knox)

Genera

l

Pu

rpo

se

2012 2013 2014 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q

2015 1Q

No comms (PWM-control)

“Lichtenstein” 4-5ch LED-drive (DC/DC)

S12ZVCxx (Hearst)

S12ZVML/Cxx (Carcassonne) 6ch-MOSFET pre-

driver for BLDC/PMSM motor control

S12ZVMxx (Obidos) No PHY (PWM-control) +

6ch-MOSFET pre-driver

AS

SP

s

S12ZVFP (Lumen HVAC) LCD

S12ZVH (Lumen 2W) LCD + Gauge

Multi-PHY

companion chip

“Teck” - RGB-LED

Ambient Lighting

28 TM





VSSX2

LGND

LIN

LS0

S12

core

VS

SA

Win Wdog

TE

ST

VREG

6ch. 10-bit

ADC

+ 8 int. Ch. SCI 0

Temp

Sense

VD

DX

2

HS1

HS0

VSUPHS

VSUP

4 HV

Inputs

LIN

Physical

Interface

Vbat

sense

PAD4

PS

1

2 HS Drivers

LSGND

LS1

VSSX1

VDDX1

MODC/BKGD

M

Hall

Sensor

VBAT

48kB / 64kB

Flash

2 kB RAM 512Bytes

EEPROM

VD

DA

PWM0/PS2

PWM1/PS3

PAD5

PL3

PL2

PL1

PL0

VSENSE

PLL RCosc.

+/-1.3%

Pierce

Osc.

SCK/PS4

SS/PS5

PS

0

PT

3

PT

2

PT

1

PT

0/R

XD

0

PA

D0/A

N0

PA

D1/A

N1

PA

D2/A

N2

PA

D3/A

N3

KW

P3/P

P3

KW

P4

VS

S

EX

TA

L/P

E0

XT

AL

/PE

1

PP

2

Vsup

sense

VBAT

LIN

KW

P0

WL Switches

Altern.

SCI Test

Intrface

GND

IRQ

RE

SE

T

VDDA

VDDX1

VDDX1

4ch 16-

bit TIM

PWM

2ch 8-bit

2 Low Side

Drivers

SCI 1

BDM

SPI

Key

Wakeups

Hall

Supp

To Hall

Supply

EVDD

XIR

Q

29 TM





VREG (8pin)

CAN or

LIN phy (8pin)

MCU

or

DSC (48pin)

Gate

Driver (48pin)

Op-amps Full

Dis

cre

te

MCU

or

DSC (48pin)

ASIC (GDU+

VREG+

LIN+

Op-amps)

(64pin)

Sem

i In

tegra

ted

24+

20+

2+

2+

4 to 6 cm2

PCB space

savings

2 to 3 cm2

PCB space

savings

4cm

~1 ½ in.

30 TM





G

P

I

O

S12Z

core

SPI

Wdog

TIM 4ch/16b

Vregs (5V VDD, VLS, VDD sensor)

PMF

6ch PWM

Temp Sense

SCI

GDU

3 phase

H-Bridge

Predriver

Charge Pump

LIN

Physical

Interface

128 kB

Flash

512Bytes

EEPROM

8 kB

RAM

PLL IRC

Ext Osc BDM

KWU

RTI

SCI

PTU

VBS1

VBS0

HG0

HS0

HS1

HS2

EVDD

VHb

M M

AMR/

GMR/

Hall

Sensor

VBAT

AMRsinAmp

AMRcosAmp

Hallout VBS2

HG1

HG2

VL

S

+11V D

S

HD

CP

VCP XTAL

EXTAL

LIN

LIN

GN

D

IO/ MISO

IO/ MOSI

IO/ SCLK

IO/ SS

IO/IOC1

IO/IOC0

IO/ RXD0

IO/ TXD0

IO/ RXD1

IO/ TXD1

IO/ KWP0

IO/ KWP1

0V

+11V

BS

T

VS

UP

VS

SB

IO/ AN0_1

IO/ AN1_1

IO/ AN0_0

IO/ AN1_0

Hallout

AMRsinAmp

AMRcosAmp

VD

D

BK

GD

VS

S

Reset

VS

S

VS

S

VD

DX

VD

DA

VD

DF

BC

TL

Dual 12-bit

ADC

5+4ch. Ext. (Mux„d with Op-Amps)

+ 8ch. Int.

MSCAN

LG0

LG1

LS0

Shunt1

LG2

LS1

LS2

AM

PM

1

AM

PP

1

AM

P1

Current Sense

(2 x Op-Amp)

AM

PM

0

AM

PP

0

Shunt0

The pinout represents functionality. The physical pins location is not correct, and also does not reflect pin multiplexing

31 TM





Fuel pump (on-

demand)

HVAC Blower

(~600W)

Applications

Reliability since high duty-cycle

Improve power efficiency

Reduce audible noise

Improve efficiency since high currents

(100W ~ 0.1l/100km or 0.5mpg)

Customer Goals

Tough space constraints

Get maximum efficiency and

lowest noise to justify extra

system cost

Challenges

Electric vehicles:

- A/C Compressor

- Water pump

(eng. cooling)

Replace conventional belt

Reliability since high duty-cycle

Power efficiency

Tough space constraints

High temperature

Wipers Drive the 2 blades independently to

remove mechanical connections

Need accurate position control

to avoid collision

BL

DC

D

C

32 TM





• Key Features: − On chip 12V Vreg with Supply-

capability: 70mA total (170mA with ext. Ballast)

− LIN-PHY, LIN2.1 compliant − On chip RC Oscillator; trimmed to +/-

1,3% tolerance over full temperature range

− Robust 12V HVI with ADC (wakeup-capable)

− 1xEVDD (20mA) & 1-3xNGPIO (25mA) strength

− 10-bit ADC − EEPROM 4-Byte-erasable (with ECC)

• Other:

− -40°C .. +125°C Ta − 5x5mm footprint 32QFN-package − ASIL-A compliancy

1 SPI

GPIO

Timer 16b 8ch

PWM 8ch 8-bit

(or 4ch 16-bit)

128B

EEPROM

32KB Flash (ECC)

S12Z 25MHz Bus

1 IIC

BDM/BDC

LIN-PHY 10-bit ADC

V-SUP-

SENSE

VREG for tot. supply: •70mA

•170mA with ext. ballast

Temp

Sense

1kB

RAM

PLL RCosc.

+/-1.3%

Pierce

Osc.

SCI 0

SCI 1

HVI 1#

EVDD

1-3#

NGPIO

S12ZVL TECK S12ZVL S12ZVLS S12ZVLA

Application orientation generic small sensors ambient Lighting

Package 48LQFP 32LQFP 32QFN 32QFN

Flash Memory (ECC) 32/16/8 kB 32/16/8 kB 32/16 kB 32/16 kB

NGPIO (GPIO with 25mA NMOS) 3 1 1 3

HVI 1 1 1 -

2nd SCI y - - -

SPI y y y -

IIC y y y -

10-Bit ADC 8ch 6ch 6ch 6ch

ASIL A A A - High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

33 TM





LIN PHY

GPIO

S12Z

PWM

Voltage

Regulator

5V

Switch

Bank

Backlight

Dials

LIN

BUS

Automotive Voltage

Wakeup

HVI

12V

Switch

ADC

12-Bit

High-Voltage

Components

Digital

Components

5V Analogue

Components

MCU Core

and Memories

TM









35 TM





Single Core

Dual Core MPC5607/6/5/B z0, 64MHz,

Up to 1.5M Flash, 96k RAM

CAN, LIN

En

try B

CM

Past 2012 2014 2016

MPC5604/3/2/B/C z0, 64MHz,

Up to 512k Flash, 48k RAM

CAN, LIN MPC5602/1D z0, 48MHz,

Up to 256k Flash, 16k RAM

CAN, LIN

Mid

-Hig

h B

CM

In

teg

rate

d

Ga

tew

ays MPC5668G/E

z6+z0, 116MHz,

Up to 2M Flash, 598k RAM

Flex, Ether, MLB, CAN, LIN

2013 2015

MPC5668E z6+z0, 116MHz,

Up to 2M Flash, 598k RAM

Flex, Ether, MLB, CAN, LIN

Triple Core

First Sample

Date (left edge)

Production

Proposal

Planning

Execution

Product

Qualification

(right edge)

1H 1H 1H 1H 2H 2H 2H 2H

MPC5646/5/4C z4+z0, 120MHz,

Up to 3M Flash, 256k RAM,

Flex, Ether, Security,

CAN, LIN

MPC5646/5/4B z4, 120MHz,

Up to 3M Flash, 192k RAM,

Flex, Security,

CAN, LIN

Fado/Bolero 90nm Products Next Generation Products

MPC5748/7/6G z4+z4+z2, 160MHz,

3M-6M Flash,


MLB, USB, CAN, LIN

MPC5746/5/4B z4, 160MHz,

1.5M to 3M Flash,

Flex, Security,

CAN, LIN

MPC5748/7C z4+z2, 160MHz,

4M-6M Flash,


CAN, LIN

MPC5746/5/4C z4+z2, 160MHz,

1.5M to 3M Flash,


CAN, LIN

Security

Bolero Next Gen Up to 1.5M Flash,

CAN, LIN

36 TM





Body Control Gateways

37 TM





• FSL MPC574xG/C family of MCUs offers:

− Advanced Communication Peripherals – Ethernet, USB, SDHC, FlexRay, MOST, higher quantity of LINs, CANs, etc

− Improved Performance - Multicore MCUs options, increased MHz

− Large Flash and RAM to support increased message handling/code requirements

− New Low Power Unit with improved functionality in low power modes

− Support of Functional Safety – ISO26262 process, targeting ASIL-B

− Family Concept – Scalable HW and SW approach within MPC574xG/C family and migration path from the widely used Bolero/Fado families

− Availability – 55nm products in design, Bolero 90nm can be used for early development today.

90nm 55nm

Calypso MPC574xG/C

Fado MPC5668G/E

Bolero MPC564xB/C

TM









39 TM





HSMv2

• e200z0h core @ 80MHz

• Crossbar with MPU

• Interrupt controller (32 x HOST to HSM)

• Memory

− 24KByte internal SRAM

− Flash

Data: 2x 16KBytes

Code: 2x 64 KBytes; 1x 16KBytes

• Cryptographic Core (C3)

− AES-128

− Random Number Generator

− DMA functionality

Calypso HSMv2

80MHz

24

Core

/

Sys

tem

Reset

40 TM





High-Level

ECC-256

NIST FIPS GF(p)

WHIRLPOOL

AES based

HASH

Medium-Level

Internal Core

50-250 MHz

Sec. Counter

Security

Standards Evita Low HIS-SHE

HIS-Medium

(EVIT-Medium) EVIT-High

Main features UID

Crypto engine

NVM is mandatory

Fix function set

Programmable by

customer

PublicKey

HASH

CSE

Module

HSM

Module

supported by MPC564xB/C

supported by MPC5746M & Calypso

Low-Level

AES-128 UTC Clock

AES-PRNG EVITA HW-IF

Internal RAM

64 KBytes

Internal NVM

32+10 KBytes

EVITA Security Modules

41 TM





• Based on widely designed in Bolero 90nm products

− Calypso compatible with Bolero 90nm

− Minimizes customer development costs – same pin out, same/enhanced cores/peripherals, similar tool chain

• Compatibility/Scalability within the Calypso family

− Like Bolero 90nm, easy for a customer to move to a higher or lower performance device depending on their application requirements

• Features

− Wide range of 55nm body MCUs that address the full range of body applications from low end simple BCMs to highly integrated Gateways

− Peripherals at the high end that support next gen highly integrated BCM/Gateway applications – MLB, USB, SDHC, large Flash and RAM, multi-cores, security modules

− Devices follow the ISO26262 functional safety process, targeting ASIL-B systems

TM









43 TM





Security

• Publicity around “hacking” of today's cars

• Customers want to prevent software from being copied

• OEMs want to restrict unauthorized aftermarket parts

Hi-Res Color

Graphics

• Cost WVGA LCD is becoming more economical

• Fully reconfigurable clusters moving from luxury cars to

mainstream

• Even small cars will have color TFT

Head-Up

Displays

• HUD attach rates set to grow significantly

• Current generation systems use mechanical warping

• Next generation HUDs will require electronic warping

in the MCU

44 TM





Safety

• Rear-view camera being legislated in US

• Growth of panoramic camera and vision applications

• Internal cameras for drowsiness detection

• More instrument clusters with camera inputs

Graphics

Tools &

Software

• OpenVG1.1 becoming widely used in Cluster

applications for needle animation, fonts, textures

• OpenGL ES2.0 and beyond for high-end 3D effects

• Sophisticated tools and graphic design capabilities

required

45 TM





Motocycle/Basic

Cluster

Mid-/High-line

Cluster

Premium

Cluster

Small Cars Compact Cars Medium Cars Large Cars Luxury & SUV

• One or two

gauges

• Basic segment

LCD only

• Lowest

component count

and system cost

• Up to six gauges

• Medium resolution color

LCD

• Video input from rear-

view camera or from

infotainment system

• Some sophisticated

graphics

• Strong focus on system

cost

• Few or no gauges

• Very high-resolution

color LCD

• Dual video inputs

• Very demanding

animation

requirements

• State-of-the-Art

Graphics

Motorcycles

Low-line

Cluster

• Two to Four

Gauges

• Large segment

LCD, or

• Low resolution

dot-matrix LCD

• Low component

count and system

cost

46 TM





Best possible

graphics

performance

Optimized

Graphics,

high

integration

2012 2013 2014 2011

Premium

Low-line

Basic

i.MX 6Dual

MPC5606S

Production

Power

Cortex-A9

A15/A7

S08

S12

i.MX 6Solo/DualLite

Lowest

System Cost

Cost Effective

Performance

Execution

Production

Proposal

Product

Qual

Samples

Planning

A5/M4

SVFXXX High-line

S08LG32

S12HY

S12XHY S12ZVH128

S12ZVHY64

M4

ARMv7 ISA

Color

Graphics

MPC5645S

A5

Lumen NG

Halo

Corona

Pin Compatible

QFPs

47 TM





http://www.autosavant.com/wp-

content/uploads/2010/01/11_MyFordTouch_14_Instrument_Cluster_HR-300x192.jpg

Gap and architecture

break

New Portfolio ARM, s12

Legacy Portfolio Power Architecture®, ARM®,

S12 and S08

i.MX

Corona

Lumen 4W

Lumen 2W

ARM

Power

Architecture

S12, S08

Halo

Brid

ge, S

cale

an

d U

nify

8-,16- and 32-

bit MCUs

32-bit MCU/MPUs

based on ARM

with GPUs

Gap and architecture

break

48 TM





Gauges

Analog / Digital Inputs

MC33910

Segment LCD

Speed Sensor

Fuel level sensor

Oil level / coolant

Battery

Ignition Voltage

LIN

System Bus

Connections

S08LG

SBC

Sig

na

l Co

nd

ition

ing

M

C33

97

2

Stepper

Drive

MC33977

LEDs

Main MCU

Audio Amp. ADCs

GPIO

SCI

PWM

PWM

TPM / I2C

LCD

Driver

VDD RST

LED

Backlight

Driver MC33996

49 TM





Gauges


SBC

MC33904

Segment LCD

Speed Sensor

Fuel level sensor

Oil level / coolant

Battery

Ignition Voltage

LED

Backlight

Driver MC33996

System Bus

Connections

CAN

S12HY

S12XHY

S12ZVH*

Sig

na

l Co

nd

ition

ing

M

C33

97

2

LEDs

Main MCU

Audio Amp. ADCs

GPIO

CAN

Stepper

Drive

PWM

SPI/I2C

LCD

Driver

VDD RST

Gauges Driven directly from Micro

50 TM





Gauges


SBC

MC33905

Segment LCD

Speed Sensor

Fuel level sensor

Oil level / coolant

Battery

Ignition Voltage

LIN

System Bus

Connections

CAN

MPC5606S

MPC5645S

Sig

na

l Co

nd

ition

ing

M

C3

39

72

LEDs

Colour TFT LCD(s)

Main MCU

Audio Amp.

Camera Sensor(s) External Memories

ADCs

GPIO

Camera input

CAN/LIN

Stepper

Drive

PWM

PWM

Display

Control Unit

Gauges Driven directly from Micro

LED

Backlight

Driver MC33996

51 TM






COM ICs

Power

Management

IC

MC33902

MC33662

Speed Sensor

Fuel level sensor

Oil level / coolant

Battery

Ignition Voltage

LIN

Ethernet

MOST

System Bus

Connections

CAN

SVFXXX

i.MX5

i.MX6

Sig

na

l Co

nd

ition

ing

M

C3

39

72

S08

S12

MPC5604S

System

Micro

Colour TFT LCD(s)

Main MCU

Audio Amp.

Camera Sensor(s)

Head Up Display

External Memories

Camera

input

CAN

PWM

PWM SPI/I2C

LED

Backlight

Driver MC33996

LEDs

52 TM





• Performance Over 850 DMIPs – Unique dual-core (ARM Cortex™-A5 + Cortex™-M4) architecture handles MCU + MPU tasks on single chip

• Rich, Compelling User Interfaces – Innovative 2D-ACE and integrated OpenVG™ hardware acceleration reduces memory requirements for UIs

• Enabling Safety Features – Integrated video ADC for direct connection of one or more analog cameras ensures lowest system cost and easy conformance to mandates requiring rear-view cameras

• Scalable Solutions – Generous 1.5 MB on-chip SRAM and multiple package options – scale from low-cost, basic connected radios without external DRAM up to entry-level infotainment systems with dual displays

53 TM





• Cost-optimized solution integrates:

─MCU + MPU

─Video ADC

─On-chip SRAM

─Single 3.3V supply

• Improved reliability, fewer components, and reduced system complexity

• Simple, cost-effective package

Vybrid Automotive Solutions Today‟s Connected Radio

Collection of discrete ICs

• Many external components: MCU, MPU, ADC, DRAM, PMIC

• Additional assembly steps and compromised reliability

• Higher total system cost

54 TM





1. Value-added analog

integration to drive down

system cost

− Real-Time Clock

− CAN PHY

− Voltage Regulator

2. Single chip provides all gauge-

based basic cluster functions,

including segment display

capabilities

Ideal for basic segment cluster

with mechanical gauges and

segment display

55 TM





56 TM





Traditional MCU with Discrete

Analog and Power

S12ZVH Family

MCUs

• Single-die solution integrate:

− 12V direct supply regulator

− Can PHY Layer

− Sound Generation Module

− Real Time Clock

− LCD Driver

− Stepper Motor Drivers

− Simple, low-cost package

• Many external components

• Additional assembly steps

• Higher total system cost

57 TM





LCD drive

4x40

CAN

Timer (Input

Capture)

16bit x

8ch

ADC 10-bit,

8-ch on

pins

CAN PHY

4 x Stepper

Motor Drivers

(w/ SSD)

Coolant Temp

Speedometer

Tachometer

Fuel Level

GPIO 12V switches

(e.g.-

L/R/Cancel)

SPI

Fuel Level

Input

Speed

RPM

PWM_2 8b,4ch / 16b,

2ch

CAN Bus

Monotonic

Sound

Generator

4x40 Segment LCD

Vreg

Vsup

Ignition

Sig

na

l C

on

dit

ion

ing

S12ZVH

128k Flash (ECC)

4k EEPROM (ECC)

8k RAM (ECC)

S12Z CPU

Amp

5V

Vbat

Vsup

5V

Temperature

Sensor

Ballast Transistor

RTC

32 kHz

SCI

IIC

OSC

4-16 MHz

Internal

RC OSC

Timer 16bit x

8ch

58 TM





59 TM





• Halo Target Markets

− Single or dual high-resolution graphics displays with mechanical gauges

− Also supports Head-Up displays either standalone or as part of the cluster module

• Corona Target Markets

− Single basic graphics display, dot-matrix or LCD with mechanical gauges. Corona fills in the low-end Hybrid solutions while maintaining code compatibility with 32b solutions

• Key Technical Characteristics

− 32b ARMv7, A5/M4 hybrid architecture for Halo and M4 for Corona

− Updated graphics capabilities relative to MPC5645S and MPC5606S

− Autosar and MQX support available

− RAM and Flash expansion ports for added flexibility and future-proofing

• Hardware/Tools

− Complete solution designs to show capability of platform quickly after sample availability

− Partnership with Altia to provide optimized tools for ease of use of 2D-ACE

TM









61 TM





• New Demo Systems

• BOM Correct

• Form Factor Similar to End Product

• Extensive Use of Graphics Capabilities

• Portable for Field Demonstrations

• Easy to Use – Plug it in and Go

• Halo and Corona will have these type of demos available shortly after sampling

SVFXXX Demo

S12ZVH128 Demo

MPC5606S Demo

S12ZVHY64 Demo

62 TM





TM









64 TM





More than 3,500 people die every day in traffic-related incidents

50 million are injured every year

Advanced Driver Assistance Systems (ADAS) addressing regulations in developed markets

Cost-effective passive safety systems in emerging markets

Safety

65 TM





… 90% of these casualties occur in developing countries

Country USA Germany Japan China India

Population 306 million 83 million 128 million 1,336 million 1,189 million

Car Park 251 million 56 million 91 million 145 million 72 million

Road fatalities ~ 40,000 ~ 5,000 ~7,000 ~ 90,000 ~ 105,000

Death / 100k

people

13.9 6.0 5.2 6.7 8.8

Death / 100k

cars

17.0 9.0 7.3 61.6 145

Trend in road

fatalities

Source: http://www.who.int/violence_injury_prevention/road_safety_status/2009/en (*) and 50 million are injured

http://www.who.int/violence_injury_prevention/road_safety_status/2009/en

http://www.who.int/violence_injury_prevention/road_safety_status/2009/en

https://www.cia.gov/library/publications/the-world-factbook/flags/ja-flag.html

66 TM





Safety-Critical Functionality

No room for error in critical safety systems

Technology has to work 100% of the time

Functional safety becoming an integral part

of development process.

Built-in safety functions like self-testing

and monitoring to detect and mitigate

random hardware failures

ISO 26262 functional safety standard

TM

Safety

67 TM





Applications

Execution

Proposal

Single Core

Planning

Production

Dual Core

Multi Core

Chassis

MPC5517

280MHz 1M – 2M, El Mot ctrl

Ethernet- Fray

2xCC & 1xLS @ 266MHz,

3-4M, el Mot Control Timers

Ethernet-Fray-FDCAN*-Security*

ASIL-D

< 2012 2013 2014

1st Si

High-end

ESC high-

VDM

HEV-EV

Mid-range

ESC, EPS

HEV / EV

Low-end

ABS, EPS

low

2015

MPC567xk

2xCC & 1xLS @ 266MHz, +

ACC (FFT)

2-4MB NVM -1.5MB SRAM

Security*, FD CAN*

El Mot timers, Ethernet

Fray- 8 +4 ADC

ASILB to D

1xCC & 1xLS @ 180MHz 1.5M – 2.5M, el Mot Timer

Ethernet-Fray ASIL-D

S12 (X)

Panther Jul12 MPC564xL

120MHz 512k-1M, El Mot ctrl

2016

QorivvaTM

CC – Computation core

ACC – Accelerator

LS – Lockstep core

* - Proposed

2017 2018

2-4xCC & LS @ 266MHz

~8M, El Mot imers

Security - FD CAN

ASIL-D

1-2xCC & LS @ 150-MHz ~4M, Ethernet, F-ray Security &FD CAN

ASIL-D

Multi Core

40nm

1xCC & LS @ 120MHz 1-2M,

Timers, FD CAN ASIL-D

Dual Core

40nm

Racerunner Apr

13

MPC560xP

64MHz

512k El Mot cotrl

Low end 40nm

Gila Mar14

2nd Si

Mid End 40nm H2-15

High End 40nm H1/15

H1 „16

68 TM





• ASIL-D

• Dual Core LS –

180MHz

• Mid Power

• High Tamb > 140C°

• Advanced Mot. Ctrl

• AUTOSAR 4.0 + ISO

• BGA 257 or 144LQFP

• ASIL-D

• Dual Core LS –

266MHz or Triple

Core

• Mid Power

• Advanced Mot. Ctrl


• BGA 356

• ASILB & ASIL C/D

• Multi Core – 266MHz

• High Power

• FFT Accelerator

• High End ADC (SD)

• High Dense Memory


• BGA 356

• ASIL B & ASIL C

• Mixed Core – 600MHz

• High Power

• GPU

• Video IN & Out

• Very High Dense Mem


• BGA 356 (tbc)

Panther – Gila

EPS, ESC,

VDM

Racerunner –

RADAR, ICM

Treerunner –

Vision, Data

Fusion

Panther –

Airbag, EPS,

ESC, VDM

69 TM





RADAR / Fusion Smart Backup Front View Surround View

• Adaptive Cruise

Control

• Blind Spot

• Lane Change Assist

• Cross Traffic Alert

• Distance

Measurement

• Overlay Graphics

• Object Detection

• Traffic Sign

Recognition

• Object

Classification

• Lane Departure

Warning /

Correction

• 360 / Birds Eye View

• Auto Parking

• Object Detection

Racerunner-Lite

Racerunner

266MHz, SPT

FlexRay, ENET

3M – 4M

Racerunner-Lite

200MHz, SPT-Lite

FlexRay, ENET

2M – 3M

300MHz

ICP-1

16 MByte DRAM

Monitor 16MB

300MHz

ICP-2

64MByte DRAM*

Monitor 2 64MB

500MHz+ ICP-2

4M Flash

64MByte DRAM

64MHz

ENET, Phy, MJPEG

512K

80MHz

ENET, Phy, MJPEG,

ISP

1M Flash

Caspian

Caspian+

Treerunner

70 TM





Komodo

FPGA

FFT

DDR Memory D/A

A/D

Tx /

Rx

Racerunner

Tx /

Rx

SPT

FFT

LS+Dual

Qorivva

Data

RAM

ADC

DAC

Tx /

Rx

Phase 1 – 2012 SOP

System Optimization


Systems Cost Reduction

Through Integration


De-featuring for mass

market

ASIL B / D

FFT, Histogram (SPT)

Sig Delta ADC

RAM integration

Dual core LS

ASIL B

FFT, Histogram (SPT-Lite)

RAM integration

1. Primary focus (phase2):

Improved features at lower cost

2. Secondary focus (phase3):

De-featured solution for mid range markets

Sy

ste

m C

os

t

System Integration

ASIL-B

71 TM





Smart Rear

Camera / SVC

Distance Measurement

Object Detection

Pedestrian Detection

Graphic Overlay

Low – Mid Range

Mono Front Camera

Lane Departure Warning

Blind Spot Detection

Smart Headlamp Control

Cross Traffic Alert

Forward Collision Warning

Low Cost Adaptive Cruise Control

Pedestrian Detection (<60kph)

Traffic Sign Recognition (Speed)

High End Front Camera

(Mono / Stereo)




Cross Traffic Alert


Forward Collision Mitigation

High Value Adaptive Cruise Control

Lane Keep Assist

Pedestrian Detection (>60kph)

Traffic Sign Recognition (Full)

72 TM





Smart Rear

Camera / SVC

Distance Measurement

Object Detection

Pedestrian Detection

Graphic Overlay

Low – Mid Range

Mono Front Camera




Cross Traffic Alert


Low Cost Adaptive Cruise Control

Pedestrian Detection (<60kph)

Traffic Sign Recognition (Speed)

High End Front Camera

(Mono / Stereo)




Cross Traffic Alert


Forward Collision Mitigation

High Value Adaptive Cruise Control

Lane Keep Assist

Pedestrian Detection (>60kph)

Traffic Sign Recognition (Full)

ENET

Debug

I/O

Bridge64M

LPDDR2

I/O S

yste

m

Cross Bar Fabric – AXI

Image Processing

Subsystem ARM™

Cortex A7

Cache

NEON

Image Cognition

Processor (APEX-2)

H.264 Encoder

MIPI

QuadSPI

Flash I/F

DCU

2x

CA

N-F

D

1x

eTim

er

FC

CU

3x IIC

TS

EN

S

2x

LIN

Fle

x

2x d

SP

I

AD

C

FPU

DDR3L I/FExt

interfaces

DMA

PDI

ENET

Debug

I/O

Bridge64M

LPDDR2

I/O S

yste

m


Image Processing

Subsystem ARM™

Cortex A7

Cache

NEON

Image Cognition

Processor (APEX-2)

H.264 Encoder

MIPI

QuadSPI

Flash I/F

DCU

2x

CA

N-F

D

1x

eTim

er

FC

CU

3x IIC

TS

EN

S

2x

LIN

Fle

x

2x d

SP

I

AD

C

FPU

DDR3L I/FExt

interfaces

DMA

PDIMonitor 2 233MHz

Monitor 2 350MHz Treerunner

ENET

Debug

I/O

Bridge64M

LPDDR2

I/O S

yste

m


Image Processing

Subsystem ARM™

Cortex A7

Cache

NEON

Image Cognition

Processor (APEX-2)

H.264 Encoder

2M

SRAM

FlexRay

2xMIPI

QuadSPI

Flash I/F

DCU

2x

CA

N-F

D

1x

eTim

er

FC

CU

3x IIC

TS

EN

S

2x

LIN

Fle

x

2x d

SP

I

2xA

DC

FPU

ARM™

Cortex A7

Cache

NEON

FPU

DDR3L I/FExt

interfaces

DMA

CSE+

Image Signal

Processor (ISP)

Treerunner Dual 400MHz

Treerunner Quad 600MHz

ENET

Debug

I/O

Bridge64M

LPDDR2

I/O S

yste

m


Image Processing

Subsystem ARM™

Cortex A7

Cache

NEON

Image Cognition

Processor (APEX-2)

H.264 Encoder

2M

SRAM

FlexRay

2xMIPI

QuadSPI

Flash I/F

DCU

2x

CA

N-F

D

1x

eTim

er

FC

CU

3x IIC

TS

EN

S

2x

LIN

Fle

x

2x d

SP

I

2xA

DC

FPU

ARM™

Cortex A7

Cache

NEON

FPU

DDR3L I/FExt

interfaces

ARM™

Cortex A7

Cache

NEON

FPU

ARM™

Cortex A7

Cache

NEON

FPU

DMA

CSE+

Image Signal

Processor (ISP)

73 TM





• Freescale and CogniVue have commenced a partnership on development of products

for Automotive Vision applications

− Smart Rear View

− Front View

− Surround View

• Phase 1:

− Freescale will exclusively provide existing CV220x (code name “Monitor”, based on APEX IP) to

automotive market

− Planning underway, samples currently available from CogniVue

• Phase 2:

− Freescale have licensed next generation image cognition IP from CogniVue (APEX-2)

− Plan to integrate APEX-2 array processor for future processor (Codenames “Monitor 2” and

“Treerunner”)

TM

74 TM





• Dedicated image processor for Distance Measurement and Object detection

• 1st generation array controller (Image Cognition Functionality) − Massive Parallelism

− Revolutionary data movement architecture

• Extra high density Memory (to 16MB)

• Very low power (<300mW typ use case)

• SW enablement to provide: − Object Detection

− Distance Estimation

− Dynamic Overlay

− Perspective and Lens Distortion Correction

SOC 80nm LP

MAPBGA Cross Section

DRAM

DRAM SOC

Monitor

Video

In Video

out

16MByte DDR

Memory (Stacked)

Imager

ARM

926

Array

SIMD

75 TM





CU CU CU CU CU CU CU CU

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Mem

ory

Array Controller

Control Store RISC Sequencer

Features Benefits

Array Processor Unit (APU) Scalable and fully-programmable massively parallel SIMD processing core

96 16-bit processors in APEX-1 (up to 34Billion Ops/sec)

Data memory co-located within

APUs

Minimizes access to off-chip memory to maximize performance efficiency and reduce

power

Multi-channel, Stream-In, and

Stream-Out DMAs

Data transfer operations are automatically sequenced to move data in and out of APEX

efficiently – keeps APU fed

Multi-ore Various hardware blocks run in parallel with APU. Bit processing acceleration blocks

(not shown) and RISC CPU are used for operations that map best to serial processing.

76 TM





• Production backup camera with Korean OEM

• Within a 1” cube this camera can do:

− Perspective correction

− Object detection and classification

− Flexible overlay and display control

− NTSC/PAL output

77 TM





PDK

Small form factor

Low power dissipation

Develop, Prototype,

Demonstrate

RDK

Reference development

kit to support

prototype software design & demos

SDK

Differentiated libraries & licensable tool kits – patented software

algorithms – faster TTM

Chips APEX-based

Image Cognition

Processors – best

performance per area per

power

Software development is a critical cost and factor in time to market

78 TM





• Compilers supported:

− GNU ARM (for primary processor)

− SEL (for APEX/APU) – CV220X platform wth additional APEX tools

− Proprietary compiler (C-99 with extensions) planned for APEX-2

• Development Environment:

− Comes integrated with the Eclipse IDE (Makefiles)

− Same ACF development environments for both CV220X and next generation

• Debugging:

− Supported debuggers for the ARM are:

− A professional Lauterbach Trace32 JTAG debugger supported for debugging application code (for ARM debugging – CV220X)

− Amontec JTAGkey2

− Segger J-Link debugger

• APEX Simulation tools (PC Based):

− APU Instruction Set Simulator (ISS) (Monitor)

− APU cycle accurate ISS and profiler (Monitor-2)

79 TM





• Motivation: Eliminate expensive screened LDVS cabling for video-based applications

− Replace with cheaper 2-wire CAN cabling, running time stamped Ethernet protocol

− Pilot project: Driving Assistance Application in the European OEM platform

− The application includes 5 / 6 cameras that are connected via Ethernet to a control unit

• The project has three main goals:

1. Prove the technical applicability of automotive series development process

2. Prove the economic feasibility for Ethernet technology in an automotive domain

3. Set up the technological and organizational environment to roll out the Ethernet technology in the automotive domain

80 TM






Ethernet Proof of Concept Phase 2 – 2015 SOP

Systems Cost Reduction

Through Integration


Value Added Features

1. Primary focus (phase2):

High level integration to save cost and footprint

2. Secondary focus (phase3):

Image signal processing integrated to save cost and

power

Salsa Phy

+ISP

Caspian

+ISP

Caspian+

+ISP

BroadRreach phy

integrated through SiP

(stacked die wire bond)

Small low cost package

(8x8mm)

Cost, size, complexity

reduction

LVDS Elimination

Ethernet proven in mass production

Image signal processing

integrated (monolithic)

BroadRreach phy integrated

through SiP (stacked die wire

bond)

MCU + Sensor bundled

Imager

Imager

Imager

Sy

ste

m C

os

t

System Integration

81 TM





Compare the size of the connector and the actual camera !

82 TM





• Enablement Vision ‒ OPEN CL as base language

‒ Basic function support in SDK

‒ Rapid Startup tool

OPEN CL Programming. No proprietary language:

Time-to-market Wide Industry Support

Easy porting

Development Framework (SDK & Matlab toolbox) :

Environment to develop „proprietary‟ algorithms

Library of functions for Radar

Graphic overlay capabilities

“QuickStart” Algorithms for Demo and jump start

Simple algorithms to demonstrate capability

Fast startup for Tier1 and OEM

Demo

• Enablement Surround ‒ Compression algorithms

‒ Ethernet driver

‒ Image signal Pre-Processing

• Enablement Radar ‒ Sign Processing Toolbox support

in Matlab

‒ Safety MCAL and OS

‒ Integration Demo w/ FE sensor

83 TM





Applications

Execution

Proposal

Single Core

Planning

Production

Dual Core

Multi Core

80MHz

768K – 1.5M, eTPU2

150MHz

2M – 4M, eTPU2

264MHz

3M – 4M, eTPU2

2xCC & 1xLS @ 200MHz, 1xIOP @ 200MHz

4M, GTM

< 2012 2013 2014

1st Si

High-end

>6 Cylinder

Mid-range

6 Cylinder

Transmission

HEV / EV

Low-end

<= 4 Cylinder

2015

2 x 180MHz

6M, eTPU2

2xCC & 1xLS @ 300MHz,

1xIOP @ 200MHz

8M, GTM

Cobra55

2xCC & 1xLS @ 300MHz

8M, eTPU2+

McKinley Mar12

1xCC & 1xLS @ 160MHz, 1xIOP @ 80MHz

2.5M, GTM

2xCC & 1xLS @ 200MHz

2M – 4M, eTPU2+

1xCC @ 80MHz

1.5M, GTM

Lavaredo Mar13

120MHz

1M, FlexPWM

Fuji Feb14

2016

QorivvaTM

CC – Computation core

IOP – I/O processor

LS – Lockstep core

50MHz

16 bit, 128k -1M, X-Gate

Matterhorn

Nov13

Nov12

K2 Sep12

Product

Qual

Production

Execution

Proposal

Samples

Planning 1xCC & 1xLS @ Up to 200 MHz

Up to 2M, eTPU2+

Rainier Apr13

MPC563xM

MPC567xF

S12 (X)

MPC564xL

MPC564xA

MPC5676R

TM

Automotive MCU Overview - 2012 Ap

Documents

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safeassure logo

mb of sw tm freescale

qoriq qonverge

quicc engine

processor expert

ready play

electronic cost