Automatically Tuned FM Transmitter Dan Fishman Saim Jafri Michael Thylur Electrical Engineers 2007.

Automatically Tuned FM Transmitter

Dan FishmanSaim Jafri

Michael Thylur

Electrical Engineers 2007

Project Idea

• FM transmitters to transmit from digital music devices to car antenna

• Between cities the unused radio frequency in one city might be used by a broadcasting station in the next

• The synchronization of the transmitter and receiving radio frequencies can be quite time consuming

• An automatic FM radio frequency scanner that finds unused stations will be developed

Project Goals

• Develop a full understanding of frequency synthesizers that use a Divide-by-N and PLL

• Successfully detect an unused station in the FM band

• To better understand communication systems

• Investigate the marketability of our system

Existing TechnologiesGriffin iTrip

• Power source: receives power from ipod• Modulation: FM Stereo • Frequencies: 88.1-107.9MHz • High stability crystal oscillator, phase-locked loop control • Transmits Audio frequencies: 50Hz to 15KHz • Operating range: 10-30 ft

Monster® iCarPlay™ Wireless 200 FM Transmitter with AutoScan

• This device automatically finds the clearest available FM station

• 3 programmable station presets• Simple, intuitive 3 button control

http://www.monstercable.com/productdisplay.asp?pin=4115

A Stereo FM Transmitter

• The two channels are encoded and multiplexed into one channel• This is fed into the frequency generator• The frequency generator works as an FM frequency modulator, it

receives a voltage and produces an oscillating wave based on the input

• The output of the oscillator will be very low, so it is sent to an amplifier to increase its broadcasting range

Introduction to Design

• Radios are tuned by using local oscillators

• Want to make an automatic scanning system using a frequency synthesizer

• Impractical to use different oscillators

• Makes sense to use a phase-locked loop as a frequency synthesizer

Phase-Locked Loop

• The frequency of the voltage at the output will be equal to the product of the frequency divide and the reference frequency.

• To control the digital divider a microcontroller will be used• We will use two dividers: A N-divide and a Pre-Scaler • Need to generate frequencies in the FM range 200 kHz

apart

rvco FNF ,

The System

PLL Super heterodyneReceiver

Microcontroller Output Voiceor Display

Frequency synthesizer

Detector

Superheterodyne Receiver

• The mixer multiplies the local oscillator with a signal.

• The intermediate frequency is 10.7 MHz.

http://en.wikipedia.org/wiki/Image:Superhet2.png

Frequencies

• FCC allows transmission from 88 MHz-108MHz– Allowable band of 200KHz

• Mixer moves a wave to 10.7MHz

• Local oscillator will generate 98.8MHz and 118.6MHz– Ex. 98.9MHz -88.1MHz= 10.7MHz

PLL Operation• In lock mode, the

input signal and voltage controlled oscillator signals are identical

• When input equals free-running frequency of VCO no voltage is supplied to the VCO

VCO

ff is the free running frequency

Vd is the input voltage

fo is the output frequency of VCO

Ko is the transfer function of the VCO

fo

ff

Vd

dfo VKff 0

Phase Detector

• The phase detector’s voltage output is a function of the phase difference between Fr and Fvco

• Gain of phase detector:• θe is the shifted phase

difference between the signals at the phase detector

• Ve is the voltage signal proportional to the phase difference (It is the output of the phase detector)

• A sinusoid can be approximated to be linear for small phase differences

radVV

Ke

ed /

Digital phase lock loop

• Constructed from both analog and digital devices

• The most simple phase detector is EXOR gate• Phase error is positive when output lags the

reference signal.• RC filter can be used to remove AC components

from the phase error signal• If phase error is zero, the phase detector’s

output will also be zero and VCO operate at its center frequency

Digital PLL For FM Band Synthesizer

http://www.ee.washington.edu/stores/DataSheets/cd4000/cd4059.pdf

LM565CN Phase-Locked LoopWe will insert an N divide and pre-scaler between VCO and phase comparator

Free running frequency is:

The VCO is set using an external capacitor and resistor

RoCofo

3.0

High Frequency Phase-Locked Loop

• Has a lock frequency between 43MHz and 100MHz when supplied 5 volts.

• A 2.4 kΩ resistor was placed between the power supply and the VCO to adjust the oscillation frequency range.

• Several by-pass capacitors were placed between power supply and ground to minimize the noise ratio.

• The system was successfully able to track a sinusoidal input between 64MHz and 102MHz.

Divide-By-N

• Has 24 pins, 16 jam inputs

• Outputs a pulse with the desired frequency

• Testing found that it works for both square waves and sinusoids

• Programmable

N-divide CD54HC4059

• Three mode-select inputs • The mode times the jam inputs select the choice of the

divisor N.

• To divide by 493 in the divide by ten mode, the chip needs to be setup in the divide by ten mode by applying

appropriate high voltages to the mode-select inputs. 493/10=49.3

4112985mod 3)409(10493 JJJeN

3,2,1)16,15,14,1310012,11,10,9108,7,6,51(10mod RJxJxJxJN e

Divide-by-n Presets

Divide by 493

8051 Microcontroller

• Programmed using C language • Both controls divide-by-n and determines if a

station is unused• Used to detect voltages

Add picture of microcontroller? Or add more text

Control of divide-by-n via μC

• Each ribbon can control 8 jam inputs

• 12 jam inputs need to be controlled – Therefore 2 ribbon cables

• Measured 3.27V from each pin

Divide-by-n oscillation

• Voltage oscillates when using μC

• No effect on frequency

Frequency Synthesizer

• Test system built which outputs a desired frequency

• Divide-by-n set to divide-by-2 mode

• Microcontroller programmed to set divide-by-n to various divisors to control the output of the PLL

• Test system successfully worked

• Tested at 10 KHz

Peak Detection

• AM stations used

• The input to the peak detector was from the base of the transistor at the audio amplifier

• Op amp used with gain of ~62.5 so diode would be in active mode

• Experimented and found RC value of one second showed good results

Station   Noise

peak to peak (mv)

max (mv)  

peak to peak (mv)

max (mv)

1131.7 1481.7   288 1052

max/peak ratio 1.3  

max/peak ratio 3.7

Station (detect)   Noise (detect)

peak to peak (mv)

max (mv)

peak to peak (mv)

max (mv)

383.3 901.7 50 504

max/peak ratio 2.4  

max/peak ratio 10.1

Ratio of Noise to Station

• Check to see if there was an advantage of using detector circuit.

• Output of amplifier: 2.79

• Output of peak detector: 4.29

Prescaler

• Need to scale the FM frequency down because, through experiment, we found the n-divide will not operate above 7 MHz

• Divide by 64

• Operates from 50 MHz to 1.1 GHz

Project Timeline

  Start Date Completed Remaining

Make Divide-by-N operational 10/24/2006 16 0

Test PLL 11/8/2006 0 10

Integrate PLL with Divide 11/16/2006 0 4

Integrate PLL with Divide 1/3/2007 0 7

Program Microcontroller 1/10/2007 0 10

Design Detection System 1/20/2007 0 5

Test Detection System 1/25/2007 0 7

Program Microcontroller 2/1/2007 0 10

Test system as a whole 2/11/2007 0 8

Design output display 2/19/2007 0 7

Program Microcontroller 2/26/2007 0 3

Mount on PCB board 3/1/2007 0 5

Acknowledgements

• Professor Hassib

• Professor Hedrick

• Emad Andarawis

• Gene Davison

References• Barret, Curtis. "Fractional/Integer-N PLL Basics." 1999. Texas Instruments.

25 May 2006 <http://focus.ti.com/lit/an/swra029/swra029.pdf>.

• Best, Ronald E. Phase-Locked Loops. 3rd ed. New York: McGraw-Hill, 1997.

• "ITrip Auto." Griffin Technology. Griffin Technology. 19 May 2006 <http://www.griffintechnology.com/products/itripauto/index.php>.

• Ward, Darrin. “FM Transmitter.” How A Stereo FM Transmitter Works.

2005 http://www.fm-transmitter.com/technical/how-a-stereo-fm-transmitter-works.htm

AM Regulations

• The AM broadcast band range is 530 kHz to 1700 kHz

• AM is limited to a carrier signal power of 375 watts

Phase-Locked Loop

http://focus.ti.com/lit/ds/symlink/tlc2933.pdf

PLL Top View

• External low-pass filter

• Lock Frequency – 43 MHz to 100 MHz (VDD=

5V +5%, TA= -20˚C to 75˚C, x1 Output)

– 37 MHz to 55 MHz (VDD= 3V +5%, TA= -20˚C to 75˚C)

http://focus.ti.com/lit/ds/symlink/tlc2933.pdf

Prescaler

• The prescaler operates at a frequency of 50 MHz

• It is able to divide by 64 and 128

• By testing the prescaler it was concluded that device works in the specified manner

PLL and PrescalarIntegration

• When the system was run the PLL went out of its lock range to 128MHz, the prescaler divided this by 64, hence returning an input of 2MHz to the phase detector.

• Subsequent to this response the PLL would not return to its lock range, unless the system was reset and the prescaler was set in the disable mode.

• A possibility of the system not working is because the bandwidth range of the phase detector was not large enough to accommodate a large bandwidth range.

810 WGY

Local Oscillator1.265 MHz

Noise

Energy Detector

• The AM/FM radio kit allowed access to the super heterodyne receiver stages.

• Voltages were taken after peak detector circuit in the AM reciever.

• The signal is smoothened by a resistor and capacitor, that act as lowpass filter and a peak detector.