Automatic Extraction of Analog Circuit · PDF fileAutomatic Extraction of Analog Circuit Macromodels by ... For a circuit with a time-invariant operating condition given by x = x0,

Automatic Extraction of AnalogCircuit Macromodels

Rohan gatra

2005

Advisor: I~rof. Pileggi

Automatic Extraction of Analog Circuit Macromodels

by

Rohan Batra

A thesis submitted in partial fulfillment of the requirementsfor the degree of

Master of Science

in

Electrical and Computer Engineering

Carnegie Mellon University

Advisor: Prof. Larry PileggiProf. Patrick Yue

Abstract

Verifying a complete analog system via trar~sistor-level simulation is an extremely difficult

process and can often become infeasible due to the limitation of simulation capacity. A similar

difficulty is encountered when high-level design analysis is performed for the whole system. For

these reasons, compact macromodels of analog blocks are desired which can be substituted in

place of the actual ~ransistor-level netlist to speedup the simulation with sufficiently high

accuracy.

The NORM algorithm that was proposed in [1] utilizes the Volterra-Series to represent

nonlinear transfer functions and employs projection-based techniques to significantly reduce the

size of the nonlinear system equations, thereby generating compact representations for analog and

RF circuits. This algorithm can be applied to time-invariant as well as time-varying "weakly"

nonlinear circuits. Some extensions have been described in [2][3]. In the first part of this work,

we describe a complete methodology which extends the NORM algorithm to generate nonlinear

reduced-order macromodels directly from transistor-level netlists [4].Even though the NORM

algorithm works extremely well for "weakly" nonlinear circuits, due to the limitations of the

Volterra-Series [5], it cannot be extended to more "strongly" nonlinear circuits like Phase-Locked

loops. Phase-locked loops are used in applications such as frequency synthesis and clock and data

recovery. The nature of these applications requires high accuracy for predicting the PLL

nonlinearities and dynamics during the design process, which thereby requires prohibitively

expensive transistor-level simulation.

In the second part of this report we propose a compact behavioral model for voltage-controlled

oscillators, which are the key components of PLLs, and the most difficult to macromodel due to

their dynamic, large-scale nonlinear behavior. Unlike previous works in this area, this approach

follows a systematic modeling of nonlinear dynamics in a topology independent manner. We

demonstrate that our model can reduce the system-level simulation runtime significantly without

sacrificing the required accuracy.

Part - I : Automatic extraction of [nacro-models of weakly nonlinear circuits

Introduction

To generate analog macromodels that can be used in commercial simulation environments, the

circuits under consideration must be characterized and then modeled based on industry-standard

device models in these environments.

We developed a complete methodology which extends the NORM algorithm [1] to generate

nonlinear reduced-order macromodels directly from transistor-level netlists. The reduced

nonlinear macromodels will capture the nonlinear characteristics of corresponding circuit blocks,

such as IIP3, THD and gain compression, in a compact form while maintaining an accuracy

comparable to commercial simulators such as SpectreP~~ and HSPICE. The purpose of

developing compact nonlinear analog macromodels is two-fold. Firstly, macromodels can

facilitate efficient system-level design exploration by allowir~g designers to effectively "re-use"

the macromodels from their previous designs to predict the system-level behavior. High-level

decisions and tradeoff analyses can be made efficiently by evaluating system specifications

through the use of a library of "reduced-order" macromodels corresponding to a variety of circuit

topologies and configurations. Secondly, compact component macromodels also facilitate the

full-system verification which is otherwise intractable.

Background

Volterra Series provide an elegant way to characterize weakly nonlinear systems in terms of

nonlinear transfer functions. For a circuit with input u(t), the response x(t) can be expressed as

the sum of responses at different orders:

x(t) = ~ x. (t) (1)n=l

where, x. (t) is the n-th order response. More generally~ we can use Volterra kernels to capture

both nonlinearities and dynamics by convolution [5]:

x(t): ~... ~h. t .... ,r.)u(t- 1).... z~(t-~:. )~. 9~:. (2)

where, h. (rl .... r.) is the nth order Volterra kernel. The frequency domain transform of the nth

order Volterra kernel denoted by H. (s1 .... s,,) is generally referred to as the nth order nonlinear

transfer function. These nonlinear transfer functions are independent of the input and fully

describe the weakly nonlinear behavior of the circuit. In order to apply the Volterra nonlinear

transfer function for a SIMO weakly nonlinear system we can consider its standard MNA

formulation:

-~(q(x(t)) = bu(t), y(t) (3)f(x(t))+

For a circuit with a time-invariant operating condition given by x = x0, the first order linear

transfer function is given by:

(G~ + sC~ )Ht (s) (4)

The symmetrized second order nonlinear transfer function is determined by [ 1 ]:

(5)

where k = s~ +sz and f~r equation (4) and (5):

4

1 0~ 1 0~G, = ~x,. (f) .... C, = ~0--~ (q).~=~o’

H1 (s~) Hl (S2) = ~(H~ (s~)@ H~ z)+ H~ (sz) @ H~ (s~ )

When a nonlinear circuit has a large input excitation; however, it causes the operating points of

the active devices to change with time. For example, in a ~xer, the operating condition with

respect to ~ signal is dete~ned by a large LO signal rather than a fixed operating point. This

requires the analysis of a small-signal excitation over a large periodic operating condition.

Therefore, we can apply a time-va~ing formulation of the Volte~a transfer functions

H. (t, s~, s~ ...... s. ) which can be formulated si~lar to the fime-inv~iant case [9][2] [3].

Volte~a based nonline~ descriptions, however, often increase drastically with problem size,

thereby maEng them ineffective when used directly. Therefore, we instead apply the projection

based nonlinear reduced order method (NORM) proposed in [1] to reduce the model size. The

algorithm computes a projection matrix by explicit]iy considering moment-~tching of nonline~

transfer functions. For example, if we expand the first-order transfer function H~ (s) at the origin:

H~(s) = ~ s~g~,~, (6)k=0

is a kth order moment for the first-order transfer function. Now, expanding thewhere M1,k

second-order nonlinear transfer function H2 (S1, 2 )attheorigin (0,0

~ kl k-I

k=0 l=0

(7)

where, M2,k,l is a kth order moment of the second-order transfer function. The actual expression

for Mz,~,,i can be obtained by first substituting (6) into (5) and expanding w.r.t k 1 + sz.This

procedure can be also applied to obtain the moments of the third order transfer functions. In

NORM, a projection matrix is built such that the reduced order model will match certain number

of transfer function moments. It has also been demonstrated that multi-point expansion based

approach produces much more compact models than the single-point expansion.

Overall Macromodeling Flow

We outline the complete flow for the generation of reduced-order models from transistor-level

netlists in Fig. 1. First, we simulate the transistor-level netlist in a commercial simulator such as

SPICE to determine a proper operating condition for the circuit. In the case of a time-invariant

circuit, a fixed DC operating point will be computed. Otherwise, a large-signal time-varying

operating point will be computed for a time-varying circuit such as a mixer. We model the

nonlinearities for each transistor in the circuit as a third-order polynomial. We simulate each

transistor in the circuit multiple times, varying the bias-voltage for its terminals to generate

accurate data-points for fitting the polynomial. We then construct the full Volterra-based model

of the circuit and generate the reduced-order model of the circuit using NORM[ 1].

Order Model

[~alx+a2x2 +a3x3 +...[

Figure. 1. Extraction of reduced-order model

Spice simulation

Determine op point

Collect data-points

Fit nonlinearities

Reduced-order model

Extraction of Volterra Parameters

The nonlinear modeling techniques outlined in Section 2 depend on extracting the parameters of

the Volterra model accurately. In Volterra series, a nonlinearity is represented as a power series

expansion around a bias point. To illustrate, let us consider a nonlinear device characteristic f(x)

expanded about a bias point x0:

f (x) = f o)+a~ (x- ~0 )+a2(x - o) 2 + .... (8)

where,

1 0iai = ~’~7"x~ f (x)x~

Many different small-signal models for MOS transistors exist, and most sophisticated models

include substrate coupling effects and transcapacitances[6][7]. Spice models like BSIM3 not only

represent physical effects but also include many numerical parameters which further increase the

complexity of the model equations. It is infeasible to find the coefficients of the equation given in

(8) by finding the higher-order derivatives from the model equations in BSIM3 and other models.

Instead, we employ least-mean-square error (LMSE) fitting techniques to find the coefficients [6].

We will show how the nonlinear parameters for the drain current of a MOS transistor are

extracted. We model the drain current Ids as a third-degree polynomial with respect to the drain,

source and gate voltages. For simplicity, we have used the body terminal as the reference voltage

although other possibilities can be easily accommodated. The equation includes individual

voltage terms as well as cross-terms. Compared to ordinary hand-analysis equations we model not

only the first-order nonlinearities but also the second and third-order nonlinearities as small-

signal quantities around the bias point:

Ia~ = las~ + gav,~ + gsV~ + g~v~ + ga~vav~ + .. (9)

2. 2 + V3gssVs "t-*’"~gddsl)dVs ....... gsss s

where,

I d, o

gxy

g xyz

= bias current value at operating point

= small-signal voltage at terminal x = {d,g,s}

first-order coefficient for voltage at terminal x

= second-order coefficient for cross-product of

voltages at terminals x and y

third-order coefficient for cross-product of

voltages at terminals x, y and z

Therefore, there are 3 first-order terms, 6 second-order terms and 10 third-order terms in the

equation.

It is not possible to get the second and third-order terms directly from transistor-level.

simulation so we have formulated an efficient way to get these terms and model the nonlinearity

accurately. We extract the first-order model parameters from Hspice simulation[8]. For a time-

invariant circuit, we perform a DC operating point analysis to obtain the bias current value and

the first-order coefficients. For a time-varying circuit, we perform a single-tone transient analysis

for a sufficient settling time and then sample a single time-period of the settled response to obtain

time-varying operating point; for the circuit. We then perform a DC operating-point analysis at

each of these points to get the first order coefficients ga, gs and gg. We can express these

coefficients in terms of the more commonly used small-signal coefficients G,~, G,~. and Gm~,, :

gg =Gin, gd =Gds and gs =-(Gds +Gin +Gmbs) (11)

For both the time-invariant and time-varying cases, the bias voltages for each transistor are

perturbed by small-amounts to obtain data-points for fitting the second and third-order

coefficients in the appropriate fitting range represented by the bounding box shown in Fig. 2. The

figure shows the drain current as a function of Vds and Vgs ./t is possible to measure the current

lds by perturbing the Vd~, and Vg~ slightly around each bias-point to obtain many different points.

From (9):

(Iris i --ldsO)= gdVdi + gsVsi + ggVgi +gdsVdiVsi +.. (10)

where, the subscript i denotes the i-th data-point and (lasi - Ia~o) is called the "residue"¯ To solve

the coefficients of the RHS in equation (10) we write the powers and cross-terms

vd, vs and vs for n sampling points into matrix Y, the corresponding coefficients into the vector

p and the residue (Ia,~ - I,ts0) into matrix R:

Vdl

Y = Vd2

V dn

3Vsl Vgl V~I Vd~Vgl .......... Vsl

3Vs2 Vg2 V~t2 Vd2Vg2 .......... Vs2

3V stt V gtl 12 ~rt ~ dn l)gn .......... llsn

P=[ga g,~ gg ga,~ ........... gsss]

and R=[I, I~ ...... I,,] r I,, =Ia~,,-Ia,.o (11)

We have to fit the coefficients of (10) such that the error for each of the n data-points around the

operating point is minimized. The aggregate error for the ith data-point is denoted by ei . We

have to minimize the error e = [e~ e2 ...... e,]r :

Yp-R =e (12)

The LMSE algorithm estimates p by minimizing the sum of squared errors:

F = eTe = (~’p-- R)~’(Yp-

This leads to the optimal solution:

(13)

p = (Y~Y)-~ .(YrR) (14)

10

In order to guarantee a good fit for the nonlinearities we ensure that the fitting range for the

data is correct [6] (Fig. 2). The range must be large enough to fit the nonlinearities accurately but

it should not attempt to cover the effects outside the signal-swing range. For example, if the gate

of a transistor has an expected signal swing of ±10mV, the fitting range for vg of this transistor

should be limited by the signal swing. It is also imperative to select enough data-points to fit the

nonlinear parameters accurately.

Ids 1 Vgs2

34

Vds

Figure. 2. Effective fitting range for Volterra parameters

In some cases, the :fitted results might still cause large relative errors for certain points in the

data. The fit may be improved by using a weighted-least squares method instead of the

conventional method. In this case, it is important to select individual weights for each equation:

14~(Idsi--Id~o) g,~vaiwi + gsvsiwi +o..+ gdsvdiVsiWi +.. (15)

such that the effective residue wi(Ia~i -laso) for each data-point is in the same range. This

weighting scheme gives each individual data-point the same importance as far as the fitting

process is concerned. This aids in reducing the error fbr each point and gives a better fit for the

entire range of data-points. First, we can perfbrm a LMSE fit on the data to get an initial estimate

11

of the points where the error ei may be large. We select the appropriate weight wi for each data-

point and scale the residue accordingly. After performing the weighted least-squares fit using

(16) and (17) we can look at the error ei again and modify the weights if we are still not satisfied

with the results. This is done for a few iterations till we can no longer improve the results. For the

weighted least-squares method we introduce another matrix, W, which is the diagonal matrix of

the individual weights. We have to minimize the weighted least squares error function:

F = (Yp - R)7"W(Yp - (16)

where Y,p and R have been defined earlier. This can be solved to get the nonlinear parameters in

(9):

p = (YT"WY)-I. (YrWR) (17)

12

Results

The methodology presented in the previous sections has been demonstrated on a double-

balanced mixer and an opamp. The macromodels generated using this approach are compared

with detailed transistor-level simulation of the circuits with HSPICE.

A Double-Balanced Mixer

Figure. 3. A Double-Balanced Mixer

A double-balanced mixer (Fig. 3) is modeled as a time-varying weakly nonlinear system with

respect to the RF input. The LO frequency is set at I[GHz, and we calculate the time-varying

operating point of the circuit by setting the RF input voltage to zero and using transient analysis

in Hspice to sample a single time-period of the settled response. The third order nonlinearities are

modeled around this time-varying operating point using numerical fitting techniques outlined in

Section 4. The fitted second and third order coefficents are used to generate a Volterra-based full

model for the circuit.

A single-tone RF input is used to verify the model results with the transient simulation

results. The third-order harmonic of the RF input frequency down-converted with respect to the

LO frequency is compared between the model and the simulation results. The second order

nonlinearities should ideally be zero except for numerical noise, by design. We performed

13

transient analysis for the circuit in Hspice followed by an accurate Fourier Transform of the

output time-domain waveform to verify the results. The RF input frequency is varied from

300MHz to 1200MHz. The maximum error in the full model as compared to Hspice simulation

for the first-order results is less than 2% for all frequencies. The maximum error in the third-order

results is less than 10% for third-order for all frequencies. The results in Fig. 4 have been

normalized with respect to the RF input amplitude.

-4I~ 10

200180160140120I O0806040200

300 800 900 1100 "1200

Fr equen c~" (Mhz)

[D Hspic e Sin’ulation [] Our rrodel ]

Figure. 4. Third-order harmonic (down-converted) for different input frequencies

Once we have the Volterra Series based full model, it is possible to measure the third-order

response at more useful harmonics also. For example, Fig. 5 shows the plot for the third-order

transfer functionH3(t.,j2nf~,j2zf2,j2rf3)where,3OOMHz<_f, f2<12OOMHz are the RF inputs and

f3 = 1GHz is the LO frequency. The full model has 1350 rime-sampled circuit unknowns which

is reduced to approximately 14 circuit variables using the NORM method, while still capturing

the dominant response of the circuit. The relative modeling error between the full and reduced-

order model for the first-order results is less than 0.01%. Fig. 6 shows that the relative percentage

error between the full-model and reduced-order model for the third-order results is less than 6%

for all cases.

14

21/V

600.

500 ~

400 ~

300 ~

200 ~2

Frequency (Hz)

Figure. 5. Third-order transfer function for mixer(full)

1210

8x I0~

6

12 2 Frequency (Hz)

Figure. 6. Relative modeling error for third-order transfer function

15

An Operational Amplifier

A two-stage Operational Amplifier topology is shown in Fig. 7. The closed-loop AC response

of this circuit is shown in Fig. 8. Using the extraction method described in Section 4, it is possible

to match the AC (first order response) of the circuit accurately to about 99-100% compared with

Hspice simulation. For this circuit, second order nonlinearities are more important than the third-

order nonlinearities since they are much higher in magnitude. The opamp is modeled as a time-

invariant system and is linearized at the DC bias point to fit the second and third order

coefficients for each transistor in the circuit.

The second-order distortion for a single-tone input is shown in Fig. 9. We compared the Hspice

simulation results for input frequencies ranging from 1 MHz to 100 MHz with our model results.

The relative error between the full-model and the simu]Iation results is less than 10% for all input

frequencies. The number of state-variables for the circuit reduced from 22 in the full-model to

about 5 in the reduced order model. The comparison of the full and reduced order model results

shows that there is less than 0.01% error for both first and second-order responses.

Vdd

Figure. 7. A two-stage opamp

16

22

20

20

..... ~ ......... T ......... ~ .... ~ .......... ~ .... 7 .....

Frequency (Hz) x 1¢

Figure. 8. Closed-loop AC response of the opamp

10°

Hspice SimulationFull ModelReduced Order Model

103106 10"/

Frequency (Hz)1 O8

Figure. 9. Second order distortion as a function of frequency

17

Part - II A Behavioral-Level Approach for Nonlinear Dynamic Modeling of Voltage-

Controlled Oscillators

Introduction

Phase-locked loops (PLLs) have found their way in many important applications, such

frequency synthesis and clock/data recovery. The performance validation of a PLL at the system

level generally requires transistor-level simulation with tight accuracy control. This accuracy

requirement, however., combined with the the nonlinearities and dynamics inherent in a complex

PLL, lead to prohibitively expensive simulation runtime to evaluate key performance

specifications such as acquisition time, capture/lock range and phase noise. In many cases, a full

SPICE simulation of the complete PLL can even become infeasible based on the meantime to

failure for the computer. For this reason, compact macromodels of the key PLL components are

desired to be substituted in place of the actual transistor-level models without sacrificing any of

the required accuracy. A key component of the PLL (Fig. 10) is the voltage-controlled oscillator

(VCO), which has dynamic large-scale nonlinear behavior that substantially impacts the overall

performance of the PLL.

Input

+..I Phase

t~

Loop

~ Detector Filter

Divider

Fig. lO.Block diagram of a PLL.

Output

t Voltage,._~ Controlled

Oscillator

Referring to the block diagram of a PLL in Fig. 10, the phase detector and loop filter can be

readily modeled using behavioral-level or circuit-level models that can capture the non-idealities,

including the weak nonlinearities. However, the nature of the VCO makes it a very challenging

18

modeling problem. The output frequency/phase of the VCO is a nonlinear function of the input

control voltage (Fig. 11). Moreover~ the output of the VCO is designed to be very sensitive

slight variations in the input control voltage, which makes the dynamic response of the VCO very

important. Phase (frequency)-domain models of the VCO have been used in the past [11][12][17]

to speed-up the simulation, and significant progress has been made in analyzing the behavior of

these oscillators, especially in terms of their plhase noise [181119][20][21][22]. The static

nonlinear behavior can be captured easily by sweeping the input control voltage and measuring

the output frequency [ 11] [ 12], but modeling the dynamics is much more challenging

[13][14][15][16]. Most attempts for modeling the dynamics are very simplistic and do not

guarantee sufficient accuracy. In this report we propose a systematic approach to accurately

capture both the static nonlinear behavior and nonlinear dynamics of a VCO using a behavioral

model [ 10]. Importantly, our approach is topology independent and does not require specific

information regarding the characteristics of the VCO that is being modeled.

19

VCO model

For simulation efficiency and generality, we propose a behavior modeling approach to relate the

VCO input voltage directly to the output frequency. To capture both the static and dynamic

nonlinear behavior in ’the model, we propose a second-order differential equation template is used

to describe the VCO:

.? = g(f ,j:,u,~) (18)

where f, ) and j~ are the output frequency, and its first and second order derivatives,

respectively; u and ~ are the input control voltage and its first order derivative, g(.) is

nonlinear mapping function. In our model, g(.) is a polynomial inf, ~, j~, u and ~ :

g(X1,X2,X3,X4) = ~ ajx~ +~.~ aijxix j +E aijkXiXjXk +"" (19)j i,j i,j,k

where at, % and ai~ are the coefficients to be determined in the model. Note that the model

template in (19) is completely generic, and not tied to any specific circuit topology or VCO

architectures. In the following sections we will outline a two-step simulation based

characterization process to extract the model parameters which capture both the static and

dynamic behavior of a VCO.

20

Static nonlinear modeling

Prior to modeling the dynamics of a VCO, our first step is to preserve the nonlinear static

voltage-to-frequency behavior. As shown in Fig. 11, we want to ensure that in the steady-state our

model will output a frequency which closely follows that of the original circuit.

OutputFrequency H.~_------

Input Control Voltage

Fig. ll.Static nonlinear behavior of a VCO.

The model proposed in (19) contains both static terms (e.g. terms containing only f, u ) and

their cross-terms and dynamic terms which contain the higher-order derivatives of these terms. In

order to ensure that the model is "correct" in the steady-state, we need to consider a reduced static

nonlinear behavior by excluding the derivative terms in (20):

~ajxj +Eaijxixj +~_~aijkXiXjXk + ..... 0 (20)j i,j i,j,k

where j = 1,2,xI = u, x2 = f.

In order to fit the coefficients of this template, we need to employ different control voltages at

the VCO input and measure the output frequency at those control voltages as shown in Fig. 11.

This can be implemented easily in most commercial simulators. For a particular input voltage, the

frequency of the output waveform can be obtained using the time-difference At between adjacent

zero-crossing times on the waveform (Fig. 12). The output frequency can be calculated

21

as f =1/2nSt. In SpectreRF, for example, this can be done using the "frequency" command [13].

The data obtained from this procedure can be used to fit the coefficients in the static model of

(20).

Vout

Fig. 12. Static nonlinear behavior of a VCO.

22

Dynamic nonlinear modeling

In addition to the static behavior, we capture the nonlinear VCO dynamics in our behavioral

model by determining the remaining coefficients in equations (21) and (22). We apply multiple

sinusoidal voltage inputs to the VCO, and use the simulation data in a least square fitting

procedure to fit these coefficients.

For simplicity, consider applying a single-tone sinusoidal input

u = v0 + vs cos(g0t) (21)

which can be rewritten in the complex exponential forrn:

vs (eJO~’ ) (22)U : V0 q- --~-. -t-e-~° ~

The output signal (instantaneous oscillation frequency) will contain a frequency component

which is at the same frequency of the input-voltage tone. However, due to circuit nonlinearities,

the output signal will also contain some harmonics of the input tone (possibly including a DC

term). By using circuit simulation and post-simulation processing, we express the output in terms

of first k harmonics of the input tone:

For our experiments in this paper we chose K = 3. Given the input and output expressions in (22)

and (23), their time derivatives can be readily computed, l~or instance, the first derivative of the

output is given as

Kje = Z Jka)o~keJk~°’ (24)

k=-K

Substituting the expressions of u, f and their derivatives into (21) and equating the coefficients

M harmonic components at the both side of equation, we have obtain the following set of

equations:

F(co)~ = ~(09) (25)

23

where ~ = [a~,az,a~,a4,...,au,...,a~,...~ is the vector of model parameters, F(co) is the coefficient

matrix given by

-

F(a)) = f12 (co)¯oo

f,~ (0~)

(26)

and g(@=[b°(@,bt(~o),b2(@,...,bM(w)~is the constant right l~and side¯ Note that there are M equations

in (26), one for each harmonic. Each entry in the coefficient matrix F(@ represents

contribution of the corresponding model parameter to a particular harmonic. For instance, f~ (~o)

determines the contribution of model parameter autO the DC component¯ Both the coefficient

matrix and the right hand vector are functions of input voltage frequency ~o. It should be noted

that some of model parameters may have been determined in the preceding static modeling step¯

The parameter values are substituted into (26) to determine the remaining parameters.

We determine the model parameters via optimization by applying N test inputs and setting up a

_b((ON

(27)

least square fitting problem as follows:

Although we only described how to set up a least square fitting by using single-tone input data, it

is also possible to incllude multi-tone simulation data in (27). However, our experiments have

shown that using single-tone test data is generally safficient.

24

Implementation

Since our generic model template abstracts the VCO behavior in terms of the input voltage

output and the oscillation frequency as well as its distortions, a post-simulation processing step is

needed to convert the actual signal waveforms into quantities used in the model. This processing

step is described as follows.

For a particular training input such as the one shown in Fig. 13 (a), we obtain the output

frequency vs. time relationship from the output voltage-domain waveform using the zero crossing

time or by using other techniques [14]. Since the VCO oscillation frequency is much higher than

the voltage input, the instantaneous oscillation frequency can be obtained by averaging the zero

crossing times over several consecutive periods. Once the output frequency vs. time relationship

is obtained (Fig. 13(c)), an FFT is applied to identify various frequency components in the

output signal (which is also a frequency signal). As such, the output frequency signal is expressed

in the form of (24), as shown in Fig. 13(d). In other words, the above processing step translates

the actual response w~tveforms to the behavioral level representations used in our model.

f

V

w 2w 3wW

four

Fig. 13. ((a)-(d) in clockwise direction) Simulation data extraction.

25

Results

We used the LC oscillator type VCO shown in Fig. 14 for testing our methodology, the

specifications for which are shown in Table. 1. We fitted the static nonlinear curve using the

simulation data extrac~Led from SpectreRF, followed by :fitting the VCO dynamics model

template, and then compared the results with SpectreRF simulations. We further expressed our

macromodel in Verilog-A.

-+-

Fig. 14. Static nonlinear behavior of a VCO.

Technology TSMC 0.25 um

Power Supply 2.5 V

Center Frequency 2.38 Ghz

Tuning Range 2.33 - 2.43 Ghz

Power 3 mW

Consumption

VCO gain 100 Mhz/V

Table.1. VCO specifications

26.

Static modeling

The data-points for fitting the static nonlinearities are obtained by sweeping the input control

voltage of the LC oscillator and measuring the frequency of the output waveform at each dc

control voltage. The nonlinear relationship between the output frequency and input control

voltage is fitted by a template containing only 3rd order terms as well as a template containing

only 4th order terms:

allU + a21u2 + a31u3 + a41bt4 (28)f4th -- 1 -t- a23bt + a33b/2 d- a43u3

The two static models are compared with the simulation data in Fig. 15. The relative modeling

errors are shown in Fig. 16. As can be seen in the figure, both models are very accurate, with the

largest error less than 0.06% for a wide range of the control voltage.

x 1092.44

2.42

N 2.4

~- 2.38

1.1_ 2.36

2.34

2.32

3rd order LS fit~

-- 4th order LS fit~

I I I

0.5 1 1.5 2

Vctrl(V)2.5

Fig. 15. Static nonlinearity fitted with 3rd order and 4th order templates.

27

0.063rd order static model

--- 4th order static model0.05

°~ 0.04

~0.03

g

0.01

020.5 1 1.5 2.5

Vctrl(V)

Fig. 16. Percentage error in frequency for 3rd order and 4th order static models.

For this reason, we chose a 3rd order static mode~ without sacrificing too much accuracy with

respect to the actual simulation results.

28

Dynamic modeling

The datapoints for fitting the coefficients corresponding to the dynamics are obtained by

applying multiple single-tone simulations at a fixed bias point, small amplitude (50-200mV) and

frequencies much smaller than the operating frequency of the VCO. Following this, we extracted

the changing-frequency vs. time characteristics for each of the datapoints using the zero-crossing

times.

For example, we applied sinusoids with amplitude of 200mV and input frequencies ranging

from 1 to 10 MHz at a dc bias point of 1.4V at the input of the VCO. We used the resulting data

to fit the VCO model, and applied test inputs to verify the results with Spectre simulation. Fig. 17

shows the comparison between the original frequency waveform extracted from SpectreRF

simulation for a test input sinusoid biased at 1.6V with a 50mV amplitude and 50MHz frequency.

The frequency waveform re-constructed using the first 3 input harmonics, the output frequency

reported by the model containing static terms only, and the output frequency reported by the

dynamic model are shown in the figure. One can observe the error incurred with the static model,

and the accurate matching of the 3-harmonic mode[ as compared to the transistor-level

simulation.

We further incorporated the static and dynamic behavioral template in Verilog-A. The

comparison between the simulation results obtained from the transistor level SpectrRF simulation

and the Verilog-A m,odel simulation results for a single-tone inputt (Fig 18) and multiple tone

inputs~ (Fig 19) shows that the dynamic model is extremely accurate while offering 3 orders

magnitude speedup as compared with the transistor-level simulation. Most importantly, this

speedup is even more significant when considered in the context of a much larger simulation (e.g.

the complete PLL) which is forced to take small timesteps at all nodes to accommodate the

nonlinear dynamic behavior of the VCO.

29

x 1092.404 ~ ~ ~

2.402

2,4

~ 2.398O¢..

~- 2.396

2.394

2.392

original- re-constructed using 3 harmonics

static + dynamics modelstatic model

2.39 ~ ~ ~ ~ ~ L0 0.1 0.2 0.3 0.4 0.5 0.6

Time (sec)0.7 0.8 0.9

x 10-7Test input : V = 1.6 + 0.05*sin(2*pi*(10 Mhz)*t)

Fig. 17. Comparison of VCO static and dynamic model with SpectreRF simulation.

x 1092.4

2.39

2.37

2.36

2.35

2.34

....... spectreRF simulation

..... vedlog-A dynamic modelvedlog-A static model

2"330 5~0 200 250100 150]]me (ns)

Test input : V = 1.4 + 0.05sin(2*pi*(10Mhz)*t)

Fig. 18. Comparison of Verilog-A model results with SpectreRF simulation: Single-tone test

3O

Test input : V = 1.4 + 0.05sin(2*p~*(10Mhz)*t)

Test input" V = 1.4 + 0.05sin(2*pi*(TMhz)*t) + 0.05sin(2*pi*(10Mhz)*t)

x 1092.41

2.4

2.39

2.38

2.37

2.36

2.35 -

2.34 t

2.33 =0 100

Verilog-A dynamic model-- SpectreRF simulation

200 300 400 500 600 700 800"rime (ns)

Test input : V = 1.4. + 0.05sin(2*pi*(7Mhz)*t) + 0.05sin(2*pi*(10Mhz)*t)

1000

Fig. 19. Comparison of Verilog-A model results with SpectreRF simulation: Multi-tone test

31

Conclusions

In the first part of this work, we presented a methodology for generating analog circuit

macromodels of weakly nonlinear circuits from the transistor-level netlists. This methodology can

be applied to a broad range of time-invariant and time-varying weakly nonlinear circuits. The

macromodels generated using this methodology are characterized using efficient numerical fitting

of simulation data and model order reduction techniques Our experimental results have shown

that the macromodels offer significant decrease in model size with comparable accuracy to full

transistor- level simulation in Hspice.

In the second part of the work, we proposed a novel behavioral VCO model which is capable of

capturing both the static and dynamic behaviors. Our model relates the input voltage directly with

the output frequency leading to much improved efficiency in simulation. The model configuration

is completely generic and can be applied to multiple VCO architectures. Our experiments have

shown that the model is sufficiently accurate tbr a LC oscillator designed in TSMC 0.25um

technology. This model has been implemented in Verilog-A and can be readily adopted for

system-level simulation of PLLs.

32

References

[4] R. Batra, P. Li,,

Macromodeling",

Conference 2004

[1] P. Li and L. Pileggi, "NORM: compact model order reduction of weakly nonlinear systems,"

in Proceedings of ACM/IEEE DAC, 2003.

[2] P. Li and L. Pileggi, "Modeling Nonlinear Communication IC’s using a Multivariate

Formulation" in BMAS workshop 2003.

[3] P. Li, X. Li, Y. Xu and L. Pileggi, "A hybrid approach to nonlinear macromodel generation

for time-varying analog circuits" in Proceedings of ACM/ICCAD, 2003.

L. Pileggi and Y.-T. Chien., "A Methodology for Analog Circuit

in IEEE International Behavioral Modeling and Simulation (BMAS)

[5] W. Sansen and P. Wambacq, "Distortion Analysis of Analog Integrated Circuits", Kluwer

Academic Publishers, 1998.

[6] J. Vuolevi and T. Rahkonen, "Distortion in RF Power Amplifiers", Artech House, 2003.

[7] Y. Tsividis, "Operation and Modeling of the MOS Transistor", McGraw-Hill, 1999.

[8] Hspice User’s Manual, Pg. 3-24, Version I, 1996

[9] J. Roychowdhury, "Reduced-order modeling of time-varying systems", IEEE Trans. Circuits

and Systems II: Analog and Digital Signal Processing, vol. 46, no. 10, Oct. 1999.

[10] R. Batra, P. Li, L. Pileggi and W.-J. Chiang, "A Behavioral Level Approach for Nonlinear

Dynamic Modeling of Voltage-Controlled Oscillators", IEEE Custom Integrated Circuits

Conference (CICC), 2005

[11] A. Demir, E. Liu, A. Sangiovanni-Vincentelli, I. Vassiliou, "Behavi6ral Simulation

Techniques for Phase/Delay-Locked Systems", IEEE CICC, 1994

[12] A. Demir, A. Sangiovanni-Vincentelli,"Simulation and Modeling of Phase Noise in Open-

Loop Oscillators", IEEE CICC, 1996

[13] B. De Smedt, G. Gielen, "Nonlinear Behavioral Modeling and Phase Noise Evaluation in

33

Phase Locked Loops", IEEE CICC, 1998

[14] B. De Smedt, G. Gielen, "Models for Systematic Design and Verification of Frequency

Synthesizers", IEEE Transactions on Circuits and Systems - II, Vol. 46, No. 10, October

1999

[15] A. Costantini, C. Florian, G. Vannini, "VCO Behavioral Modeling based on the Nonlinear

Integral Approach", IEEE ISCAS, 2002

[16] A. Buonomo, A. Lo Schiavo, "Analyzing the Dynamic Behavior of Oscillators", IEEE

Transactions on Circuits and Systems - I, Vol. 49, No. 11, November 2002

[17] K. Kundert, "Predicting the Phase Noise and Jitter of PLL-based Frequency Synthesizers",

http://www.designers-guide.org, Ver 4b, November 2003

[18] T.H. Lee, A. Hajimiri, "Oscillator Phase Noise: A Tutorial", IEEE JSSC, Vol. 25, No. 3,

March 2000

[19] A. Demir, A. Mehrotra, J, Roychowdhury, "Phase-Noise in Oscillators: A Unifying Theory

and Numerical Methods for Characterization", IEEE Transactions on Circuits and Systems -

I, Vol. 47, No. 5, May 2000

[20] A. Demir, J, Roychowdhury, "A Reliable and Efficient Procedure for Oscillator PPV

Computation, With Phase Noise Macromodeling Applications", IEEE Transactions on

Computer-Aided Design, Vol. 22, No. 2, February 2003

[21] X. Lai, J. Roychowdhury, "Automated Oscillator Macromodelling Techniques for Capturing

Amplitude Variations and Injection Locking", IEEE ICCAD 2004

[22] X. Lai, J. Roychowdhury, "Fast, accurate prediction of PLL jitter induced by power grid

noise", IEEE CICC 2004

[23] "Affirma Spectre Simulator User Guide", Ver 4.4.6, 2000.

34