Assembly Language Coding(ALC) Part 3

IBM Mainframe Assembler Language Coding

The Load Address Instruction

The Load Address instruction places the effective address specified by the 2nd operand into the register designated bythe 1st operand.

Formats:

LA R1,S2

The effective address represented in implicit form by S2 is placed into the register specified as the R1 field.

LA R1,S2(X2)

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The effective address computed by adding the index register value that is in operand X2 to the addressrepresented in implicit form by operand S2, is placedin the register specified as R1.

LA R1,D2(X2,B2)

The effective address computed by adding the displacementoperand, D2, to the value of the index operand, X2, and theaddress in the B2 operand, is placed in the register specifiedas the R1 operand.

Note:In the 24-bit addressing mode, the address is placed in bit positions 8-31 of the R1 register and bits 0-7 are set to zeros.In the 31-bit addressing mode, the address is placed in bitpositions 1-31 and bit 0 is set to zero.


Load Address Example

LA R7,DATA

(Assume DATA begins at address 5800)

Reg 7 before: DATA before:

FF FF FF FF 00 00 32 40

Reg 7 after: DATA after:

132

00 00 58 00 00 00 32 40



LA R4,2(R0,R6)

or

LA R4,2(,R6)

Reg 4 before: Reg 6 before:

If the index register or base register is zero then its value isassumed to be zero (in other words NO register is specified).

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Reg 4 before: Reg 6 before:

1F AC 41 00 00 00 48 00

Reg 4 after: Reg 6 after:

00 00 48 02 00 00 48 00



LA R6,10(R0,R0)

or

LA R6,10

The LA instruction can be used to initialize a register with apositive binary number up to 4095 (decimal) specified in the D2 field and with the X2 and B2 fields set to zero.

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Reg 6 before: Reg 6 after:

00 43 28 E0 00 00 00 0A



The LA instruction can also be used to increment a register (exceptregister 0) with a positive binary number up to 4095 (decimal)specified in the D2 field. The register to be incremented should be designated by R1 and by X2 (with B2 set to zero) or B2 (with X2 setto zero).

LA R6,10(R6,R0)

or

LA R6,10(R0,R6)


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00 00 00 0A 00 00 00 14

In the 24-bit addressing mode, the right-most 24 bits of the sum are retained.The left-most 8 bits are set to zero. In the 31-bit addressing mode, the right-most 31 bits of the sum are retained. The left-most bit is set to zero.

Two factors should be considered in using this method to increment a register.

1. If overflow occurs, it is lost.

2. If the original value in the R1 register is a negative signed binarynumber, the sign bit (bit 0) of the result will always indicate positivewhether in 24-bit or 31-bit addressing mode.



LA R7,DATA(R6)

(Assume DATA begins at address 5800)


00 00 00 00 00 00 58 40


00 00 00 40 00 00 00 40

136

00 00 00 40 00 00 00 40

DATA before: DATA after:

00 00 32 40 00 00 32 40



TAG1 EQU 12

LA R6,TAG1


00 65 FA C0 00 00 00 0C

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Load Fullword

L R7,WORD

Reg 7 before: WORD before:

00 32 11 FF 00 00 01 40

Reg 7 after: WORD after:

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00 00 01 40 00 00 01 40


Branch on Count

BCTR - R1,R2 (RR format)

BCT - R1,D2(X2,B2) (RX format)

When a Branch on Count instruction is executed, two things take place, in this order:

1. A positive 1 is algebraically subtracted from the register designated by the first operand, R1, and the result is placed into that register.

2. Then the result obtained is tested to see if it is zero. If it is

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2. Then the result obtained is tested to see if it is zero. If it is not zero, a branch is made to the address designated by the second operand. However, if the result is zero, no branch is made; instead execution proceeds at the instruction that immediately follows the Branch on Count instruction.

Counting is performed without branching when the R2 field in the RR format contains a zero.

BCTs are most commonly used for loop control. See the example on the next page.


START EQU *

LA R4,STRING

LA R5,LENGTH

LTR R5,R5

BNP BYPASS

COMPARE EQU *

CLI 0(R4),C'!'

BNE NEXT

MVI 0(R4),C'.'

NEXT EQU *

LA R4,1(R4)

Branch on Count

140

LA R4,1(R4)

BCT R5,COMPARE

BYPASS EQU *

.

(STRING is in a workblock - not in the program.)

(Presume it contains the character data as shown.)

STRING DS C'TEST! WILL IT WORK? YES!'

LENGTH EQU *-STRING

last updated 12/29/99


Length Attribute

Every symbolic tag or label has a length assigned when the programis assembled. The length is assigned by the assembler to generate the length portion of an instruction. This implicit length attributecan be referenced in the program by using L'.

Example:DATA DS CL8

FIELD DS CL4

To move FIELD to the first 4 bytes of DATA you could code:

MVC DATA(4),FIELD without L'

MVC DATA(L'FIELD),FIELD with L'

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To load the length of a field into a register:

LA R2,L'FIELD

Using L' to loop through a table:

LA R14,TABLE

LA R15,100

LOOP EQU *-

-

LA R14,L'TABLE(R14)

BCT R15,LOOP-

-

TABLE DS 0CL10

CODE DS CL4

AMT DS PL4

RATE DS PL2

DS 99CL10



Program Definition

START - The START instruction is used to initiate thefirst or only control section of a source module.If used it must be the first instruction of thesource module.

CSECT - The CSECT instruction initiates an executablecontrol section or indicates the continuationof an executable control section. In otherwords, it is the program object code.

In TPF there is only one control section. During the assemblyprocess your program is known to the Assembler as a control

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process your program is known to the Assembler as a controlsection named $IS$.

$IS$ START

Your code

-

-

END

The START and the CSECT are generated automatically for you.


The Program USING Statement

Establishing a program base register.

3 prerequisites in designating and loading the base register:

• Inform the Assembler which general register is to be thebase register (USING statement).

• Inform the Assembler of the address to be used as theassumed or promised base address (USING statement).

• Code the instruction that will load the designated register with the base address at program executiontime. (This is done automatically in TPF.)

• The USING statement associates a particular register with aparticular layout of data (in this case, a CSECT). It generatesno object code whatsoever. It is not executable code. However,

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no object code whatsoever. It is not executable code. However,it must be used in conjunction with code that loads a base register(e.g. LA, L, BASR, etc).

Most often the layout of data is through a DSECT (covered later) or withinan actual program.

Example: {Symbol} USING BASE,REG

To load and assign the base register of a program:

BASR R8,0

USING *,R8

This might be the sequence of instructions if you had to establish andload the program base register. In TPF all of this is accomplished foryou automatically - for every program.


Branch and Save

BASR - R1,R2 (RR format)

BAS - R1,D2(X2,B2) (RX format)

The absolute (memory) address of the instruction that follows the "BAS" instruction is loaded (as link information) in the general register designated as R1. Then, an unconditional branch to the address designated by the second operand takes place.

In the RX format, the second operand address is used as the branch address. In the RR format, the contents of the general

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branch address. In the RR format, the contents of the general register designated by R2 is used to generate the branch address. However, when the R2 field contains zero, the operation is performed without branching.

The branch address is computed before the link information is loaded. In the 24-bit addressing mode, the link information consists of a 24-bit instruction address with eight zeros appended on the left. In the 31-bit addressing mode, the link information consists of a 31-bit address with a one appended on the left.

The primary use of these instructions is for 'transportation'; to allow your program to access a subroutine and return. In non TPF systems the BAS might be used to load a program base register.


Branch and Link

BALR - R1,R2 (RR format)

BAL - R1,D2(X2,B2) (RX format)

The absolute address of the instruction that follows the "BAL" instruction is loaded as link information in the general register designated as R1. Then an unconditional branch to the address designated by the second operand takes place.

In the RX instruction format, the second operand address is used as the branch address. In the RR format, the contents of the general register designated by R2 are used to generate the

145

the general register designated by R2 are used to generate the branch address. However, when the R2 field contains a zero, the operation is performed without branching.

The branch address is computed before the link information is loaded. The link information in the 24-bit addressing mode consists of the instruction-length code, the condition code, the program mask bits, the updated instruction address. In the 31-bit addressing mode, the link information consists of the address-mode bit (always a one) and a 31-bit updated instruction address.

It is recommended that the Branch and Save (BAS and BASR) be used and Branch and Link be avoided. The only exception is if the program is actually using the ILC, CC or Program Mask Bits (in which case it must run in 24 bit mode).


The Dummy Control Section - DSECT

The DSECT instruction allows you to initiate a Dummy ControlSection or to indicate its continuation. A DSECT is a reference control section that allows you to describe the layout of datain a storage area without actually reserving any storage.

Thus you can write a sequence of Assembler language statementsto describe the layout of data located outside of your program.

No constants (DC's) are allowed within a DSECT. DS statementsare typically used. The ORG statement is permitted. A newlocation counter, set to zero, is established for each DSECT.Therefore, all data areas described in each DSECT are relative tozero.

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zero.


The Dummy Control Section - DSECT

To use a DSECT you must:

1. Reserve a storage area for the data.2. Ensure that the data is loaded into the area at

execution time.3. Assign a unique symbol (name) to each DSECT.4. Ensure that each symbolic label in the DSECT is

unique in the entire program source file.5. Ensure that the locations of the symbolic labels in

the DSECT actually correspond to the locations ofthe data being described.

6. Ensure that each DSECT is terminated with either:A. another DSECT, or

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A. another DSECT, orB. a CSECT statement, orC. an END statement.

7. Establish addressability to the reserved storage area.

then you can -

8. Refer to the data described in the DSECT symbolically.


Program Definition Terminology

START - The START instruction is used to initiate thefirst or only control section of a source module.If used it must be the first instruction of thesource module.

CSECT - The CSECT instruction initiates an executablecontrol section or indicates the continuationof an executable control section. In otherwords, it is the program itself.

DSECT - The DSECT instruction initiates a Dummy Control Section or indicates it's continuation.It is a reference control section that allows you

148

It is a reference control section that allows youto describe the layout of data without actuallyreserving any storage.


Program Definition Examples

$IS$ START

-

-

-

OUTPUT DSECT

-

-

-

$IS$ CSECT

-

-

149

-

-

END


The DSECT USING Statement

Establishing a DSECT base register.

3 prerequisites in designating and loading the base register:

• Inform the Assembler which general register is to be thebase register (USING statement).

• Inform the Assembler which DSECT is to be associated withthe general register (USING statement).

• Code the instruction that will load the designated register with the base address of the data at program execution time.

• The USING statement associates a particular register with aparticular layout of data (in this case, a DSECT). It generatesno object code whatsoever. It is not executable code.However, it must be used in conjunction with code that loads a

150

However, it must be used in conjunction with code that loads abase register (e.g. LA, L, etc).

Example: {Symbol} USING DSECT NAME,REG

L R4,CE1CR0

USING INPUT,R4

(You can use symbolic labelsin the INPUT DSECT after this point in your program.)-

-


The DROP Statement - Dropping a Base Register

The DROP instruction is necessary when you wish to usea base register for a different DSECT or whenever two USING statement ranges coincide or overlap. DROP frees the baseregister for other purposes. It breaks the associationestablished by the USING.

Format: {Symbol} DROP REG1,{REG2, ....}

Example:

USING INPUT,R4

-

-

151

-

-

-

DROP R4

(You can no longer refer to symbolic

names in the INPUT DSECT.)

LA R4,EBW000

USING OUTPUT,R4

(You can now start using symbolic labels

in the OUTPUT DSECT.)


Example of a DROP Statement

Consequences of not using the DROP if base registers overlap.

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

-

-

-

00000 68 USING RECORL,R4

00002E 1841 0000C 69 LR R4,R1

000030 D202 4028 402B 00028 0002B 70 MVC LEG8,CTY8

71 *


000036 1831 73 LR R3,R1

000038 D202 4028 402B 00028 0002B 74 MVC LEG8,CTY8

75 *


00003E 1851 77 LR R5,R1

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00003E 1851 77 LR R5,R1

000040 D202 5028 502B 00028 0002B 78 MVC LEG8,CTY8

79 *

-

-

-

(Note changes to the base registers in the object code.)


Define Storage

{Label} DS {D} T {Ln}

Where:{Label} - optional Identifier or nameDS - required symbol{D} - optional duplication factorT - data type (B, C, Z, P, H, F, D, X){Ln} - length

A DS requests that a number of bytes be reserved for a field.

DS statements are usually coded for the purpose of reserving

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DS statements are usually coded for the purpose of reservingworking storage.

No data is placed in the field, but you can put data withinquotes for self-documentation purposes.

STATE DS CL10'STATE'

The Assembler will assign a correct length to be associated withthe label. In the example above, the length will be 10. In thefollowing example, the length of STATE2 will be 18.

STATE2 DS C'WHAT IS THE LENGTH'

No machine language instructions are generated. The locationcounter may be adjusted but no object code is generated.

Allowable length of 32K.


Define Storage Example

Input Record

INPUT DS 0CL80

NAME DS CL10

EMPNO DS CL5

ADDR DS CL25

HRS DS CL2

DATE DS 0CL6

MONTH DS CL2

DAY DS CL2

YEAR DS CL2

FILLER DS CL32

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Zero Duplication Factor

The Zero Duplication Factor reserves no bytes of storage.Alignment is on the desired boundary. A length is assignedto the label. It allows you to provide a label for an area ofstorage and fields within that area (as above). It allows forthe re-defining of storage.

Some programmers, for 'branch to' labels, use:

PARTY DS 0H

instead of:

PARTY EQU *


PACK PWORK,=C'5' 5% TAX RATE

CVB R4,PWORK FOR MATH

.

.

PWORK DS D (DEFINED IN A WORK AREA)

PWORK BEFORE PACK INSTRUCTION

????????????????

Define Storage - Doubleword

155

????????????????

PWORK AFTER PACK INSTRUCTION

000000000000005F

REGISTER 4 AFTER CVB INSTRUCTION

00000005



The ORG Statement

The ORG statement is used to alter the setting of the location counterand thus controls the structure of the current control section. Like the“zero duplication factor”, the ORG statement allows for the “re-defining”of portions of a control section.

INPUT DS CL80

ORG INPUT

NAME DS CL10

EMPNO DS CL5

ORG *+5

ADDR DS CL24

HRS DS CL2

ORG *+8

156

DATE DS CL6

ORG DATE

DAY DS CL2

MONTH DS CL2

YEAR DS CL2

ORG

0.........1.........2.........3.........4.........5.........6..

INPUT

NAME EMPNO ADDR HRS DATE

DAY

MONTH

YEAR


ORG Examples

Layout of DATA1, DATA2,DATA3:

0.........1.........2.........3.........4.........5.........6

CODE

DATA1 DATA2 DATA3

Layout of FIELD1, FIELD2, FIELD3:

0.........1.........2.........3.........4.........5.........6

CODE

FIELD1 FIELD2 FIELD3

Contents of CODE determine whether to use DATAx orFIELDx labels.

157

FIELDx labels.

Two different ways to write the overlay:

INAREA DS 0CL60 INAREA DS 0CL60

CODE DS CL1 CODE DS CL1

DATA1 DS 0CL10 DATA1 DS CL10

FIELD1 DS CL8 DATA2 DS CL15

FIELD2 DS 0CL12 DATA3 DS CL34

DS CL2 ORG INAREA

DATA2 DS 0CL15 DS CL1

DS CL10 FIELD1 DS CL8

FIELD3 DS 0CL20 FIELD2 DS CL12

DS CL5 FIELD3 DS CL20

DATA3 DS CL34 ORG


Example of a Null ORG

A null ORG is important in order to reset the location counter to the nextavailable location in the control section after an ORG has been used tochange it. (As when redefining a field.)

Null ORG used:

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT000000 1 OUTPUT DS 0CL133000000 2 CNTL DS CL1000001 3 DS CL5000006 4 AREA1 DS CL15000015 5 DS CL500001A 6 AREA2 DS CL15000029 7 DS CL500002E 8 AREA3 DS CL1500003D 9 DS CL72000085 00001 10 ORG OUTPUT+1000001 11 DS CL10

158

000001 11 DS CL1000000B 12 REACH1 DS CL10000015 13 DS CL500001A 14 REACH2 DS CL10000024 00085 15 ORG000085 C4D6E4C7 16 NAME DC 'DOUG'

17 END

Null ORG not used:

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT000000 1 OUTPUT DS 0CL133000000 2 CNTL DS CL1000001 3 DS CL5000006 4 AREA1 DS CL15000015 5 DS CL500001A 6 AREA2 DS CL15000029 7 DS CL500002E 8 AREA3 DS CL1500003D 9 DS CL72000085 00001 10 ORG OUTPUT+1000001 11 DS CL1000000B 12 REACH1 DS CL10000015 13 DS CL500001A 14 REACH2 DS CL10000024 C4D6E4C7 15 NAME DC 'DOUG'

16 END


Example of a DSECT

BEGIN NAME=ZOO1,VERSION=XX

$IS$ START (Remember - you do NOT code this.)

INREC DSECT INPUT RECORD STORAGE AREA

LASTNAME DS CL10 LAST NAME OF PASSENGER

FLTNUM DS CL3 FLIGHT NUMBER

FILL1 DS CL1 UNUSED SPACE

LUGCNT DS CL1 LUGGAGE COUNT (NUMBER OF BAGS)


BASEPRC DS CL6 BASE TICKET PRICE


DISCNT DS CL2 TICKET DISCOUNT

FILL4 DS CL55 EXPANSION AREA

$IS$ CSECT

159

$IS$ CSECT

-

-

-

-

-

-

L R1,CE1CR0

LA R1,MI0ACC

USING INREC,R1

CLI LUGCNT,X'00' ANY BAGS?

-

-


DSECT Example - Effect on Location Counter

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

BEGIN NAME=...

* PERHAPS A COMMENT ..

000000 331 RECORD DSECT

000000 332 ID DS CL1

000001 333 INFO DS CL25

00001A 00001 334 ORG INFO

000001 335 DS CL1

000002 336 FLN DS CL4

000006 337 CLASS DS CL1

000007 338 DS CL1

000008 339 DATE DS CL5

00000D 340 DS CL1

00000E 341 ORIG DS CL3

000011 342 DEST DS CL3

000014 0001A 343 ORG

00001A 344 DS CL54

160

00001A 344 DS CL54

000008 345 $IS$ CSECT

346

000008 58109100 00100 347 L R1,CE1CR0

00000C 92409008 00008 348 MVI EBW000,X'40'

-

-

-


EXERCISE #6

PROGRAM 6.

DSECT

Re-code your latest "working" program with input

of [email protected]+ making the following changes -

Create the following DSECTS -

Input (to access any data from the input message)

Work (for any ECB intermediate data areas)

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Work (for any ECB intermediate data areas)

Output (for the display line area)

Name the dsects INPUT, WORK and OUTPUT

ALL labels in each dsect WILL begin with

I W or O in the respective dsect.

Your code may only use dsect labels you create

to access storage data AND instructions can NOT

use explicit lengths OR relative addressing.


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Boolean Operations - Altering Bits

There are three instructions in IBM 370 Assembly that alter bits: the Boolean operations "AND", "OR", and the "EXCLUSIVE OR". These three have the following in common:

1. They operate on two bit strings, each of the same length.

2. Only the target bit string is altered. The other bit string, the "mask", selects the bits to be altered. Each bit in the mask that is a 1 selects the correspondingly positioned bit in the target.

163

The Boolean operator "OR" sets the selected target bits to 1, regardless of the previous value. Bits not selected by the mask remain unchanged.

The Boolean operator "AND" preserves the value of the selected bits and sets the remaining bits to zero, regardless of their previous value.

The "EXCLUSIVE OR" operator reverses the value of the selected target bits. Unselected bits remain unchanged.


Boolean Operations - Altering Bits - Truth Table

0 1

0 0

0 1

0

1

0 1

0 1

1 1

0

1

"AND" Truth Table

"OR" Truth Table

164

0 1

0 1

1 0

0

1

"EXCLUSIVE OR" Truth Table


AND Fullword

N R4,SECOP

FO FO FO FO FF EE FF FO

Before

After

REG 4 SECOP

165

FO EO FO FO FF EE FF FO

After

REG 4 SECOP


AND Register

NR R4,R5

0A 0B 0C 0D F1 F2 F3 F4

Before

After

REG 4 REG 5

166

00 02 00 04 F1 F2 F3 F4

After

REG 4 REG 5


AND Character

NC SAVE,LETZ

F1 F2 F3 F4 C1 C2 C3

Before

SAVE LETZ

167

C1 C2 C3 ??

After

SAVE LETZ

C1 C2 C3 ??


AND Immediate

NI SAVE,X'C3'

CC FF FF FF C3

Before

After

SAVE Mask

168

C0 FF FF FF

SAVE Mask

C3


OR Register

OR R4,R5

0A 0B 0C 0D

Before

After

REG 4 REG 5

F1 F2 F3 F4

169

FB FB FF FD

REG 4 REG 5

F1 F2 F3 F4


OR Fullword

O R4,LIST

00 00 00 00

Before

After

REG 4 LIST

C1 C2 FF 33

170

C1 C2 FF 33

REG 4 LIST

C1 C2 FF 33


OR Immediate

OI SAVE,X'C3'

CC FF FF FF C3

Before

After

SAVE Mask

171

Example: L 5,Z 4 byte field - Z

CVD 5,BCD 8 byte field - BCD

UNPK SUM,BCD+6(2)

OI SUM+2,X'F0' 3 byte field - SUM

CF FF FF FF

SAVE Mask

C3


OR Character

OC SAVE(2),TWOS

F1 F2 F3 F4

Before

After

SAVE TWOS

C3 C4

172

F3 F6 F3 F4

After

SAVE TWOS

C3 C4


Exclusive OR

X R4,PLOT

F0 F0 F0 F0

Before

After

REG 4 PLOT

FF EE FF F0

173

0F 1E 0F 00

After

REG 4 PLOT

FF EE FF F0


Exclusive OR Register

XR R4,R5

0A 0B 0C 0D

Before

After

REG 4 REG 5

F1 F2 F3 F4

174

FB F9 FF F9

After

REG 4 REG 5

F1 F2 F3 F4


Exclusive OR Immediate

XI SAVE,X'C3'

CC FF FF FF C3

Before

After

SAVE Mask

175

0F FF FF FF

SAVE Mask

C3


Exclusive OR Character

XC SAVE,SAVE

F1 F2 F3 F4

Before

After

SAVE

176

00 00 00 00

After

SAVE


Test Under Mask - TM

TM D1(B1),I2

The Test Under Mask instruction tests any subset of the 8 bits in a byte. The target byte can be located in any addressable memory location. The bits to be tested are designated within the mask. The mask is always the 2nd operand.

Each 1 bit in the mask selects that corresponding (position) bit in the target to be tested. The results obtained indicate whether tested bits were "on" (equal to 1), or "off" (equal to zero).

177

TM SAVE,X'33'

FF F1 F2 F3

SAVE

MASK VALUE: 0011 0011

RESULT: xx11 xx11

CC = 3


Define Constant - Zoned Decimal Data

ZONED1 DC Z'543'

ZONED1

ZONED2 DC Z'-123'

ZONED2

ZONED3 DC ZL4'+12'

F1 F2 D3

F5 F4 C3

178

ZONED3 DC ZL4'+12'

ZONED3

ZONED4 DC ZL2'19,-78,963,+3'

ZONED4

F0 F0 F1 C2

F1 C9 F7 D8

F6 C3 F0 C3


Move Numerics

This instruction copies only the right-most 4 bits of each of thedesignated bytes of the source fields into the destination fields.The left-most 4 bits are not altered.

Format: MVN D1(L1,B1),D2(B2)

SAVE DS P'-135792' (presume contents

shown)

MVN SAVE+3(1),=P'1'

SAVE before:

179

SAVE before:

01 35 79 2D

SAVE after:

01 35 79 2C


The Execute Instruction

EX R1,D2(X2,B2)

The Execute instruction will, at run time, cause the CPU to execute another instruction, called the target instruction, located at the address given in the second operand field. One of the main uses of the EX instruction depends upon its capability for effectively changing the second byte (bits 8-15) of the target instruction.

This capability makes it possible to vary the length field contents of SS instructions and to vary the mask field contents of certain RS and SI instructions.

180

Bits 8-15 of the instruction designated by the branch address are OR'ed with bits 24-31 of the register specified by R1, except when register zero is specified, which indicates that no modification takes place. The OR'ing does not change either the contents of the register specified by R1 or the instruction in memory, and it is effective only for the interpretation of the instruction to be executed.

Example: SH R6,=H'1'

EX R6,MOVE

.

.

B AROUND

MOVE MVC 0(0,R5),0(R7)

AROUND EQU *

.


The Execute Instruction

An alternative way to code the 'target' instruction -

(Always moves 1 character before the executed move.).

.


BCTR R6,R0

EX R6,MOVE

.

.

The preferred way to code the 'target' instruction -

181

The preferred way to code the 'target' instruction -

BCTR R6,R0

EX R6,MOVE

.

.

.

* DEFINE CONSTANTS

.


.

.


182


EXERCISE #7.

PROGRAM 7.

Handling variable length data.

Input: 4 variable length fields delineated

by a / or EOM(+).

b@x/x/x/x+

x = 1 to n characters (max input

message length = 58 characters).

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Process: Isolate each of the 4 fields, categorize each

field and display each field on a separate

line followed by the category type (field is

typed by the first character in the field).

Categories: A-I = CATEGORY 1

J-R = CATEGORY 2

S-Z = CATEGORY 3

0-9 = NUMERICS

Output: field1inputdata category

field2inputdata category

.

.


184


Define Constant - Packed Decimal Data

DIGIT DIGIT DIGIT DIGIT DIGIT SIGN

PACKED1 DC PL3'123'

PACKED1 00 12 3C

185


Define Constant - Packed Decimal Data

PACKED1 DC P'123'

PACKED1

PACKED2 DC P'-12'

PACKED2

PACKED3 DC PL4'-20'

12 3C

01 2D

186

PACKED3 DC PL4'-20'

PACKED3

PACKED4 DC PL2'1234'

PACKED4

PACKED5 DC 2P'-12'

PACKED5

00 00 02 0D

23 4C

01 2D 01 2D


Add Packed Decimal

AP D1(L1,B1),D2(L2,B2)

The Add Packed Decimal instruction performs the following:

1. The second operand (defined by its address) is added to the first operand (defined by its address).

2. Both operands must be in Packed Decimal format.

3. The sum is placed at the first operand location.

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4. The condition code is set to 0, 1, 2 when the sum is zero, negative or positive respectively.

5. The length of the first operand must be enough to contain all the significant digits of the result and its sign. If not, an overflow condition will exist (CC = 3) and important data will be lost or corrupted, and the program will continue execution.


Add Packed Decimal

00 80 5C

Before

19 9C

19 9C01 00 4C

After

FLDA FLDB

AP FLDA,FLDB

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19 9C01 00 4C

FLDAFLDB

CC = ________


Add Packed Decimal

AP FLDC,FLDE

Before

After

FLDC FLDE

00 14 0D 01 0C

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FLDC FLDE

CC = ________

00 13 0D 01 0C


Add Packed Decimal

AP FLDX,FLDY

Before

After

FLDX FLDY

84 32 1C 42 11 1C

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FLDX FLDY

CC = ________

26 43 2C 42 11 1C


Subtract Packed Decimal

SP D1(L1,B1),D2(L2,B2)

The Subtract Packed Decimal instruction performs the following:

1. The second operand (defined by its address) is subtracted from the first operand (defined by its address).

2. Both operands must be in Packed Decimal format.

3. The result is placed at the first operand location.

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4. The condition code is set to 0, 1, 2 when the sum is zero, negative or positive respectively.

5. The length of the first operand must be enough to contain all the significant digits of the result and its sign. If not, an overflow condition will exist (CC = 3) and important data will be lost or corrupted, and the program will continue execution.



SP FLDA,FLDB

Before

After

FLDA FLDB

00 80 5C

00 60 6C

19 9C

19 9C

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FLDA FLDB

CC = ________



SP FLDA,FLDA

Before

After

FLDA

00 80 5C

00 00 0C

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FLDA

CC = ________

00 00 0C


Zero and Add Packed Decimal

ZAP D1(L1,B1),D2(L2,B2)

This instruction copies a packed decimal number from one memory location to another; padding with zeros takes place as necessary on the high-order end of the operand.

The condition code is set according to whether the result was zero, positive or negative. Overflow will occur if significant digits are lost; an overflow willl be signified by CC = 3, important data will be lost or corrupted and the program will continue execution.

194last updated 7/28/99


Zero and Add Packed Decimal

ZAP RESULT,PACKED

Before

After

RESULT PACKED

F0 F0 F0 F0 01 23 45 6C

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RESULT PACKED

01 23 45 6C 01 23 45 6C


Multiply Packed Decimal

MP D1(L1,B1),D2(L2,B2)

MP MULTIPLICAND,MULTIPLIER

When the Multiply Packed instruction is executed, the number at the first operand location is multiplied by the number at the second operand location. The result replaces the multiplicand in memory, but the condition code is not set. (You can use the CP instruction to determine the sign of the number.)

Some rules:

1. The number of bytes in the multiplier must be less than the

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1. The number of bytes in the multiplier must be less than the number of bytes in the multiplicand (L2 < L1).

2. The number of bytes in the multiplier must not exceed 8

(1 <= L2 <= 8).

3. The multiplicand must have at least L2 bytes of leading zeros.

The number of bytes of the product (also the multiplicand) is equal to the sum of bytes in the multiplier and the multiplicand.

Multiplicand Multiplier

Multiplicand Length = Multiplicand + Multiplier

0 0 0 0 0 0 d d d d d S d d d d d S



MP A,B

Before

A B

After

00 00 65 43 21 0C 06 54 32 1C

00 00 00 00 01 0C 06 54 32 1C

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A B

00 00 65 43 21 0C 06 54 32 1C



MPCD DC P'12563'

MPLR DC P'21'

ZAP PROD,MPCD

MP PROD,MPLR

PROD DS CL5 (In a work block some place)

12 56 3C

02 1C

00 00 12 56 3C

00 02 63 82 3C

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PROD DS CL5 (In a work block some place)


Divide Packed Decimal

DP D1(L1,B1),D2(L2,B2)

DP DIVIDEND, DIVISOR

When the Divide Packed instruction is executed, the number at the first operand location is divided by the number at the second operand location. The result consists of two components: 1) "Q", the quotient, of length L1-L2 bytes; and 2) "R", the remainder, of length L2 bytes.

The quotient and remainder are stored side-by-side as packed decimal integers in the memory location that had been occupied by the dividend.

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The sign of the quotient is consistent with the rules of algebra. The sign of the remainder will be the same as the sign of the dividend.

Some rules:

1. The number of digits in the divisor must be less than the number of digits in the dividend, including leading zeros. (L2 < L1)

2. The number of digits in the divisor must be less than 16. (1 <= L2 <= 8 bytes)

3. The number of significant digits in the quotient must be smaller than the number of digits that can be stored in the L1 - L2 bytes allowed for the quotient. The dividend should have at least L2 bytes of leading zeros.

4. The divisor must not be zero.


DEND DC P'131'

DSOR DC P'2'

ZAP QREM,DEND

DP QREM,DSOR


13 1C

00 13 1C

2C

06 5C 1C

200

QREM DS CL3 (In a work block some place)



DEND DC PL4'999'

DSOR DC P'-998'

DP DEND,DSOR

What is wrong with this picture?

00 00 99 9C

99 8D

00 1D 00 1C

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DEND DS PL4'-10'

DSOR DC P'3'

DP DEND(4),DSOR(2)

What's wrong with this picture?

00 00 01 0D

00 3C

00 3D 00 1D

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(Presume DEND is in a work block with contents as shown.)

DEND DS P'999999'

DSOR DC P'01'

DP DEND,DSOR

Decimal divide exception occurs, execution terminates. Dividend does not have the required number of leading zeros.

09 99 99 9C

00 1C

99 9C 00 0C

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Dividend does not have the required number of leading zeros.


Compare Packed Decimal

CP D1(L1,B1),D2(L2,B2)

This instruction will algebraically compare two operands that are of equal or unequal length (as long as each operand is less than or equal to 16 bytes in length).

The condition code is set to 0 (operands equal), 1 (first operand low), or 2 (first operand high). Neither operand is changed by the instruction.

204


Compare Packed Decimal

CP A,B CC =

CP C,D CC =

A B

D E

C

F

01 24 3C

00 00 2C

00 00 03 4D

00 2C

01 24 3D

01 2D

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CP C,D CC =

CP E,F CC =

CP D,E CC =

CP B,C CC =


Shift and Round Packed Decimal

SRP D1(L1,B1),D2(B2),I3

SRP DATA,SHIFT-VALUE,ROUNDING-FACTOR

This instruction will round a packed decimal number and shift the digits the specified number of decimal places, either to the right or to the left.

The first operand specifies the location in memory of the number to be operated on. However, the number computed as the effective address from the second operand is not used as an address. Instead, its low order 6 bits denote the number of digits to be shifted and the direction of the shift; if the 6 bits are negative the shift will be to the right; if the 6

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of the shift; if the 6 bits are negative the shift will be to the right; if the 6 bits are positive, the shift will be to the left. The sign is not shifted and any vacated digit positions are zero filled.

Rounding occurs only during shifts to the right. However, the rounding factor must always be specified in the instruction. Before a right shift is completed, the rounding factor is added to the left-most digit to be shifted out.

For right shifts, the negative integer -N is assumed by the hardware to be in two's complement form. Since the assembler does not translate -N to its 6-bit two's complement representation, you should write 64-N rather than -N. See the examples on the following page.

On left shifts, 31 is the maximum number of digits that can be shifted. When shifting to the right, the maximum number is 32.


SRP AMT,4,5

SRP AMT,64-2,5


Before After

AMTAMT

00 00 19 65 4C 19 65 40 00 0C

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SRP AMT,64-2,5

Before After

AMT AMT

00 00 19 65 4C 00 00 00 19 7C



Before After

AMTAMT

78 53 97 5D 00 07 85 4D

SRP AMT,61,5

SRP AMT,2,0

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Before After

AMT AMT

01 0C 00 0C

SRP AMT,2,0

This last situation causes an overflow error condition. The CC is set to 3 and processing continues.


Move With Offset

This instruction copies data from one memory location toanother, but the result is shifted to the right to drop offunneeded insignificant digits. The length specified for thesecond operand represents the bytes to be preserved.

Format: MVO D1(L1,B1),D2(L2,B2)

SAVE DS PL4 contains P'1234567C'

MVO SAVE,SAVE(3)

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SAVE before:

12 34 56 7C

SAVE after:

01 23 45 6C


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Assembly Language Coding(ALC) Part 3

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