Architecture of Test Bench for the CISV module TE-MPE Technical Meeting

Architecture of Test Bench for the CISV module

TE-MPE Technical Meeting

Jakub Korczyc 1st November 2012

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I. CISV Module

II. General Test Bench concepta) Hardwareb) Software

III. Test Bench architecturea) Hardwareb) C (LabWindows) softwarec) FPGA firmware

IV. Test Bench capabilities

V. Test results

Plan

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• Part of the Safe Machine Parameters (SMP) system • Decodes 2 types of General Machine Timing (GMT)

frames• Flags frames are decoded to LEMO outputs• Energy frames are transmitted through VME

interface

CISV Module

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General Test Bench - hardware• Common PXI crate and cards for general functionality

• Custom made PCB for specific or time-crucial functionality

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General Test Bench - software• C code template with common GUI and functionality

• Excel file containing list of tests to run

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• PXI Crate + Power Supply + Test Controller Card + VME rack• TCC based on Spartan 3 FPGA

CISV Test Bench - hardware

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Main concept: • use PXI controller to generate test vectors and analyze

responses from the DUT• use Tester Control Card to pass on the data in time-

deterministic way

Test campaign:1. Generate all test vectors with time stamps. Sort them and

store them on disc2. Continuously send them to TCC. In the same time receive

DUT responses with time stamps and store them on disc3. Analyze stored responses

CISV Test Bench - C software

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Advantages:• All complexity moved from VHDL to C code• VHDL code stays generic and test independentDisadvantages:• Need for fast link between PXI and TCC

CISV Test Bench - C software

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• Main functionality: buffering and timing

CISV Test Bench - FPGA firmware

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What it can do:• Send frames with maximum GMT speed • Run for about 12 hours with time resolution of 10μs (one

frame takes 100 μs to send)• Test 228 frames (one frame is 32 bits - 16bits of header and

16bits of payload)• Record every energy frame• Record flags values which are stable for 200ns

What it can not do:• Test not crucial functionality accessible by VME, like history

buffer

Test Bench capabilities

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Tested:• All energy values (216)• All flags values (28)• All headers (216)• Fail-safe values

Observations:• After power up, the CISV may ignore first few frames. Time

between power up and receiving first frame does not matter.• There is 100 μs delay in putting flags values after receiving

the frame.• There is maximum 1ms delay in sending energy value after

receiving the frame.

Test results

More information can be found on the websitehttps://project-mitestbench.web.cern.ch