an_elnec_nand_schemes.pdf

8/14/2019 an_elnec_nand_schemes.pdf

1/20

NAND Flash Memories Application Note

NAND Flash Memories

Understanding NAND Flash Factory Pre-Programming

Schemes

Application Note

February 2009an_elnec_nand_schemes, version 1.00

ersion 1.00!02.2009 "a#e 1 o$ 20


2/20


NAND $lash technolo#y enables memory manu$acturers to produce memory devices %ith hi#h density at

lo% cost. From that reason, NAND $lash memories are very popular in various electronic e&uipments that need to

store a lar#e amount o$ data, such as music players, cameras, mobile phones, "DAs and many others.

'here are several important di$$erences bet%een (traditional) N*+ and NAND $lash memories, %idely

discussed throu#h %orld%ide%eb articles and $orums. 'he most evident one is the presence o$ invalid bloc-s inNAND $lash memory device. t means that not %hole device address ran#e can be used $or data stora#e. /ome

memory locations are de$ective and cannot be pro#rammed and read reliably. o%ever, these de$ective locations

dont a$$ect the reliability o$ the rest o$ memory device.

'here must various precautions been ta-en into account to cope %ith that de$ective locations, already in

development phase o$ the tar#et product. 'he set o$ such precautions can be called prepro#rammin# scheme3.

'his application note tries to e4plain all aspects o$ NAND $lash $actory prepro#rammin#. "lease, read it care$ully

be$ore you contact us as and as- $or special support $or your NAND $lash pro5ect. t %ill help you to provide us %ith

all in$ormation that %e need $or success$ul implementation, in e4act and accurate $orm. 'his %ill help us to

implement your needs in as short time as possible, that %ill $urther reduce your preproduction costs.

ersion 1.00!02.2009 "a#e 2 o$ 20


3/20


A brief introduction to NAND flash

'he $lash memory %as invented by Dr. Fu5io Masuo-a in 1967, %hen %or-in# $or 'oshiba. ntel %as the

$irst %ho has reco#nised massive potential o$ ne% technolo#y and introduced the $irst commercial N*+ type $lash

memory device in 1966.

N*+based $lash memory has lon# erase and %rite times, but has $ull address ! data inter$ace that allo%s

random access to any memory location. 'hese properties ma-e it a convenient %ay $or stora#e o$ a pro#ram code

that doesnt need to be updated $re&uently, such as a handheld device $irm%are or computer 8*/.

First NANDbased $lash memory device %as introduced by /amsun# and 'oshiba in 1969. ts !*

inter$ace allo%s only se&uential data access, ho%ever, the memory has $aster erase and %rite times, hi#her density,

lo%er costperbit than N*+ and ten times the li$etime. 'hese properties ma-e it suitable $or massstora#e devices

such as memory cards ($or "s, cameras, etc.) or actually boomed solid harddiscs.

Fi#ure 1compares the memory cells o$ NAND and N*+based $lash memories.

ersion 1.00!02.2009 "a#e : o$ 20

Figure 1. NAND versus NOR flash memory cell comparison (by Samsung)


4/20


Fi#ure 2 sho%s an internal or#ani;ation scheme o$ real NAND $lash memory device. 'he main attributes

are as $ollo%s). 'ypical pa#e con$i#urations are =12?1>, 2076?>7

and 709>?126 bytes. Data area is used $or stora#e o$ payload data (e4ecutable code, photos,

M":s, etc.), %hile spare area is used $or memory mana#ement purposes (bloc- validity labellin#,

operatin# system $la#s, error recovery data, etc.). 'he spare area is not included in device capacityand cannot be directly addressed. 'he pa#e comprises the smallest pro#rammable unit.

/everal subse&uent pa#es (typically :2, >7, 126 or 2=>) comprise a bloc-. 'he bloc- represents

the smallest erasable unit. $ any de$ective bit is $ound, respective bloc- is declared bein# invalid

and e4cluded $rom $urther use.

/ome amount o$ bloc-s comprise a lo#ical unit (@N). 'he memory device can contain one or

several @Ns (mainly modern NAND $lash devices). @Ns improve memory per$ormance by

introducin# some level o$ parallelism, but are not in concern durin# $actory prepro#rammin#.

'he memory is accessed via data re#ister. /ome memory devices use also parallel cache re#ister that

improves data throu#hput by utili;in# device busy time durin# internal data trans$ers.

Data re#ister utili;ation o$ 20


17/20


Unused blocks formatting scheme

/ometimes, it is necessary to pre$ormat also the bloc-s that are not used (e.#. some operatin# system

speci$ic data in spare area). 'here can be t%o -inds o$ such bloc-s

an_elnec_nand_schemes.pdf

Documents