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An Efficient Hardware-based Multi- hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C. Authors: Socrates Demetriades, Michel Han na, Sangyeun Cho and Rami Melhem Publisher: High Performance Interconnect s, 2008. HOTI '08. 16th IEEE Symposium on 26-28 Aug. 2008 Present: Chia-Ming ,Chuang Date: 9, 24, 2008
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An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

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Page 1: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup

Department of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C.

Authors: Socrates Demetriades, Michel Hanna, Sangyeun Cho and Rami MelhemPublisher: High Performance Interconnects, 2008. HOTI '08. 16th IEEE Symposium on 26-28 Aug. 2008Present: Chia-Ming ,Chuang Date: 9, 24, 2008

Page 2: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Outline

1. Introduction 2. Architecture 3. Bit select mechanism 4. Conclusion

Page 3: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Introduction (1/3)

Ternary Content Addressable Memory (TCAM)

Trie-based schemes Hash-based schemes

Current techniques IP lookup have three categories

Page 4: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Introduction (2/3)

First hashing can happen collisions and requires resolution

techniques that may result in unpredictable lookup performance

Second hash keys be included “don’t care” bit

Three determine the longest prefix

hash-based IP lookup problem

Page 5: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Introduction (3/3)

High lookup throughput

• A multiple table , multiple hash functions

• Bit select mechanism high space utilization

• Modified version of the Cuckoo hashing algorithm Low power consumption

• Sum of advantage

Page 6: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Outline

1. Introduction 2. Architecture 3. Bit select mechanism 4. Conclusion

Page 7: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Architecture overview (1/4)

Page 8: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Architecture (2/4)

Based on a multi-level hash table (MHT)

All hash function use the same bit position in a prefix or a

destination address

PS:references [16] S. Cho, J. Martin, R. Xu, M. Hammoud, and R. Melhem, “Ca-ram:A high-performance memory substrate for search-intensive applications,”pp. 230–241, IEEE ISPASS, April 2007.

Page 9: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Architecture (3/4)

Page 10: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Architecture (4/4)

Do not classify prefixes based on their lengths Each table is accessed using a hardware based

index generator a number of match processors compare the fetched

keys with the search key in parallel

“Bit-Select” component (1)decides which bits participate in the index generation

(2)“don’t care bits” may appear in the selected bits for indexing

(3)Bit-Select mechanism needs to resolve this by prefix expansion

Page 11: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Outline

1. Introduction 2. Architecture 3. Bit select mechanism 4. Conclusion

Page 12: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Bit select mechanism (1/7)

Page 13: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Bit select mechanism (2/7)

(一 ) Most prefix have lenghts between16 and

24 bits 24 bit prefixes comprise about 54% no prefixes less than 8 bit (二 ) As a study in [9] pointed out, regardless

of prefix length, start from the6th bit and reach the prefixes’ maximum length.

Page 14: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Bit select mechanism (3/7)

Page 15: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

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Bit select mechanism (4/7)(一 ) X-axis =>(Expansion size)/extra provided capacity Y-axis=> unresolved collisions no prefixes less than 8 bit(二 ) From the experiments, we find that any c

onfiguration that can keep the expansion between 20% and 90% of the extra provided capacity results in less than 5% of unresolved collisions.

Page 16: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Bit select mechanism (5/7)

controlled prefix expansion

controlled wildcard resolution

Page 17: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

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Max bucket is 234 itemMax bucket is 49 item

Total 49*3=147Cuckoo hashing algorithm

Bit select mechanism (6/7)

Page 18: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

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Bit select mechanism (7/7)(一 ) a collision may appear if an item x can not be inser

ted into tables Ti, i = 1, . . . , d because buckets Ti [hi(x)], i = 1, . . . , d are full.

(二 ) by checking whether an item y at some bucket Ti [hi(x)], 1 ≤ i ≤ d, can migrate to some other table Tj =\ Ti. This requires that a bucket Tj [hj(y)] has an

empty entry to accommodate the item y.(三 ) If such an item y is found, then it can be moved a

nd x will take its place.

Page 19: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Outline

1. Introduction 2. Architecture 3. Bit select mechanism 4. Conclusion

Page 20: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Conclusion (1/3)

Page 21: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Conclusion (2/3)

Page 22: An Efficient Hardware-based Multi-hash Scheme for High Speed IP Lookup Department of Computer Science and Information Engineering National Cheng Kung University,

Conclusion (3/3)