www.irf.com 1 AN-1084 Application Note AN-1084 Power MOSFET Basics by Vrej Barkhordarian, International RectifierTable of Contents PageBreakdown Voltage .............................................................................. 5 On-resistance.......................................................................................6 Transco nductance............ .................................................. ..................6 Thresho ld Voltage ................................................................................ 7 Diode Forward Vo ltage ........................................................................7 Power D issipation ................................................................................ 7 Dynamic Charact eristics.......................................................................8 Gate Charge........ ................................................................................. 10 dV/dt Capability .................................................................................... 11 This application note d iscusses the breakdown voltage, on-resistance, transconductance, threshold voltage, diode forward voltage, power di ssipation, dynamic characteristics, gate charge and dV/dt capability of the power MOSFET.
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This application note discusses the breakdown voltage, on-resistance, transconductance,threshold voltage, diode forward voltage, power dissipation, dynamic characteristics, gatecharge and dV/dt capability of the power MOSFET.
Another BJ T l imitat ion is tha t both electrons a nd holes
contribute to condu ction. Presen ce of holes with their h igher
carrier l ifet ime cau ses the switching speed to be several orders of
m agnitu de slower tha n for a power MOSFET of similar size and
voltage ratin g. Also, BJ Ts su ffer from th erm al run awa y. Their
forward voltage drop decreas es with increasing tem peratu re
cau sing diversion of cur rent to a single device when several
devices a re pa ral leled. Power MOSFETs, on the other h an d, ar e
m ajority car rier devices with n o minority car rier injection. They
are s up erior to the BJ Ts in h igh frequen cy applicat ions where
switching power losses are importan t . Plus , they can withsta nd
simu ltaneous app licat ion of high cu rrent an d voltage withou t
u ndergoing dest ru ct ive fai lu re du e to second break down. Power
MOSFETs can also be paralleled easily because the forward
voltage drop increa ses with increasing tempera tu re, ensu ring an even distr ibu tion of cur rent a mon g all
components .
However, a t h igh brea kdown voltages (>200V) th e on-s ta te voltage dr op of th e power MOSFET becomes
higher th an th at of a s imilar s ize bipolar d evice with s imilar voltage rat ing. This m ak es it more attr active
to us e the bipolar p ower tran sistor at th e expense of worse h igh frequen cy performa nce. Figure 2 sh ows
th e presen t curr ent -volta ge lim itations of power MOSFETs and BJ Ts. Over tim e, new ma terials,structures and processing techniques are expected to raise these l imits.
2000
1500
1000
500
01 10 100 1000
Maximum Current (A)
H o l d o f f V o l t a g e ( V )
BipolarTransistors
MOS
Figure 2. Current-VoltageLimitations of MOSFETs and BJTs.
DrainMetallization
Drain
n+ Substrate
(100)
n- Epi Layer
Channelsn+pn+
p+ Body Region p+
Drift Region
G
S
D
SourceGateOxide
PolysiliconGate
SourceMetallization
Figure 3. Schematic Diagram for an n-Channel Power MOSFET and the Device.
Figure 3 s hows sch ema tic diagram an d Figu re 4 sh ows th e physical origin of the para si t ic components in
an n-cha nn el power MOSFET. The p ara si t ic J FET appea ring between th e two body imp lants restr icts
current flow when the depletion widths of the two adjacent body diodes extend into the drift region with
increa sing drain voltage. The pa ras it ic BJ T can ma ke th e device su sceptible to un wanted device tu rn-on
an d prem atu re breakdown. The ba se resistan ce RB mu st be m inimized thr ough carefu l design of the
doping and dista nce un der the sou rce region. There are several para si t ic capacitances a ss ociated with
the power MOSFET as sh own in Figure 3.
CGS is the ca pacitan ce du e to the overlap of the s ource a nd the ch an nel regions b y the polysilicon gate
and is independent of applied voltage. CGD consists of two parts, th e first is the ca pacitance a ss ociatedwith t he overlap of the p olysilicon gate an d th e si licon u nd ernea th in t he J FET region. The s econd pa rt is
the capa citan ce ass ociated with th e deplet ion region imm ediately u nd er the gate. CGD is a nonlinea r
fu n ction of voltage. Fina lly, CDS , the capacitance associated with the body-drift diode, varies inversely
with the squ are r oot of the dra in-source bias. There a re cu rrently two designs of power MOSFETs, u su ally
referred to as th e plan ar an d the trench designs. The plana r design h as a lready been introdu ced in th e
sch em atic of Figu re 3. Two var iations of th e tren ch p ower MOSFET ar e sh own Figure 5. The tren ch
techn ology has the a dvanta ge of higher cel l dens i ty bu t is more difficult to ma nu factu re tha n t he plan ar
When the MOSFET is us ed as a s witch, i ts bas ic fu nction is to control the d rain cu rrent by the gate
voltage. Figu re 11(a) sh ows the tran sfer cha ra cteristics an d Figure 11(b) is an equ ivalent circuit model
often u sed for the a na lysis of MOSFET switching perform an ce.
The switching perform an ce of a device is determ ined by th e t ime requ ired to estab lish voltage cha nges
across capacitances. RG is the d istr ibu ted res ista nce of the gate an d is a pproxima tely inversely
proportiona l to active area . LS an d LD are source an d drain lead indu ctances an d are a round a few tens o f
n H. Typica l values of inp u t (Cis s ), out pu t (Cos s ) an d reverse tra ns fer (Crs s ) capa citan ces given in the d ata
sh eets are u sed by circuit designers as a s tart ing point in determ ining circuit componen t values. The datash eet capacitan ces are defined in term s of the equ ivalent circuit capa citan ces as :
sta rts increas ing again un ti l i t reach es the
su pply volta ge at time t 4 . The gat e cha rge
(QGS + QGD ) corresp ond ing to time t 3 is th e
bare m inimu m ch arge required to switch
th e device on. Good circuit design pra ctice
dictates th e u se of a higher gate voltage
than the ba re min imu m requi red fo r
switching an d th erefore the gate char ge
u sed in the calculat ions is Q G
corresponding to t 4.
The a dvanta ge of us ing gate ch arge is th at
the des igner ca n ea si ly calculate th e
am oun t of curr ent requ ired from th e drive
circuit to switch the device on in a desiredlength of time beca u se Q = CV an d I = C
dv/ dt , the Q = Time x curren t . For
exam ple, a device with a gate ch ar ge of
20nC can be tu rn ed on in 20µsec if 1m a is
su pplied to the gate or it can tu rn on in
20n sec if the gate cu rrent is increas ed to
1A. Thes e simp le calcu lations wou ld n ot
ha ve been possible with inp ut ca pacitan ce
values.
dv/dt CAPABILITY
Peak diode recovery is defined as the
ma ximu m rate of r ise of drain-sou rce
voltage allowed, i.e., dv/ dt cap ab ility. If th is
rate is exceeded th en th e voltage across th e
gate-source termina ls may become h igher
tha n the thr esh old voltage of the device,
forcing th e device into cu rrent condu ction
mode, and u nder certain condit ions a
catas trophic fai lu re may occur. There are two possible mecha nism s by which a dv/ dt indu ced turn -on
m ay take place. Figu re 14 sh ows the equivalent circu it m odel of a power MOSFET, includin g th e
para si t ic BJT. The first mecha nism of dv/ dt indu ced turn -on becomes a ct ive through th e feedback act ion
of the gate-drain capacitance, CGD. When a voltage ramp a ppears across th e drain an d source termina l
of the device a cur rent I1 flows th rough th e gate resistan ce, RG, by mea ns of the gate-drain capa citan ce,CGD . RG is the total gate r esistan ce in th e circuit an d th e voltage drop a cross i t is given by:
(3)
Wh en t he gat e volta ge VGS exceeds t h e th res h old voltage of th e device Vth , th e device is forced in to
condu ction. The dv/ dt capab ili ty for this mech an ism is thu s set by: