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VLSI Technology and Design
Introduction
Prepared by:
Amish J. Tankariya
BE-EC
SEMESTER-VI
SUBJECT-VLSI Technology and Design
GTU Subject Code :- 1710412
SYLLABUS:
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INTRODUCTION
Integrated Circuits (IC): any transistors on onechi!"
Very Large Scale Integration (VLSI)
Complementary Metal Oxide Semiconductor
(CMOS)
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VLSI
Very Large Scale Integration
Design)*anu+acturing o+ extremely small, co*!le,
circuitry using *odi+ied se*iconductor *aterial
Integrated Circuit (IC) *ay contain *illions o+
transistors$ each a +e&* in si-e
A!!lications &ide ranging: *ost electronic logic de.ices
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/OALS O# T0IS COURS1
Learn to design and analyze state-of-te-artdigital VLSI ci!s using CMOS tecnology
Understand design issues at the layout$ transistor$logic and register'trans+er le.els
2er+or*ance analysis and o!ti*i-ation
U i l d i + i h l 3
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ORI/INS O#VLSI
uch de.elo!*ent *oti.ated 3y 44II need +or
i*!ro.ed electronics$ es!ecially +or radar
5678 ' Russell Ohl 9Bell La3oratories ' +irst !n;unction
567< ' Shoc=ley$ Bardeen$ Brattain 9Bell
La3oratories ' +irst transistor
56>? No3el 2hysics 2ri-e
Late 56>8s ' !uri+ication o+ Si ad.ances to acce!ta3le
le.els +or use in electronics
56>< ' Sey*our Cray 9Control Data Cor!oration '+irst transistori-ed co*!uter ' CDC 5?87
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ORI/INS O#VLSI 9CONT"
56>6 ' @ac= St" Claire il3y 9Te,as Instru*ents '
+irst integrated circuit ' 58 co*!onents on 6 **
56>6 ' Ro3ert Norton Noyce 9+ounder$ #airchild
Se*iconductor ' i*!ro.ed integrated circuit
56?< Noyce /ordon 1 oore +ound Intel
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$%& VLSI 'SI*+Money, tecnology, ciilization
40YVLSI I2F
A &ay to design electronic circuits
Di*ensionally G*icron$ su3*icron$ nano range
Current day technology
icro electronics cree!ing in all disci!lines'''9*erger o+ .arious disci!lines in syste* design
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DI/R1SSION: SILICON S1ICONDUCTORS
odern electronic chi!s are 3uilt *ostly on silicon sustrates
Silicon is a rou! IV se*iconducting *aterial
Crystal lattice: co.alent 3onds hold each ato* to four
neigours
Si SiSi
Si SiSi
Si SiSi
http://onlineheavytheory.net/silicon.html
DO2ANTS Silicon is a semiconductor at roo* te*!erature
2ure silicon has fe# free carriers and conducts !oorly
Adding do!ants increases te conductiity drastically
Do!ant +ro* rou! V9e"g" As$ 2: extra electron 9n'ty!e
Do!ant +ro* rou! III 9e"g" B$ Al: *issing electron$
called ole 9!'ty!e
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2'N @UNCTIONS
.irst semiconductor 9t&o ter*inal de.ices
A ;unction 3et&een !'ty!e and n'ty!e
se*iconductor +or*s a diode"
Current +lo&s only in one direction
p - t y p e n - t y p e
a n o d e c a th o d e
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A Brief History Birth of Morden ElectronicsInvention of the Transistor
Vacuu* tu3es ruled in +irst hal+ o+ 8th century Large$e,!ensi.e$ !o&er'hungry$ unrelia3le
567: first transistor 9 ter*inal de.ices
Shoc=ley$ Bardeen and Brattain at Bell La3s' &inner o+
No3el !ri-e in !hysics"
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A Brief History, contd..
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568Es !rocesses usually had only nOS transistors
Ine,!ensi.e$ 3ut consu*e !o&er &hile idle
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20YSICAL LAYOUT
7ransistor size f M distance 3et&een source and
drain
7e area of te 7ransistor can e a!!roximated
y ate 1rea ($xL)
And the ate 1rea &ill 3e !ro!ortional to the ($8L)
ratio o+ the transistor"
Set 3y *ini*u* &idth o+ !olysilicon
The another *easure o+ the IC %feature size9 is the
s*allest sha!e you can *a=e on a chi! and is
*easured in or lamda;
9since la*3da is eual to hal+ o+ the s*allest transistorsi-e
1,!ress rules in ter*s o+ Mf)
1"g" M 8"* in 8"?* !rocess
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Ref: http://micro.magnet.fsu.edu/creatures/technical/sizematters.html
P Modern transistors are +e& *icrons &ide and a!!ro,i*ately
: /ordon oore !lotted transistor on each chi!
#it straight line on se*ilog scale
Transistor counts ha.e dou3led e.ery ? *onthsMr.AmishJ.Ta
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Evolution of logic complexity in IC.
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ITRS- International Technology Roadmap for
Semiconductors
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Shrinking Device Dimensions
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Increasing Function Density
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Increasing Clock Frequency
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Decreasing Supply Voltage
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Graphical Analysis:
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AAQIN/ VISIONARY
illion transistor)chi! 3arrier &as crossed in the
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INTEGRATION OF A LARGE NUMBER OF FUNCTIONS ON
A SINGLE CHIP USUALLY PROVIDES:
Less area8olume and there+ore$ co*!actness
Less !o#er consu*!tion
Less testing re0uirements at syste* le.el
%iger reliaility$ *ainly due to i*!ro.ed
on'chi! interconnects
%iger s!eed, due to signi+icantly reduced
interconnection length
Signi+icant cost saings
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C0I2 ANU#ACTUR1 2ROC1SS:
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.14@IC17IO* /@OCSS SA"*C
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Chip Fabrication: Single Crystal Growth(I)
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C0OIC1 O# T1C0NOLO/Y
T&o distinct ty!es o+ technology are +a3ricated in
silicon 3ased u!on
B@T 9Bi!olar @unction Transistor OS 9etallic O,ide Se*iconductor
Since !rocessing o+ these technologies is .ery
di++erent$ it is i*!ractical to *i, the* u! &ithin
a chi!
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Transistor Types 4i!olar transistors
n!n or !n! silicon structure
S*all current into .ery thin 3ase layer controls large
currents 3et&een e*itter and collector
Current Controlled De.ice
Base currents li*it integration density
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C0OIC1 O# OSAND B@T
OS logic occu!ies *uch s*aller area o+silicon than the eui.alent B@T logic
OS technology has a *uch higher !otential!ac=ing density
A OS logic circuit reuires a!!recia3ly lesscurrent and hence less !o&er than its 3i!olarcounter !art
0o&e.er$ 3i!olar circuits o!erate +aster thanOS circuits
1.en so$ the s!eed'!o&er !roduct +or OSlogic co*!ares +a.ora3ly &ith that o+ B@Tlogic 43
C0OIC1 O# OSAND B@T
The structure o+ an OS transistor is *uchsi*!ler than that o+ 3i!olar de.ices and this*a=es *anu+acturing !rocess easier
This in turn should result in +e&er +aultsoccurring in +a3rication 9high yield
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SUARY
OS Transistors are stac= o+ gate$ o,ide$ silicon and!'n ;unctions
Can 3e .ie&ed as electrically controlled s&itches Build logic gates out o+ s&itches
Dra& *as=s to s!eci+y layout o+ transistors
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O4BC7IV 1*' O@1*I17IO* O. 7% 4OOD
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QUES
TIONS
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