agricare project

8/12/2019 agricare project

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AUTOMATIC MICROCONTROLLER BASED e-AGRICARE

CHAPTER-1

INTRODUCTION

In a modern agriculture there is a need of so many automation technique from which

the farmer perform his work without much of interaction. For this some of the works in a field

can be possible to atomize with the help of microcontroller.

The basic requirement of agriculture activity is a irrigation in which the old method is

just by observing the upper surface of soil and irrigate the plants until the soil upper surface

goes to wet but in this method there is an wastage of water about 4! because some of plants

does not require that much of moisture for their routes as for some plants this may require still

more. This problem can be solved by using a technique of sensing actual moisture level of the

soil and action of pump can be controlled. The sensors which are inserted in to the soil which

absorbs the level of moisture and in a driving stage this is further improved and fed to a

microcontroller.

"ccording to the moisture level of the soil there is a change in conductivity between

two probes. #o the microcontroller is designed in such way that the moisture level develops

between probes reach to a normal or abnormal values$ the output of microcontroller triggers

the pump to irrigate the fields. The microcontroller also receives a logical signal of the pump

condition that what about its temperature %a normal temperature indicates proper working of

pump&. The reason for increase temperature of pump is that whenever it runs at dry running

%working of pump without water& condition also the microcontroller not allows the pump to

'()*. "ccording to these two parameters and the condition of soil$ the pump goes to '()* or

'(FF*.

E&C Dept., G.M.I.T, DAVANGERE +


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The one more problem on field is that the pesticides control$ in a normal method the

pesticides can be controlled by putting a chemicals. ,ut this method has some drawbacks. ,y

using an electronic method this can be controlled that is by generating an ultrasonic frequency

and radiate these frequencies in field by a transducer of piezo electric. "nother feature of the

same system is controlling wild animals to entering into a field by providing mild shock to it.

" voltage of around +- and current of m" with a frequency of / k0z is generated$ the

output which is connected to electric fence. 1henever any wild animals try to enter the field$

this circuit delivers a shock through the fence but which is not harmful for the wild animal.

(ne more feature is monitoring any theft condition of the pump and indicating at

farmer house with a wireless link. " special kind of sensor is provided below pump as some

body tries to lift the pump this switching signal is given to a transmitter which transmits the

signal at some frequency. "s the receiver is fi2ed at farmers house so that$ as it receives a

switching signal$ an alarm generator generates an alarm and an indication 35 indicates the

status.

E&C Dept., G.M.I.T, DAVANGERE


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CHAPTER-2

SYSTEM REQUIREMENT SPECIFICATIONS

.+ 67(89T 7:;I7


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CHAPTER-3

WORKING PRINCIPLE

B.+ ,3(9D 5I"E7"< (F eA"E7I9"7 ")5 T7")#


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3.2 WORKING PRINCIPLE


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lectric Fencing #ystem=

The electrical fencing system is used to control the wild animal*s entry into a

field by providing mild shock using electronic circuit. " voltage of around + volts and

current of m" with a frequency of / k0z is generated$ which is connected to electric fence.

1henever any wild animals try to enter into a field this circuit delivers shock through the

fence$ but which is not harmful for wild animals and human beings.

6esticide 9ontroller=

The main problem on field is the pesticides control. ,ut in a normal method can we

controlled by putting chemicals$ but this method has some drawbacks. ,y using electronic

method this can be controlled by generating an ultrasonic frequency and radiate this

frequencies in field by transducer of piezo electric.


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CHAPTER-4

CIRCUIT DESCRIPTION

4.1 SOIL SENSOR UNIT

E&C Dept., G.M.I.T, DAVANGERE /


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Fig4.+= 9ircuit 5iagram (f #oil #ensing

E&C Dept., G.M.I.T, DAVANGERE >


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4.+.+ (67"TI()=

"bove figure shows the circuit diagram of #oil #ensing. It consists of #oil #ensor

%9opper 9onducting 6lates&$ (6"


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4.2 TEMPERATURE SENSOR UNIT

Fig4.= 9ircuit 5iagram of Temperature #ensing

E&C Dept., G.M.I.T, DAVANGERE ++


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4..+ (67"TI()=

" temperature sensing circuit is designed with Thermistor$ (6"


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4.3 WATER LEVEL SENSOR UNIT

E&C Dept., G.M.I.T, DAVANGERE +4


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Fig4.B= 9ircuit 5iagram of 1ater 3evel #ensing

E&C Dept., G.M.I.T, DAVANGERE +?


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4.B.+ (67"TI()=

"bove figure shows the circuit diagram of 1ater #ensing. It consists of 1ater #ensor

%9opper 9onducting 6lates or 6robes&$ (6"


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4.4 VARIABLE FREQUENCY ULTRASONIC PEST

REPELLER UNIT:

E&C Dept., G.M.I.T, DAVANGERE +@


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Fig4.4= 9ircuit 5iagram of 6est 7epeller.

4.4.+ (67"TI()=

6ests like rats$ rodents$ rabbits$ birdsetcMget irritated by ultrasonic frequency in the

range of B to ?khz.Fortunately these frequencies are inaudible to humans. Thus these

frequencies can be used to get rid of the pests. ,ut all these pests do not react to the same

ultrasonic frequency. #ome pests may get repelled at B/ to 4/ k0z while some others may

react at B? k0z. To increase the effectiveness of the circuit$ we have used a continuously

variable ultrasonic frequency oscillator.

" ??? timer is used as a clock generator$ which is configured in astable mode$ i.e.

there is no need for e2ternal trigger but it generates clock pulses on its own. The frequency of

the pulses can be varied by the potentiometer 7. These pulses are used as the input pulses for

the decade counter I9 954+@. For each pulse from the timer the logic + is shifted through

the outputs of the counter. There are totally + outputs ? of which are connected to the

individual presets. ach of these presets can be set for different values so as to generate

separate frequency values. The : to :4 outputs go high one by one in turn triggering a

predetermined frequency through the presets. 1hen one output goes high the previous one

goes low. This is shown in the truth table of decade counter. Thus at any particular instant$

only one frequency is generated$ for the preset duration. This duration depends on the clock

pulse frequency of the ??? timer I9+.

These outputs of the decade counter are used to vary the duty cycle of the ??? timer

I9B .The on time and off time of the clock pulses of I9Bcan be varied by varying the

resistance across pin no @.The duty cycle is given by$

5uty cycle N 6ulse 1idth C Total time period

E&C Dept., G.M.I.T, DAVANGERE +/


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The ??? timer$ in the astable mode$ generates clock pulse which has unequal on and

off timings. This periodic waveform is said to be asymmetrical. The duty cycle determines the

on and off operating conditions of the device. Thus by controlling the duty cycle the

frequency generated can be varied. The I9B ??? timer operates at around /khz.the output

pulses of this I9 are used to trigger the I94A954+B. I94A954+B is a dual 5 flipAflop. Thatdelivers symmetrical pulses at its : and : outputs. (nly one of these two flipAflops is used.

This behaves like a frequency divider i.e. 5ivide by counters.

E&C Dept., G.M.I.T, DAVANGERE +>


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Thus the pulses from the timer I9B which are applied to this flipAflop will be divided

by .Thus symmetrical clock pulses of frequency of about BA4 k0z can be obtained at :

and : outputs of the flipAflop. ,y connecting a transducer to the : and : outputs directly the

frequency of BA? k0z is obtained. The frequency can be either varied by varying any of the

presets -7+ to -7? i.e. -arying the duty cycle or by varying the frequency of the clock

pulses of I9B.The time duration for which each frequency is generated can be varied by

varying the frequency of clock pulses of the I9+.Thus the frequency emission of fine step by

step variation can be done automatically.

The required frequency can be adjusted by trial and error method or by using a 9.7.(.

This pest repeller is much effective because the ultrasonic frequency is automatically changed

one after the other to match the different pests. The power generated is also sufficiently high." 5arlington pair transistor can be used to get more amplified signals.

4.! POWER FENCING SYSTEM

E&C Dept., G.M.I.T, DAVANGERE


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Fig4.?= 9ircuit 5iagram of +v$ "9 #ignal Eenerator.



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4.?.+ (67"TI()=

The circuit is designed with 95 44@"stableC


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4." MOTOR THEFT CONTROL UNIT

4.".1 T#$%&'())*#:

"s the name itself indicates$ the 7.FC0.F. transmitter is an electromagnetic

device i.e. 7adio transmitter working in the high frequency range. This transmitter

ci rcuit i s buil t around the high f requency t rans is tors$ ,F4>4C4>?. 0ere the

transistor ,9 ?4/ and au2iliary acts as 0artley (scillator. The other ,9 ?4/ acts as a

single stage transistor amplifier. This circuit is consisting of two stages=

+& 0artley (scillator

& "mplifier and coupling stage.

0artley (scillator=

0artley oscillator is very popular and is commonly used as a local oscillator$

which produces continuous undamped oscillations of any desired frequency if tank and

feedback circuits are properly connected to it. It has two main advantages viz

adaptability to a wide range of frequencies and is easy to tune. The BBD resistors and

luf capacitor are used for biasing purpose. The capacitor .uf and the inductor are used inan 3. 9. Tank circuit and generate 0.F. carrier signals.

E&C Dept., G.M.I.T, DAVANGERE B


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"mplifier and 9oupling #tage=

The signal which is generated by 0artley (scillator$ which is at low amplitude %0F&$is fed to the base of amplifying transistor ,9 ?4/. The transistor ,9?4/ controls

,f4>4. The resistor 4@D and capacitor .+uf acts as a 79 timing network which

produces 3F tone Frequency which is fed to the base of ,F4>4. This low frequency tone

signal is superimposed with 0.F. carrier signal and the output is at the collector of ,F

4>4. To avoid ,F 4>4 acting as a 59 switch$ we insert a timer$ which is nothin g but

a capacitor. The timer blocks 59 and acts as a short circuit for high frequency

this$ superimposed signal +4 D0z is transmitted through an antenna.

4.".2 R*+*(,*#:

E&C Dept., G.M.I.T, DAVANGERE 4


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7eceiver section consists of following stages they are

+. (scillator stage

. "mplifier stage

B. 6ulse to sound conversion %,ird of crip emulator&

4. 3ight to sound generator

(scillator #tage=

3. (scillators are useful for generating signals from tens of D0z to


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"mplifier stage=

The common R collector amplifier %also known as the ground collector amplifier

or common follower& can be used variety of digital and analog amplifier applications. In the

amplifier stage the common collector and emitter amplifier

In common collector amplifier @ emitter follower in which the input signal either low

%at zero -olts& or high %at a substantial positive value that us not grater than supp ly ra il

voltage &. 1hen the low transistor ,9??/ id fully cut off$ and the output is at zero

volts. 1hen signal is high : is () and current I3flows in load resistor 7S an output

voltage across 73%+kO&. Thus the circuit has high inputs and provide unity voltage gain and

when the input signal switches low again : %,9 ?4/& switches (FF thus unable to

sink or absorb the charge current of capacitor .uf$ which instead has to dischargevia load e2ponentially with a time constant equal to the capacitor .uf and 73

%+kO& product.

This bas ic princ ip le detai led above can be used as to make an "9?=

E&C Dept., G.M.I.T, DAVANGERE B+


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P o r t o D r i v e r P o r t o 2 D r i v e r

R A MP o r t oL a t c h

Q u i c kF l a s h

B r e g i s t e r A C C S t a c kP o i n t e r

P r o g r a ma d d r e s sr e g i s t e r

T M P 2 T M P 1B u f f e r

A L UP C

I n c r e -m e n tI N T , S e r i a l P o r t ,

& T i m e r B l o c k sP S W

T i m i n g&

C o n t r o l

P o r t 1L a t c h

P o r t 3L a t c h

P r o gC o u n t e r

D P T R

P o r t 3 D r i v e rP o r t 1 D r i v e rO S C

P o r t o D r i v e rP o r t o D r i v e r

I N S TR e g

R A M A D D RR e g i s t e r

P t o P0 . 0 0 . 7 P t o P2 . 0 2 . 7

P t o P1 . 0 1 . 7 P t o P3 . 0 3 . 7

P S E N

A L E / P R O G

E A / V P P

R S T

Fig?.+= ,lock 5iagram of


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4. Fully static operation.

?. B 3evel program memorial clocks.

H. ?H / bit internal 7". /AInterupt #ource.

+. 6rogrammable serial channel.

++. 3ow power$ Ideal and 6ower down modes.

+. Four register ,anks each containing / registers

PINCONFIGURATIONOF78C!2:

E&C Dept., G.M.I.T, DAVANGERE BB


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( T ) P 1 . 0 .2 1

T ( E x ) P 1 . 12

P 1 . 2

P 1 . 3

P 1 . 4

P 1 . 5

P 1 . 6

P 1 . 7

R S T

( R ) P 3 . 0X D

( T ) P 3 . 1X D

( I N T O ) P 3 . 2

( I N T 1 ) P 3 . 3 .

( T ) P 3 . 40

( T ) P 3 . 51

( W R ) P 3 . 6

( R D ) P 3 . 7

X T A L 2

X T A L 1

G N D

2

3

4

5

6

7

8

9

1 1

1 2

1 3

1 4

1 5

1 6

1 7

1 8

1 9

2 0

4 0

3 9

3 8

3 7

3 6

3 5

3 4

3 3

3 2

3 1

2 9

2 8

2 7

2 6

2 5

2 4

2 3

2 2

2 1

V C C

P 0 . 0 ( A D )0

P 0 . 1 ( A D )1

P 0 . 2 ( A D )2

P 0 . 3 ( A D )3

P 0 . 4 ( A D )4

P 0 . 5 ( A D )5

P 0 . 6 ( A D )6

P 0 . 7 ( A D )7

E A / V P P

A L E / P R O G

P S E N

P 2 . 1 ( A )1 5

P 2 . 6 ( A )1 4

P 2 . 5 ( A )1 3

P 2 . 4 ( A )1 2

P 2 . 3 ( A )1 1

P 2 . 2 ( A )1 0

P 2 . 1 ( A )9

P 2 . 0 ( A )8

AT

M

E

L

8

9

C

5

2

6I)5#97I6TI()(F/>9?=

6ort = 6ort is an / bit open drain biAdirectional IC( port. ach pin can sink / TT3 Input*s. It

can be configured to be multiple2ed low order address C data bus during access to e2ternal

program and data memory. 1hen a pin is to be used as an input$ a + must be written to a

E&C Dept., G.M.I.T, DAVANGERE B4


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corresponding port o latch by the program$ thus turning both of the transistors off$ which in

turn causes the pin to float in high impedance state$ and the pin is connected to Input buffer.

1hen used as an output the pin latches that are programmed to a will turn on the lower FT

grounding the pin. "ll latches that are programmed to a + still floatQ thus$ e2ternal pullAup

resistors will be needed to supply logic high when using port o as an output. 6ort also

receives the code bytes during flash programming and output*s the code bytes during program

verification.

6ort += 6ort + is an /Abit biAdirectional IC( port with internal pullAups. The port + output

buffers can sinkCsource four TT3 input*s. 1hen +*s are written to port + pin$ they are pulled

high by internal pullAups and can be used as Input*s. 6ort + pins that are e2ternally being

pulled low will source current in because of the internal pullAups. In addition port +. and port+.+ can be configured to be the timerCcounter e2ternal count input*s %6+.CT& and the timer

counter trigger input %6+.+CT%2&& respectively.

6ort = 6ort may be used as an inputCoutput similar in operation to port +. 6ort emits the

high order address byte during fetches from e2ternal program memory and during accesses to

e2ternal data memory that use +H bit addresses. In this application$ 6ort uses strong internal

pullAups. 1hen emitting +*s. 5uring e2cesses to e2ternal data memory that / bit address$ 6ort

emits the contents of the 6 #pecial function 7egister. 6ort also receives the high order

address bits and some control signals during flash programming and verification.

6ort B= 6ort B is an inputCoutput port similar to port +. The input and output functions can be

programmed under the control of the 6B latches or under the control of various other special

function registers. The port B alternate uses are shown in the following table.

P#) P(% A/)*#%$)* F%+)(%

6B. A 75 A #erial data input

6B.+ A T5 A #erial data output

E&C Dept., G.M.I.T, DAVANGERE B?


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6B. A I)T( A 2ternal Inter 6t (

6B.B A I)T+ A 2ternal Inter 6t +

6B.4 A T( A 2ternal Timer ( I)6;T

6B.? A T+ A 2ternal Timer + I)6;T

6B.H A 17 A 2ternal 5ata 9? enters a reset condition.

"3 C67(E= "ddress latch enable is an (utput pulse for latching the low byte of the

addressing during accesses to e2ternal memory. This pin is also the program pulse Input

%67(E& during flash programming.

In normal operation$ "3 is emitted at a constant rate of +CH the oscillator frequency and

may be used for e2ternal timing or clocking purposes. 0owever that one "3 pulse is skipped

during each access to e2ternal data memory.

6#) = 6rogram store enable is the read strobe to e2ternal program memory. 1hen the />9?

is e2ecuting code from e2ternal program memory. 6#) is activated twice each machine

cycle$ e2cept that two 6#) activation*s are skipped during each access to e2ternal data

memory.

E&C Dept., G.M.I.T, DAVANGERE BH


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"C-66= 2ternal access enables. " must be strapped to ground in order to enable the

device to fetch code from e2ternal program memory location starting at 0 up to FFFF0.

0owever that if lock bit + is programmed. " will be internally latched on 7eset. " should

be strapped to -99 for internal program e2ecutions. ,it " is a master or global bit that can

enable or disable all of the interrupts. This pin also receives the + volt programming enable

voltage -66 during flash programming when + volt programming is selected.

T and T+= 9ounters and Timers= Timers and +=


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The modes are selected by bits in T9() Timer 9onsists of two / bit registers T0 and

T3. In the timer function$ the T3 register is incremented every machine cycle. #ince a

machine cycle consists of + oscillator*s period$ the count rate is +C+ of the oscillator

frequency.

T"3I and T"3=

The heart of the />9? is the circuitary that generates the clock pulses by which all

internal operations are synchronized. 6ins T"3I and T"3 are provided for connecting a

resonant network to form an (scillator. The 9rystal frequency is the basic internal clock

frequency of the microcontroller. The manufacturers make available />9? designs that can

run at specified ma2imum and minimum frequencies. Typically +


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C = 8 2 P F

1 1 . 0 5 9 2

1 8 X T A L 2

1 9 X T A L 1C = 8 2 P F

C r y s t a l

Typically$ a :uartz 9rystal of frequency ++.?>


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Eeneral description=

The )??? monolithic timing circuit is a highly stable controller capable of producing

accurate time delays or oscillation. In the time delay mode of operation$ the time is precisely

controlled by one e2ternal resistor and capacitor. For a stable operation as an oscillator$ the

free running frequency and the duty cycle are both accurately controlled with two e2ternal

resistors and one capacitor. The circuit may be triggered and reset on falling waveforms$ and

the output structure can source or sink up to m". The )??? is available in plastic and

ceramic mini dip package and in an /Alead micro package and in metal can package version.

Features=

3ow turn off time.


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"bsolute


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"bsolute


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!.! CD4946BC MONOSTABLEASTABLE

MULTIVIBRATOR

Eeneral 5escription=

9544@, is capable of operating in either the monostable or astable mode. It

requires an e2ternal capacitor %between pins + and B& and an e2ternal resistor %between

pins and B& to determine the output pulse width in the monostable mode$ and the

output frequency in the astable mode. "stable operation is enabled by a high level on

the astable input or low level on the astable input. The output frequency %at ?! duty

cycle& at : and : outputs is determined by the timing components. " frequency twice

that of : is available at the (scillator (utputQ a ?! duty cycle is not guaranteed.


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by applying a simultaneous lowAtoAhigh transition to both the trigger and retrigger

inputs. " high level on 7eset input resets the outputs : to low$ : to high.

Features=

1ide supply voltage ratings B.- to +?-

0igh noise immunity .4? -55 %typ.&

3ow power TT3 Fan out of driving @43

9ompatibility or + driving @43#

#pecial Features=

3ow power consumption= #pecial 9


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medium speed operation and assures a hazard free counting sequence. The + decoded

outputs are normally in the logicKK state and go to the logic J+K state only at their

respective time slot. ach decoded output remains high for + full clock cycle.

The carryout signal completes a full cycle for every + clock input cycles and is

used as a ripple carry signal to any succeeding stages.

Features=

+. 1ide supply voltage range B.v to +?v

. 0igh noise immunity .4?vdd%typ&

B. 3ow power fan out of driving 43

4. TT3 compatibility or + driving @43#

?.


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REGULATORIC 679!2

Eeneral 5escription=

The


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!.7 SOFTWARE PROGRAM

org h

mov p+$ Yffh

mov p$ Yh

sjmp start

start= mov a$ p+

cjne a$ YBh$ loop

mov p$ YBh

sjmp start

loop= cjne a$ Yh$ loop+

mov p$ Ych

sjmp start

loop+= cjne a$ Y+h$ loop

mov p$ Ych

sjmp start

loop= cjne a$ Y@h$ start

mov p$ Ych

sjmp start

E&C Dept., G.M.I.T, DAVANGERE ?


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!.7.1 FLOW CHART

NO

YES

NO

YES

NO

YES

E&C Dept., G.M.I.T, DAVANGERE ?+

START

INITIALI;E P1< INPUT

P2 < OUTPUT

SOIL


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CHAPTER-"

APPLICATIONS

9ontrolling irrigation against moisture levels.

6ump protection against temperature and dry running condition.

6esticides control from generating ultrasonic frequency.

1ild animal*s entry can be avoided.

6ump theft can be wirelessly indicated.

FUTURE ENHANCEMENTS

6ump protection against abnormal voltage of the mains.

;sage of solenoid system to avoid the use of many pumps.

The system works through solar power.

E&C Dept., G.M.I.T, DAVANGERE ?


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CHAPTER-6

BIBLIOGRAPHY

(perational "mplifier ,y 7amakanth Eayakwad

agricare project

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