AdvancedAnalog Building Blocks Two Stage amplifiers Fully Differential amplifiers Albert Comerma (PI) ([email protected]) Course web SoSe 2017
AdvancedAnalog Building Blocks
Two Stage amplifiers
Fully Differential amplifiers
Albert Comerma (PI)([email protected])
Course web
SoSe 2017
IntroductionTwo Stage Amplifiers
Fully Differential amplifierOTA and OPAmp
OTA and OPAmp
• OTA: Operational Transconductance AmplifierVoltage input → Current output• OPAmp: Operational Amplifier
Voltage input → Voltage output (buffered)
OTA OTA+buffer OPAmp
Key parameters;
• Gain Bandwidth Product
• DC Gain
• Stability (Phase margin)
• Biasing (symmetry and matching)c©[email protected] AABB: Two Stage / Fully Differential amplifiers 1 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifierOTA and OPAmp
General OPAmp model
General model
• First stage OTA; i1 = (v+ − v−)× gm = vdiff × gm
• Virtual short circuit in v1;→ voi1
= − 1sCc
• Thus; |Av (f )| = gm
2π×f×Cc
• GBW = Av (f )fT =1 = gm
2π×Cc
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 2 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Circuit
Two stage amplifier;
• Fist stage: OTA• Second stage: Inverter• Miller capacitance between first and second stage
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 3 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Circuit nodes
• 3-node for analisys (3 virtually grounded in ac)
• Load affects stability!
(WL
)8
=(
WL
)7(
WL
)5>>
(WL
)7
(Typically x10)
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 4 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Circuit DC gain
• Small-signal model (node 2 is low-resistance node).
go2,4 = go2 + go4
G ′L = GL + go5 + go6
C ′L = CL + C4
Av = vovin
= vivin
vovi
=(
gm1go2,4
)(gm6
G ′L
)= Av1Av2
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 5 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Pole splitting effect
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 6 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Circuit poles
• Circuit poles without Cc
• fp1 =go2,4
2πC1→ C1 = CGD2 + CDB2 + CGD4 + CDB4 + CGS6
• fp4 =G ′
L
2π(CL+C4) → C4 = CGD5 + CDB5 + CDB6
• fp2 = gm3
2πC2→ C2 = CGS3 +CDB3 +CGS4 +CGD4 +CGD1 +CDB1
• fp2 goes to high frequency forming a pole-zero pair, so can beneglected.
• Adding Cc the dominant pole becomes more dominant;BW ≈ fd =
go2,4
2πAv2Cc(applying Miller effect)
GBW ≈ gm12πCc
• Non-dominant pole, assuming C1 << Cc ,C′Landgm6 >> G ′L;
fnd ≈ gm6
2πC ′L
• PM ≈ 90◦ − arctg GBWfnd→ fnd = 3GBW (PM ≈ 70◦)
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 7 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OPamp - Cc and GBW,PM
• Variation of poles and zeros with Cc
• Cc value is fundamental to achieveenough GBW and PM
• GBW ≈ gm12πCc
• PM ≈ 90◦ − arctg GBWfnd
• fnd ≈ gm6
2πC ′L, gm = 2ID
(VGS−VT )
• fnd = 3GBW (PM ≈ 70◦)
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 8 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - Steps for design
• Take a value for ID6 = ID5
• For M6;
1. Choose the overdrive voltage (ex. VGS − VT = 0.2).2. Obtain gm6 = 2.ID6
VGS6−VTand
(WL
)6
= gm6
K ′(VGS5−VT
3. Use minimum L6 to get W6
• Repeat for M5 (now use VGS − VT = 0.5 for better matching,reduced swing)
• Calculate Cc for desired Av .
• Use around a factor 10 between M5 and first stage bias.
• Iterate on simulation to fine tune values.
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 9 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
Miller OTA - schematicMiller OTA - analysisDesignCharacteristics
Miller OTA - characteristics
• Common mode input:VCMinMAX = VDD − VGS1 − VDS7
VCMinMIN = VSS + VGS3 − VDS1 − VGS1
• Output voltage range, with no RL rail-to-rail with somedistortion due to MOS linear operation close to rails.• Slew rate, non linear effect. Maximum rate output voltage
variation. SR =Ibias1st stage
Cc
• Output impedance: (will limit output voltage when RL)
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 10 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
SchematicCMFB
Fully Differential - schematic
Fully differential amplifiers show excellent CMRR and PSRR whichmake them very useful for mixed-signal design.
• No current mirror as load,just current sources.
• Nodes 1 and 2 becomesymmetric.
• GBW ≈ gm12πCL
Problem
Keep all transistors saturated,regulation of VB1,2
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 11 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
SchematicCMFB
Fully Differential - CMFB
• The common-mode output voltage is sensed and fed back toload sources (CMFB: Commmon-Mode FeedBack).
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IntroductionTwo Stage Amplifiers
Fully Differential amplifier
SchematicCMFB
Fully Differential - CMFB
• More usual implementation
c©[email protected] AABB: Two Stage / Fully Differential amplifiers 13 / 14
IntroductionTwo Stage Amplifiers
Fully Differential amplifier
SchematicCMFB
Fully Differential - Common mode equivalent circuit
• Open loop gain:AvCM = B1B2gm6RL
GBWCM = B1B2gm62πCL
• GBW can be madehigh with morepower.
• Condition:GBWCM > GBWDIFF
• The CMFB increasesthe CMRR.
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Exercise 1: Miller OTA
Design a Miller OTA with the following specifcations:
• AvDC = 100
• BW = 100MHz
• PM > 70◦
• Try to minimize power consumption.
Use RL = 1M, CL = 1pF .
Exercise 2: Fully differential amplifier
Design a Fully differential amplifier with CMFB with the followingspecifcations:
• AvDC = 100
• BW = 100MHz
• PM > 70◦
• Try to minimize power consumption.
Use RL = 1M, CL = 1pF .