Addressing the System-on-a- Addressing the System-on-a- Chip Interconnect Woes Through Chip Interconnect Woes Through Communication-Based Design Communication-Based Design J. J. Rabaey, Rabaey, M. M. Sgroi Sgroi , M. Sheets, A. Mihal, K. Keutzer, S. , M. Sheets, A. Mihal, K. Keutzer, S. Malik Malik , J. Rabaey, , J. Rabaey, A. Sangiovanni- A. Sangiovanni- Vincentelli Vincentelli University of California, Berkeley and Princeton University University of California, Berkeley and Princeton University
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Addressing the System-on-a-Addressing the System-on-a-Chip Interconnect Woes ThroughChip Interconnect Woes Through
Communication-based DesignCommunication-based Design•• OrthogonalizesOrthogonalizes function and communication function and communication•• Builds on well-known Builds on well-known models-of-computationmodels-of-computation and correct-by-construction and correct-by-construction synthesis flow synthesis flow•• Parallels Parallels layered approachlayered approach exploited by communications community exploited by communications community
How Does the Communication NetworkHow Does the Communication NetworkWorld Deal with these Problems?World Deal with these Problems?
• Scalable clusters ofheterogeneous networks
• Wide range of data unitsat different levels ofabstraction (streams,packets, bits)
• With varying throughput,latency and reliabilityrequirements
Clusters
Massive Cluster
Gigabit Ethernet
Central tenet: Layered approach standardized as the ISO-OSI Reference Model.
The ISO Protocol StackThe ISO Protocol Stack
• Reference model for wired andwireless protocol design —Alsouseful guide for for conceptionand decomposition of NOCs
• Layered approach allows fororthogonalization of concernsand decomposition of constraints
• Not required to implement alllayers of the stack
– depends upon application needs andtechnology
• Layered structure must notnecessarily be maintained in finalimplementation
– e.g., multiple layers can be mergedin implementation optimization
Reliable transmission over physical link +media access control (MAC)
(error detection and coding, multiple-access scheme, arbitration)
Example: Bus
The ISO Protocol StackThe ISO Protocol Stack
NetworkNetwork
TransportTransport
SessionSession
Data LinkData Link
PhysicalPhysical
Presentation/ApplicationPresentation/Application
Topology-independent end-to-endcommunication over multiple data links
(routing, bridging, repeaters)
Example: Statically-configured mesh network of FPGA
The ISO Protocol StackThe ISO Protocol Stack
NetworkNetwork
TransportTransport
SessionSession
Data LinkData Link
PhysicalPhysical
Presentation/ApplicationPresentation/ApplicationEstablish and maintain end-to-end
communications (flow control, messagereordering, packet segmentation and
reassembly)
Example: Establish, maintain and rip-upconnections in dynamically reconfigurable SOCs
The ISO Protocol StackThe ISO Protocol Stack
NetworkNetwork
TransportTransport
SessionSession
Data LinkData Link
PhysicalPhysical
Presentation/ApplicationPresentation/Application
Adds state to the end-to-end connectionprovided by the protocol stack
Example: Synchronous messaging, requiring sender and receiver to rendez-vous using semaphore
The ISO Protocol StackThe ISO Protocol Stack
NetworkNetwork
TransportTransport
SessionSession
Data LinkData Link
PhysicalPhysical
Presentation/ApplicationPresentation/ApplicationExports communication architecture to
system and performs data formatting andconversion
Example: Change byte-ordering of data to ensure compatibility
Example: The Pleiades Network-on-a-ChipExample: The Pleiades Network-on-a-Chip
Configuration
DedicatedArithmetic
Configuration Bus
Reconfigurable Interconnect Network
EmbeddedProcessor
FPGA MemoryAddress
Generator
ArithmeticProcessor
ArithmeticProcessor
..
..
Network Interface
• Programmable/configurable platform intended for low-energy communication and signal-processing applications (wireless, media)
• Allows for dynamic task-level reconfiguration of large-granularitymodules into dedicated “data-flow” accelerators
[Zhang, ISSCC 00]
MaiaMaia: Reconfigurable : Reconfigurable BasebandBasebandProcessor for WirelessProcessor for Wireless
A Session-level PerspectiveA Session-level Perspective
for(i=1;i<=L;i++)
for(k=i;k<=L;k++)
phi[i][k]= phi[i-1][k-1]
+in[NP-i]*in[NP-k]
-in[NA-1-i]*in[NA-1-k];
endstart
Embedded processor
AddrGen
MEM: in
ALU
ALU
AddrGen
MEM: phiMPY MPY
Code seg
Code seg
Set up connections
“Configure” modules
The Network LayerThe Network Layer
UniversalSwitchbox
Cluster
Cluster
Level-1 Mesh Level-2 Mesh
HierarchicalSwitchbox
• Network statically configured at start of session and ripped up at end• Structured approach reduces interconnect energy with factor 7 over straightforward cross-bar
ØLatency after slice granted isuser-specified between 2-7Bus Clock cyclesSilicon Backplane
Model in VCC
Example: The MESCAL Architecture*Example: The MESCAL Architecture*• A MESCAL Communication Architecture is a general,
coarse-grained interconnection scheme for systemcomponents
• Communicators are Processing Elements, I/Os, Memories,Switches, Reconfigurable fabrics
IOIOIO IOIOIO IOIOIO
ProcessingElement
ProcessingProcessingElementElement
ProcessingElement
ProcessingProcessingElementElement
SWSWSW
SWSWSW
MEMMEMMEM MEMMEMMEM
PEPEPE ReconfigurableReconfigReconfigurableurable
*MESCAL is a GSRC project, targeting full-programmable SOC design
ApplicationApplicationApplication
TransportTransport
NetworkNetwork
Data LinkData Link
PhysicalPhysicalPhysicalPEPE
LocalMemoryLocal
Memory
CacheCache
CommunicationAssist
CommunicationAssist
The MESCAL Interconnect ArchitectureThe MESCAL Interconnect Architecture• Stack layers map to software
and hardware components:– PE software– CA software– CA hardware– Channel Hardware
Communicator
Communication Architecture DesignCommunication Architecture Design• Describe a stack at each node using a formal Ptolemy model• Describe the interconnect topology• Use a correct-by-construction synthesis approach to
implement on a programmable platform
ProcessingElement
ProcessingProcessingElementElement
ProcessingElement
ProcessingProcessingElementElement
SummarySummary
• Designing a SOC has become a communications-design problem
• Refinement-based formal methodology, inspiredby OSI protocol stack, leads to predictable,verifiable and testable solution
• Methodology opens the door for innovativesolutions to the interconnect problem– Ultra-low swing signals with error-correction and
retransmission– Data compression for high-rate links– Globally asynchronous design– Dynamic routing of data (see talk of Bill Dally)