Analog To Digital Converters Damien Gaudry Russell Marzette Cindy Perreira February 5, 2003 Presentation Outline Introduction – What is an analog to digital converter? – What are the different types and their advantages? Successive Approximation ADC example ADC and the HC11 Applications
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Analog To Digital Converters
Damien Gaudry Russell MarzetteCindy Perreira
February 5, 2003
Presentation Outline
Introduction– What is an analog to digital converter?– What are the different types and their advantages?
Successive Approximation ADC exampleADC and the HC11Applications
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What is an Analog to Digital Converter?
Analog signals have infinite states available– mercury thermometer– needle speedometer
Digital signals have two states - on (1) or off (0)– lights (on or off)– door (open or closed)
ADC digitize an analog signal by converting data with infinite states to a series of pulses. The amplitudes of these pulse can only achieve a finite number of states.
What is an Analog to Digital Converter?
Converting analog signals into binary words
Sample and hold
Input A/D Conversion
Output
Equally spacedDigital signal
analog signal
Clock signal
analog signal
segment
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What is an Analog to Digital Converter?
Conceptually, conversion is a two step process:
– Quantizing - breaking down analog value into a a set of finite states.
– Coding - assigning a digital word or number to each state.
Quantizing
012345678
0.00-1
.25
1.25-2
.50
2.50-3
.75
3.75-5
.00
5.00-6
.25
6.25-7
.50
7.50-8
.75
8.75-1
0.00
Dicretized Voltage Ranges
Out
put S
tate
s Takes 0-10v signals and separates it into set of discrete out ranges.
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Quantizing
How many states are possible?– Based on number of bit combinations that the
converter can output.
N=2n where n is number of bits (8)
– Number of decision points = N-1 (7)– Analog quantization size
Q=(Vmax-Vmin)/N (1.25 V)
Coding
0.00
-1.2
51.
25-2
.50
2.50
-3.7
53.
75-5
.00
5.00
-6.2
56.
25-7
.50
7.50
-8.7
58.
75-1
0.00
Dicretized Voltage Ranges
7 1 11
6 1 10
5 1 01
4 1 00
3 0 11
2 0 10
1 0 01
0 0 00
O utp ut State
Ou tput C od e
Output state is assigned digital word
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Accuracy
ADC accuracy can be improved by:
– increasing resolution of ADC
– increasing sampling rate of ADC
Accuracy - Resolution
0
1
2
3
4
5
6
7
8
9
Time
Sig
nal V
alue
0
1
2
3
4
5
6
7
8
9
Time
Sig
nal V
alue
Low High
Resolution = analog quantization size (Q)
Resolution = 2.50 v Resolution = 1.25 v
2 bit converter
3 bit converter
10v/22=2.50v
10v/23=1.25v
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Accuracy - Sampling Rate
0
1
2
3
4
5
6
7
8
9
Time
Sig
nal V
alue
0
1
2
3
4
5
6
7
8
9
TimeS
igna
l Val
ue
Low High
Sampling rate - Frequency which ADC evaluates analog signal
1 Hz 2 Hz
Sampling Rate - Aliasing
Rule of thumb -Use a sampling frequency at least twice as high as the signal to avoid aliasing.
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Accuracy
0
1
2
3
4
5
6
7
8
9
Time
Sig
nal V
alue
0
1
2
3
4
5
6
7
8
9
TimeS
igna
l Val
ueBoth sampling rate and resolution can be increased to obtain better accuracy.
If Vin = 6.00v, then the first 4 comparators from the bottom will return a logic high signal while the top three will return a low signal.
Octal 4 = Binary 100
Comparator
resistor
Octal to Binary Encoder
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Flash (Parallel) Converter
Advantages– Very Fast
Disadvantages– Lower resolution (many comparators are required
for higher resolution: 8 bit = 255 comparators)– Higher cost
Dual-Slope Converter
CTRL allows capacitor (C) to charge with rate given by Vin/RC for time T0 (N0 clock cycles). Then CTRL switched and allows capacitor to discharge for to time T1 (N1clock cycles) at a rate given by Vref/RC.
CR
Vref/N1=Vin/N0
Vin/RCVref/RC Vref and N0 are known and N1 is
measured, so:
Vin=(N1/N0)Vref
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Dual-Slope Converter
Advantages– Higher resolution– Higher accuracy– Lower cost– Good noise immunity
Disadvantages– Slow
Voltage-to-Frequency Converters
Converter takes in a voltage (Vin) and returns a series of pulses. Frequency of pulses is proportional to Vin.
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Voltage-to-Frequency Converters
Advantages– Excellent noise reduction
Disadvantages– Slow– Generally limited to 10bits or less
Successive Approximation Converter
Guess the answer, use a D/A to convert it to an analog voltage and compare it to the voltage being measured – adjust your guess accordingly
Similar to the ordering weighing (on a scale) of an unknown quantity on a precision balance, using a set of weights, such as 1g, 0.5g, 0.25g, etc.
Result
Control Logic
Digital toAnalog
Converter
VIN
VREFH VREFL
+-
Comparator
Digital Output
SetBit
ClearBit
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Successive Approximation Converter
ReliableCapable of high speedConversion time is clock rate times number of bits.– Example with 8-bit, 2-MHz clock rate:
Conversion time= (clock period) x (#bits being converted)Conversion time= (0.5 micro-sec) x (8-bits) = 4µs
Summary of Convert Types
Converter Type Speed Resolution Noise Immunity CostVoltage/Frequency slow 14-24 good medium
Dual Slope slow 12-18 good lowSuccessive Approximation medium 10-16 little low
Flash (Parallel) fast 4-8 little high
*Resolution given in bits.
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Successive Approximation Example
10-bit resolution or 0.0009765625V of Vref
Vin =0.6VVref =1VFind the digital value of Vin
.000976562510
.0019521259
.003906258
.00781257
.0156256
.031255
.06254
.1253
.252
.51
VoltageBit
Successive Approximation Example (cont.)
MSB (bit 1)– Divide Vref by 2 = .5V– Compare Vref /2 with Vin
– If Vin is greater, turn MSB* ON– If Vin is less than Vref /2, turn MSB off
– Compare Vin=0.6V and V= 0.5V – Since 0.6 > 0.5 → MSB =1 (turned on)
1
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Successive Approximation Example (cont.)
Calculate the state of MSB-1 (bit 2)– Compare Vin =0.6V and V=Vref /2 + Vref/4 = 0.5+0.25 = 0.75V– Since 0.6 < 0.75 → MSB-1 =0 (turned off)
Calculate the state of MSB-2 (bit 3)– Go back to the last voltage value that caused it to be turned on (in
this case 0.5V) and add Vref/8 to it and compare with Vin.– Compare Vin and (0.5 + (Vref/8)=0.625)– Since 0.6 < 0.625 → MSB-2 =0 (turned off)
001
Successive Approximation Example (cont.)
Calculate the state of MSB-3 (bit 4)– Go back to the last voltage value that caused it to
be turned on (in this case 0.5V) and add Vref/16 to it and compare with Vin.
– Compare Vin and (0.5 + (Vref/16)=0.5625)– Since 0.6 > 0.5625 → MSB-3 =1 (turned on)
1001
…MSB-3MSB-2MSB-1MSB
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Successive Approximation Example (cont.)
Digital Results:
Results =
0
0.2
0.4
0.6
0.8
1
9 8 7 6 5 4 3 2 1 0
Bit
Vol
tage
0 0 11 1 01001
… LSBMSB-3MSB-2MSB-1MSB
V599609375.512
1256
1321
161
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=++++
A/D Conversion w/ MC68HC11A8
8-Channel, 8-BitSuccessive Approximation ConverterFour Main Hardware Components– Multiplexer – Analog Converter– Digital Control – Results Storage
Single & Multiplexed Modes
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Successive Approximation: Low Level Hardware
All Capacitor Charge-Redistribution– An array of eight capacitors is charged during the sampling
period using the analog input signal.
– In simplest terms each capacitor corresponds a bit in the Successive Approximation Register (SAR), the content of which is the digitized analog input.
– From MSB to LSB the capacitors are switched to the high voltage line, VRH and a comparator is used to determine whether to leave a capacitor high or low.
Successive-Approximation: Components
A/D Charge Pump – This drives the analog logic switches of the multiplexer and
capacitor array.– Note: the ADC will not work unless the charge pump has been
turned on using the OPTION Register (#$1039)Clocks
– The clock used as the “conversion” clock affects the accuracy ofyour conversion (set also by OPTION Register).
– E clock: Has the advantage of providing synchronization with the system clock, avoiding noise and other conflicts.
– Resistor-Capacitor OscillatorIn order to avoid unfavorable conflicts employees a delay between each conversion.
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Successive-Approximation: Components (cont)
A/D System Configuration Register (OPTION)
COP Timer Rate Select Bits[1:0]CR
Clock Monitor Enable Bit3CME
Enable Oscillator Start-up Display4DLY
Configure IRQ for Edge Sensitive Only Operation5IRQE
Clock Select Bit (0 – E clock, 1 –RC Oscillator)6CSEL
A/D Power-Up Bit7ADPU
DescriptionBitFlag
Successive-Approximation: Components (cont)
A/D System Configuration Register (OPTION) – (cont)
DLY – Control delay after resume from STOP (if 0 MCU resumes in 4 bus cycles, if 1 MCU waits 4000 E-clock cycles)
Almost always set to E-clock02MHz
If using EEPROM (EEPROM has a separate charge pump affected by CSEL)1
To ensure highest accuracy during conversion.0750KHz 2MHz
E – clock is to slow to ensure conversion before significant charge loss occurs.1< 750 KHz
What & WhyCSELE – Clock Freq.
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Stop and Wait Modes
Stop or Wait Modes will suspend a conversion.– As Wait Mode is terminated, the A/D circuits are
stable and valid results will be immediately obtained.
– In Stop Mode, the analog converter is partially shut down, a delay must be present upon its termination (affected by DLY flag of OPTION register).
Successive-Approximation: Components (cont)
A/D Control/Status Register (ADCTL)
Channel Select Bit3,2,1,0CD, CC, CB, CA
Multiple-Channel/Single-Channel Control Bit4MULT
Continuous Scan Control Bit5SCAN
Conversions Complete Flag7CCF
DescriptionBitFlag
The ADCTL must be written to initiate conversion.
An in progress conversion can be halted by initiating a new write to this register.
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Successive-Approximation: Components (cont)
A/D Control/Status Register (ADCTL) – (cont)
MULT = 0 MULT=1
SCAN = 0
Single Channel: One channel converted four times consecutively.
The results are stored in ADR1-ADR4. Conversion stops.
Multi Channel: Four channels are converted successively, stored in ADR1-ADR4. Conversion stops.
SCAN = 1
One channel is converted repeatedly. The results are written to ADR1-ADR4, wrapping around
and overwriting data.
Multi Channel: Four channels are converted continuously. Store in
ADR1-ADR4. The results are written to ADR1-ADR4, wrapping around
and overwriting data and the channels are cycled through.
Single, Multi-channel, and Scanning Flag Descriptions
Successive-Approximation: Components (cont)
A/D Control/Status Register (ADCTL) – (cont)
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Successive-Approximation: Components (cont)
A/D Result Registers
Successive-Approximation: Components (cont)
Conversion Time Line (Sequence)
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Successive-Approximation: Components (cont)
Conversion Time Line (Sequence) – (Cont)
– Conversion begins one clock cycle after a write to the ADCTL register was initiated.
– Stabilization of the analog bias voltages require a delay of as much as 100µs.
ADC Hardware Components
MultiplexerAnalog Converter Digital ControlResult Registers
PORT E
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Multiplexer
The multiplexer is Port EPort E, accepts digital inputs or analog inputs that are to be converted.Users of Port E should take care not to attempt to read a digital input at the same time as an analog input.
Notes of Voltages
With respect to conversion VRL and VRH convert to $00 and $FF (full scale).Charge pump allows a maximum VRH of 7-8V(Typical values however a indicated in the table to follow).A/D input should not go below Vss = VRL = 0, otherwise permanent damage can occur to the hardware.Other:
– External clamping diodes– Maximum external source impedance (10kΩ) – Errors!!!– Minimum-desirable source impedance (should limit current to
25mA) – Damaged Hardware!!!– Rate of charge of analog signal if external low-pass filter is used
(Less that ideal RC selection may cut out meaning full transitions)
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A/D Converter Applications
Strain GagesLoad CellsThermocouplesPressure TransducersData Acquisition DevicesProcess and StoreMicrophones (voice circuitry)Digital Music RecordingDigital Speedometer