a4 Led Moving Message Display

8/9/2019 a4 Led Moving Message Display

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LED MOVING MESSAGE DISPLAY

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www.BEProjectReport.com Page 2

CHAPTER 1

INTRODUCTION

WHAT IS MOVING MESSAGE DISPLAY

The scrolling message display will allow the user to type in any alphanumeric message and see itdisplayed through an array of red LED’s (Light Emitting Diodes). A block diagram illustrating this

process is depicted.

This project will be an embedded system, so the display will be able to scroll messages anywherethere is a wall outlet. It will be dependent on a PC for user input. Messages can be created and savedon the display’s microcomputer by use of a terminal program on a PC. The PC and microcomputerwill communicate via serial port. After the message is created and saved, the display can be detachedfrom the PC and then plugged in elsewhere to scroll the message. The array of LED’s will beconfigured together on a single board called a module.

The circuit board was designed with the microcontroller located on the back of the circuit boardleaving just the display and reset button on the front. Your message is hard coded into code spacewithin the microcontroller..


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WHAT DO WE NEED?

Fully micro controller based interface using PIC16F72

Display size: 8x34 pixels, (26.5.cm) x (5.5.cm)

Input Power: 8 -12V DC, 500mA

RS232 serial port interface

Windows based interface – works with WIN95, 98, 2000, ME and XP

Power-On LED indicator

Data receiving LED

Diode protection against reverse polarity connection of power supply.

BASIC COMPONENT REQUIRED:

PIC16F72

CONTROL CIRCUIT

DISPLAY BOARD

COMPUTER

HOW DOES IT WORK??

We need to dump the code which we have written in c compiler into the PIC16F72, and later weassemble the control circuit and fix the male connectors and also the serial port to pc. Now we setupthe software into computer and when we type the messages in the computer we get the display.Thisis how it works.


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CHAPTER 2

MICROCONTROLLER

ABOUT MICRO CONTROLLERS

The Intel 8051 is Harvard architecture, single chip microcontroller (µC) which wasdeveloped by Intel in 1980 for use in embedded systems.

Intel's original versions were popular in the 1980s and early 1990s, but has today largely beensuperseded by a vast range of faster and/or functionally enhanced 8051-compatible devicesmanufactured by more than 20 independent manufacturers including Atmel, Infineon Technologies

(formerly Siemens AG), Maxim Integrated Products (via its Dallas Semiconductor subsidiary), NXP(formerly Philips Semiconductor), Nuvoton (formerly Winbond), ST Microelectronics, SiliconLaboratories (formerly Cygnal), Texas Instruments and Cypress Semiconductor.

CONTROLLER WHICH WE USED AND ITS SPECIFICATIONS

PIC 16F72 Micro controller

PIC (Peripheral interface controller) is the IC while was eveloped to control the peripheraldevice, dispersing the function of the main CPU. PIC has the calculation function and the memorylike the CPU and is controlled by the software. However the throughput, the memory capacity aren't

big. It depends on kind of PIC but the maximum operation clock frequency is about 20MHZ and thememory capacity to write the program is about 1K to 4K words. The clock frequency is related withthe speed to read the program and to execute the instruction. Only at the clock frequency, thethroughput cannot be judged. It changes with the architecture in the processing parts for samearchitecture; the one with the higher clock frequency is higher about the throughput. The point,which the PIC convenient for is that the calculation part, the memory, the input/output part and soon,are incorporated into one piece of the IC. The efficiency, the function is limited but can compose thecontrol unit only by the PIC even if it doesn't combine the various IC's so, the circuit can be

compactly made .

The PIC16F72 belongs to the Mid-Range family of the PIC devices.

Core architecture

The PIC architecture is distinctively minimalist. It is characterized by the following features:

Separate code and data spaces (Harvard architecture) A small number of fixed length instructions Most instructions are single cycle execution (4 clock cycles), with single delay cycles upon branches

and skips


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A single accumulator (W), the use of which (as source operand) is implied (i.e. is not encoded in theopcode)

All RAM locations function as registers as both source and/or destination of math and other functions. A hardware stack for storing return addresses A fairly small amount of addressable data space (typically 256 bytes), extended through banking Data space mapped CPU, port, and peripheral registers The program counter is also mapped into the data space and writable (this is used to implement

indirect jumps).

Unlike most other CPUs, there is no distinction between memory space and registerspace because the RAM serves the job of both memory and registers, and the RAM is usually justreferred to as the register file or simply as the registers.

Data space (RAM)

PICs have a set of registers that function as general purpose RAM. Special purposecontrol registers for on-chip hardware resources are also mapped into the data space. Theaddressability of memory varies depending on device series, and all PIC devices have some bankingmechanism to extend the addressing to additional memory. Later series of devices feature moveinstructions which can cover the whole addressable space, independent of the selected bank. Inearlier devices (i.e., the baseline and mid-range cores), any register move had to be achieved via theaccumulator.

To implement indirect addressing, a "file select register" (FSR) and "indirect register"(INDF) are used: A register number is written to the FSR, after which reads from or writes to INDF

will actually be to or from the register pointed to by FSR. Later devices extended this concept with post- and preincrement/decrement for greater efficiency in accessing sequentially stored data. Thisalso allows FSR to be treated almost like a stack pointer (SP).

External data memory is not directly addressable except in some high pin count PIC18 devices.

Code space

All PICs feature Harvard architecture, so the code space and the data space are separate.

PIC code space is generally implemented as EPROM, ROM, or flash ROM.

In general, external code memory is not directly addressable due to the lack of an externalmemory interface. The exceptions are PIC17 and select high pin count PIC18 devices.

Word size

The word size of PICs can be a source of confusion. All PICs handle (and address) data in 8-bitchunks, so they should be called 8-bit microcontrollers. However, the unit of addressability of thecode space is not generally the same as the data space. For example, PICs in the baseline and mid-range families have program memory addressable in the same wordsize as the instruction width, ie.


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12 or 14 bits respectively. In contrast, in the PIC18 series, the program memory is addressed in 8-bitincrements (bytes), which differs from the instruction width of 16 bits.

In order to be clear, the program memory capacity is usually stated in number of (single word)instructions, rather than in bytes.

Stacks

PICs have a hardware call stack, which is used to save return addresses. The hardware stack is notsoftware accessible on earlier devices, but this changed with the 18 series devices.

Hardware support for a general purpose parameter stack was lacking in early series, but this greatlyimproved in the 18 series, making the 18 series architecture more friendly to high level languagecompilers.

Instruction set

A PIC's instructions vary from about 35 instructions for the low-end PICs to over 80instructions for the high-end PICs. The instruction set includes instructions to perform a variety ofoperations on registers directly, the accumulator and a literal constant or the accumulator and aregister, as well as for conditional execution, and program branching.

Some operations, such as bit setting and testing, can be performed on any numbered register, but bi-operand arithmetic operations always involve W; writing the result back to either W or theother operand register. To load a constant, it is necessary to load it into W before it can be movedinto another register. On the older cores, all register moves needed to pass through W, but thischanged on the "high end" cores.

PIC cores have skip instructions which are used for conditional execution and branching. Theskip instructions are: 'skip if bit set', and, 'skip if bit not set'. Because cores before PIC18 had onlyunconditional branch instructions, conditional jumps are implemented by a conditional skip (with theopposite condition) followed by an unconditional branch. Skips are also of utility for conditionalexecution of any immediate single following instruction.

The PIC architecture has no (or very meager) hardware support for automatically saving processor state when servicing interrupts. The 18 series improved this situation by implementingshadow registers which save several important registers during an interrupt.

In general, PIC instructions fall into 5 classes:

1. Operation on W with 8-bit immediate ("literal") operand. E.g. movlw (move literal to W),

andlw (AND literal with W). One instruction peculiar to the PIC is retlw, load immediate intoW and return, which is used with computed branches to produce lookup tables.


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2. Operation with W and indexed register. The result can be written to either the W register (e.g.addwf reg ,w). or the selected register (e.g. addwf reg ,f).

3. Bit operations. These take a register number and a bit number, and perform one of 4 actions:set or clear a bit, and test and skip on set/clear. The latter are used to perform conditional

branches. The usual ALU status flags are available in a numbered register so operations suchas "branch on carry clear" are possible.4. Control transfers. Other than the skip instructions previously mentioned, there are only two:

goto and call.5. A few miscellaneous zero-operand instructions, such as return from subroutine, and sleep to

enter low-power mode.

Performance

Many of these architectural decisions are directed at the maximization of top-end speed,or more precisely of speed-to-cost ratio. The PIC architecture was among the first scalar CPUdesigns, and is still among the simplest and cheapest. The Harvard architecture — in whichinstructions and data come from conveniently separate sources — simplifies timing and microcircuitdesign greatly, and this pays benefits in areas like clock speed, price, and power consumption.

The PIC is particularly suited to implementation of fast lookup tables in the programspace. Such lookups are O(1) and can complete via a single instruction taking two instruction cycles.Basically any function can be modelled in this way. Such optimization is facilitated by the relativelylarge program space of the PIC (e.g. 4096 x 14-bit words on the 16F690) and by the design of the

instruction set, which allows for embedded constants.

The simplicity of the PIC, and its scalar nature, also serve to greatly simplify theconstruction of real-time code. It is typically possible to multiply the line count of a PIC assemblerlisting by the instruction cycle time to determine execution time. (This is true because skip-basedinstructions take 2 cycles whether the skip occurs or doesn't.) On other CPUs (even the Atmel, withits MUL instruction), such quick methods are just not possible. In low-level development, precisetiming is often critical to the success of the application, and the real-time features of the PIC can savecrucial engineering time.

A similarly useful and unique property of PICs is that their interrupt latency is constant(it's also low: 3 instruction cycles). The delay is constant even though instructions can take one ortwo instruction cycles: a dead cycle is optionally inserted into the interrupt response sequence tomake this true. External interrupts have to be synchronized with the four clock instruction cycle,otherwise there can be a one instruction cycle jitter. Internal interrupts are already synchronized.

The constant interrupt latency allows PICs to achieve interrupt driven low jitter timing sequences.An example of this is a video sync pulse generator. Other microcontrollers can do this in some cases,

but it's awkward. The non-interrupt code has to anticipate the interrupt and enter into a sleep state

before it arrives. On PICs, there is no need for this.


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The three-cycle latency is increased in practice because the PIC does not store its registers whenentering the interrupt routine. Typically, 4 instructions are needed to store the W-register, the statusregister and switch to a specific bank before starting the actual interrupt processing.

Limitations

The PIC architectures have several limitations:

Only a single accumulator A small instruction set Operations and registers are not orthogonal; some instructions can address RAM and/or

immediate constants, while others can only use the accumulator Memory must be directly referenced in arithmetic and logic operations, although indirect

addressing is available via 2 additional registers Register-bank switching is required to access the entire RAM of many devices

The following limitations have been addressed in the PIC18, but still apply to earlier cores:

Conditional skip instructions are used instead of conditional jump instructions used by mostother architectures

Indexed addressing mode is very rudimentary Stack:

o The hardware call stack is so small that program structure must often be flattenedo

The hardware call stack is not addressable, so pre-emptive task switching cannot beimplementedo Software-implemented stacks are not efficient, so it is difficult to generate reentrant

code and support local variables Program memory is not directly addressable, and thus space-inefficient and/or time-

consuming to access. (This is true of most Harvard architecture microcontrollers.)

With paged program memory, there are two page sizes to worry about: one for CALL and GOTOand another for computed GOTO (typically used for table lookups). For example, on PIC16, CALLand GOTO have 11 bits of addressing, so the page size is 2048 instruction words. For computed

GOTOs, where you add to PCL, the page size is 256 instruction words. In both cases, the upperaddress bits are provided by the PCLATH register. This register must be changed every time controltransfers between pages. PCLATH must also be preserved by any interrupt handler.

Compiler development

These properties have made it difficult to develop compilers that target PIC microcontrollers. Whileseveral commercial compilers are available, in 2008, Microchip finally released their C compilers,C18, and C30 for their line of 18f 24f and 30/33f processors. By contrast, Atmel’s AVR

microcontrollers — which are competitive with PIC in terms of hardware capabilities and price, butfeature a RISC instruction set — have long been supported by the GNU C Compiler.


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0000 001 fffff MOVWF f Move W to f

0000 010 xxxxx CLRW Clear W to 0 (a.k.a CLR x,W)

0000 011 fffff CLRF f Clear f to 0 (a.k.a. CLR f,F)

0000 10d fffff SUBWF f,d Subtract W from f (d = f − W)

0000 11d fffff DECF f,d Decrement f (d = f − 1)

0001 00d fffff IORWF f,d Inclusive OR W with F (d = f OR W)

0001 01d fffff ANDWF f,d AND W with F (d = f AND W)

0001 10d fffff XORWF f,d Exclusive OR W with F (d = f XOR W)

0001 11d fffff ADDWF f,d Add W with F (d = f + W)

0010 00d fffff MOVF f,d Move F (d = f)

0010 01d fffff COMF f,d Complement f (d = NOT f)

0010 10d fffff INCF f,d Increment f (d = f + 1)

0010 11d fffff DECFSZ f,d Decrement f (d = f − 1) and skip if zero

0011 00d fffff RRF f,d Rotate right F (rotate right through carry)

0011 01d fffff RLF f,d Rotate left F (rotate left through carry)

0011 10d fffff SWAPF f,d Swap 4-bit halves of f (d = f4)

0011 11d fffff INCFSZ f,d Increment f (d = f + 1) and skip if zero

0100 bbb fffff BCF f,b Bit clear f (Clear bit b of f)

0101 bbb fffff BSF f,b Bit set f (Set bit b of f)

0110 bbb fffff BTFSC f,b Bit test f, skip if clear (Test bit b of f)

0111 bbb fffff BTFSS f,b Bit test f, skip if set (Test bit b of f)


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1000 kkkkkkkk RETLW k Set W to k and return

1001 kkkkkkkk CALL k Save return address, load PC with k

101 kkkkkkkkk GOTO k Jump to address k (9 bits!)

1100 kkkkkkkk MOVLW k Move literal to W (W = k)

1101 kkkkkkkk IORLW k Inclusive or literal with W (W = k OR W)

1110 kkkkkkkk ANDLW k AND literal with W (W = k AND W)

1111 kkkkkkkk XORLW k Exclusive or literal with W (W = k XOR W)

Mid-Range core devices

These devices feature a 14-bit wide code memory, and an improved 8 level deep call stack. Theinstruction set differs very little from the baseline devices, but the increased opcode width allows 128registers and 2048 words of code to be directly addressed. The mid-range core is available in themajority of devices labeled PIC12 and PIC16.

The first 32 bytes of the register space are allocated to special-purpose registers; the remaining 96 bytes are used for general-purpose RAM. If banked RAM is used, the high 16 registers (0x70 – 0x7F)are global, as are a few of the most important special-purpose registers, including the STATUSregister which holds the RAM bank select bits. (The other global registers are FSR and INDF, thelow 8 bits of the program counter PCL, the PC high preload register PCLATH, and the masterinterrupt control register INTCON.)

The PCLATH register supplies high-order instruction address bits when the 8 bits supplied by awrite to the PCL register, or the 11 bits supplied by a GOTO or CALL instruction, is not sufficient toaddress the available ROM space.

14-bit PIC instruction set

Opcode (binary) Mnemonic Description

00 0000 0000 0000 NOP No operation

00 0000 0000 1000 RETURN Return from subroutine, W unchanged

00 0000 0000 1001 RETFIE Return from interrupt

00 0000 0110 0010 OPTION Write W to OPTION register


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00 0000 0110 0011 SLEEP Go into standby mode

00 0000 0110 0100 CLRWDT Reset watchdog timer

00 0000 0110 01ff TRIS f Write W to tristate register f

00 0000 1 fffffff MOVWF f Move W to f

00 0001 0 xxxxxxx CLRW Clear W to 0 (W = 0)

00 0001 1 fffffff CLRF f Clear f to 0 (f = 0)

00 0010 d fffffff SUBWF f,d Subtract W from f (d = f − W)

00 0011 d fffffff DECF f,d Decrement f (d = f − 1)

00 0100 d fffffff IORWF f,d Inclusive OR W with F (d = f OR W)

00 0101 d fffffff ANDWF f,d AND W with F (d = f AND W)

00 0110 d fffffff XORWF f,d Exclusive OR W with F (d = f XOR W)

00 0111 d fffffff ADDWF f,d Add W with F (d = f + W)

00 1000 d fffffff MOVF f,d Move F (d = f)

00 1001 d fffffff COMF f,d Complement f (d = NOT f)

00 1010 d fffffff INCF f,d Increment f (d = f + 1)

00 1011 d fffffff DECFSZ f,d Decrement f (d = f − 1) and skip if zero

00 1100 d fffffff RRF f,d Rotate right F (rotate right through carry)

00 1101 d fffffff RLF f,d Rotate left F (rotate left through carry)

00 1110 d fffffff SWAPF f,d Swap 4-bit halves of f (d = f4)

00 1111 d fffffff INCFSZ f,d Increment f (d = f + 1) and skip if zero

01 00 bbb fffffff BCF f,b Bit clear f (Clear bit b of f)

01 01 bbb fffffff BSF f,b Bit set f (Set bit b of f)


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01 10 bbb fffffff BTFSC f,b Bit test f, skip if clear (Test bit b of f)

01 11 bbb fffffff BTFSS f,b Bit test f, skip if set (Test bit b of f)

10 0 kkkkkkkkkkk CALL k Save return address, load PC with k

10 1 kkkkkkkkkkk GOTO k Jump to address k (11 bits)

11 00xx kkkkkkkk MOVLW k Move literal to W (W = k)

11 01xx kkkkkkkk RETLW k Set W to k and return

11 1000 kkkkkkkk IORLW k Inclusive or literal with W (W = k OR W)

11 1001 kkkkkkkk ANDLW k AND literal with W (W = k AND W)

11 1010 kkkkkkkk XORLW k Exclusive or literal with W (W = k XOR W)

11 110x kkkkkkkk SUBLW k Subtract W from literal (W = k − W)

11 111x kkkkkkkk ADDLW k Add literal to W (W = k + W)

PIC17 High End core devices

The 17 series never became popular and has been superseded by the PIC18 architecture. It is notrecommended for new designs, and availability may be limited.

Improvements over earlier cores are 16-bit wide opcodes (allowing many new instructions), and a 16level deep call stack. PIC17 devices were produced in packages from 40 to 68 pins.

The 17 series introduced a number of important new features:

a memory mapped accumulator read access to code memory (table reads) direct register to register moves (prior cores needed to move registers through the

accumulator) an external program memory interface to expand the code space an 8bit x 8bit hardware multiplier a second indirect register pair auto-increment/decrement addressing controlled by control bits in a status register

(ALUSTA)


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PIC18 High End core devices

Microchip introduced the PIC18 architecture in 2000. Unlike the 17 series, it has proven to be very popular, with a large number of device variants presently in manufacture. In contrast to earlier

devices, which were more often than not programmed in assembly, C has become the predominantdevelopment language.

The 18 series inherits most of the features and instructions of the 17 series, while adding a number ofimportant new features:

much deeper call stack (31 levels deep) the call stack may be read and written conditional branch instructions indexed addressing mode (PLUSW) extending the FSR registers to 12 bits, allowing them to linearly address the entire data

address space the addition of another FSR register (bringing the number up to 3)

The auto increment/decrement feature was improved by removing the control bits and adding fournew indirect registers per FSR. Depending on which indirect file register is being accessed it is

possible to postdecrement, postincrement, or preincrement FSR; or form the effective address byadding W to FSR.

In more advanced PIC18 devices, an "extended mode" is available which makes the addressing evenmore favorable to compiled code:

a new offset addressing mode; some addresses which were relative to the access bank arenow interpreted relative to the FSR2 register

the addition of several new instructions, notable for manipulating the FSR registers.

These changes were primarily aimed at improving the efficiency of a data stack implementation. IfFSR2 is used either as the stack pointer or frame pointer, stack items may be easily indexed — allowing more efficient re-entrant code. Microchip C18 chooses to use FSR2 as a frame pointer.

PIC24 and dsPIC 16-bit microcontrollers

In 2001, Microchip introduced the dsPIC series of chips , which entered mass production in late 2004.They are Microchip's first inherently 16-bit microcontrollers. PIC24 devices are designed as general

purpose microcontrollers. dsPIC devices include digital signal processing capabilities in addition.

Architecturally, although they share the PIC moniker, they are very different from the 8-bit PICs.The most notable differences are


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they feature a set of 16 working registers (W0-W15) they fully support a stack in RAM, and do not have a hardware stack bank switching is not required to access RAM or special function registers data stored in program memory can be accessed directly using a feature called Program Space

Visibility interrupt sources may be assigned to distinct handlers using an interrupt vector table

Some features are:

hardware MAC (multiply-accumulate) barrel shifting bit reversal (16×16)-bit single-cycle multiplication and other DSP operations hardware divide assist (19 cycles for 16-bit/32-bit divide)

hardware support for loop indexing Direct Memory Access

dsPICs can be programmed in C using a variant of gcc.

PIC32 32-bit microcontrollers

In November 2007 Microchip introduced the new PIC32MX family of 32-bit microcontrollers. Theinitial device line-up is based on the industry standard MIPS32 M4K Core. The device can be

programmed using the Microchip MPLAB C Compiler for PIC32 MCUs, a variant of the GCCcompiler. The first 18 models currently in production (PIC32MX3xx and PIC32MX4xx) are pin to

pin compatible and share the same peripherals set with the PIC24FxxGA0xx family of (16-bit)devices allowing the use of common libraries, software and hardware tools.

The PIC32 architecture brings a number of new features to Microchip portfolio, including:

The highest execution speed 80 MIPS (90+ Dhrystone MIPS @80 MHz) The largest FLASH memory: 512kbyte One instruction per clock cycle execution

The first cached processor Allows execution from RAM Full Speed Host/Dual Role and OTG USB capabilities Full JTAG and 2 wire programming and debugging Real-time trace


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In 1985 General Instruments spun off their microelectronics division, and the new ownershipcanceled almost everything — which by this time was mostly out-of-date. The PIC, however, wasupgraded with internal EPROM to produce a programmable channel controller, and today a hugevariety of PICs are available with various on-board peripherals (serial communication modules,

UARTs, motor control kernels, etc.) and program memory from 256 words to 64k words and more (a"word" is one assembly language instruction, varying from 12, 14 or 16 bits depending on thespecific PIC micro family).

PIC and PICmicro are registered trademarks of Microchip Technology. It is generally thought thatPIC stands for Peripheral Interface Controller , although General Instruments' original acronym forthe initial PIC1640 and PIC1650 devices was " Programmable Interface Controller ". The acronymwas quickly replaced with " Programmable Intelligent Computer "

The Microchip 16C84 (PIC16x84), introduced in 1993,was the first CPU with on-chip EEPROM

memory. This electrically-erasable memory made it cost less than CPUs that required a quartz "erasewindow" for erasing EPROM.

Device Programmers

A development board for low pin-count MCU, from Microchip

http://en.wikipedia.org/wiki/File:Pickit1_devboard.jpghttp://en.wikipedia.org/wiki/File:PIC16CxxxWIN.JPG


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MPLAB REAL ICE (USB 2.0 interface) : ICSP programming only PICKit 2 (USB interface) PICKit 3 (USB interface)

Legacy Microchip Programmers

MPLAB ICD2 (RS232 serial and USB 1.0 interface) : ICSP programming only PICKit 1 (USB interface) PRO MATE II (RS232 serial interface) : intelligent.

Third-Party Programmers

There are programmers available from other sources, ranging from plans to build your own, to self-assembly kits and fully tested ready-to-go units. Some are simple designs which require a PC to do

the low-level programming signalling (these typically connect to the serial or parallel port andconsist of a few simple components), while others have the programming logic built into them (thesetypically use a serial or USB connection, are usually faster, and are often built using PICs themselvesfor control). For a directory of PIC related tools and websites, see PIC microcontroller at the OpenDirectory Project.

These are some common programmer types:

Simple serial port ICSP programmerso These generally rely on driving the PIC's Vss line negative to get the necessary

voltage differences from programming. Hence they are compact and cheap but greatcare is needed if using them for in circuit programming.

Simple parallel port ICSP programmerso Simple to understand but often have much higher part counts and generally require

external power supplies. Intelligent programmers (some use USB port)

o Generally faster and more reliable (especially on laptops which tend to haveidiosyncrasies in the way they implement their ports) but far more complex to build(in particular they tend to use a PIC in the programmer which must itself be

programmed somehow).


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PIN DIAGRAM AND DEVICE OVERVIEW

High Performance RISC CPU:• Only 35 single word instructions to learn• All single cycle instruct ions except for program branches, which are two-cycle• Operating speed: DC - 20 MHz clock input

DC - 200 ns instruction cycle• 2K x 14 words of Program Memory, 128 x 8 bytes of Data Memory (RAM) • Pinout compatible to PIC16C72/72A and PIC16F872

• Interrupt capability • Eight -level deep hardware stack• Direct, Indirect and Relative Addressing modes

Peripheral Features:• High Sink/Source Current: 25 mA• Timer0: 8 -bit timer/counter with 8-bit prescaler• Timer1: 16 -bit timer/counter with prescaler, can be incremented during SLEEP via external

crystal/clock• Timer2: 8 -bit timer/counter with 8-bit period register, prescaler and postscaler

• Capture, Compare, PWM (CCP) module - Capture is 16-bit, max. resolution is 12.5 ns


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- Compare is 16-bit, max. resolution is 200 ns- PWM max. resolution is 10-bit

• 8 -bit, 5-channel analog-to-digital converter• Synchronous Serial Port (SSP) with SPI™ (Master/Slave) and I2C™ (Slave)

• Brown-out detection circuitry for Brown-out Reset (BOR)

CMOS Technology:• Low power, high speed CMOS FLASH technology • Fully static design • Wide operating voltage range: 2.0V to 5.5V • Industrial temperature range • Low power consumption:

- < 0.6 mA typical @ 3V, 4 MHz- 20 μA typical @ 3V, 32 kHz

- < 1 μA typical standby current

MEMORY ORGANIZATION

There are two memory blocks in the PIC16F72 device. These are the program memory and the datamemory. Each block has separate buses so that concurrent access can occur. Program memory anddata memory are explained in this section. Program memory can be read internally by the user codeThe data memory can further be broken down into the general purpose RAM and the SpecialFunction Registers (SFRs). The operation of the SFRs that control the ―core are described here. The

SFRs used to control the peripheral modules are described in the section discussing each individual peripheral module.

2.1 PROGRAM MEMORY ORGANIZATION

PIC16F72 devices have a 13-bit program counter capable of addressing a 8K x 14 program memoryspace. The address range for this program memory is 0000h - 07FFh. Accessing a location above the

physically implemented address will cause a wraparound.The RESET Vector is at 0000h and the Interrupt Vector is at 0004h.

DATA MEMORY ORGANIZATION

The Data Memory is partitioned into multiple banks that contain the General Purpose Registers andthe Special Function Registers. Bits RP1 (STATUS) and RP0 (STATUS) are the bank select

bits. Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for theSpecial Function Registers. Above the Special Function Registers are General Purpose Registers,implemented as static RAM. All implemented banks contain SFRs. Some ―high use SFRs from one

bank may be mirrored in another bank, for code reduction and quicker access (e.g., the STATUSregister is in Banks 0 - 3).


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I/O PORTS

Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features onthe device. In general, when a peripheral is enabled, that pin may not be used as a general purpose

I/O pin.

PORTA AND THE TRISA REGISTER

PORTA is a 6-bit wide, bi-directional port. The corresponding data direction register is TRISA.Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input (i.e., put thecorresponding output driver in a Hi-Impedance mode). Clearing a TRISA bit (= 0) will make thecorresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin).Reading the PORTA register, reads the status of the pins, whereas writing to it will write to the port

latch. All write operations are read-modify-write operations. Therefore, a write to a port implies thatthe port pins are read, this value is modified and then written to the port data latch. Pin RA4 ismultiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI

pin is a Schmitt Trigger input and an open drain output. All other RA port pins have TTL input levelsand full CMOS output drivers.

Other PORTA pins are multiplexed with analog inputs and analog VREF input. Theoperation of each pin isselected by clearing/setting the control bits in the ADCON1 register (A/D Control Register1). TheTRISA register controls the direction of the RA pins, even when they are being used as analoginputs. The user must ensure the bits in the TRISA register are maintained set when using them asanalog inputs.

PORTB AND THE TRISB REGISTER

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISB.Setting a TRISB

bit (= 1) will make the corresponding PORTB pin an input (i.e., put the corresponding output driverin a Hi-Impedance mode). Clearing a TRISB bit (= 0) will make the corresponding PORTB pin an

output (i.e., put the contents of the output latch on the selected pin).

PORTC AND THE TRISC REGISTER

PORTC is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISC.Setting a TRISC bit (= 1) will make the corresponding PORTC pin an input (i.e., put thecorresponding output driver in a Hi-Impedance mode). Clearing a TRISC bit (= 0) will make thecorresponding PORTC pin an output (i.e., put the contents of the output latch on the selected pin).PORTC is multiplexed with several peripheral functions PORTC pins have Schmitt Trigger input

buffers. When enabling peripheral functions, care should be taken in defining TRIS bits for each


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PORTC pin. Some peripherals override the TRIS bit to make a pin an output, while other peripheralsoverride the TRIS bit tomake a pin an input. Since the TRIS bit override is in effect while the peripheral is enabled, read-modifywrite

instructions (BSF, BCF, XORWF) with TRISC as destination should be avoided.

READING PROGRAM MEMORY

The FLASH Program Memory is readable during normal operation over the entire VDD range. It isindirectlyaddressed through Special Function Registers (SFR). Up to 14-bit wide numbers can be stored inmemory for use as calibration parameters, serial numbers, packed 7-bit ASCII, etc. Executing a

program memory location containing data that forms an invalid instruction results in a NOP. Thereare five SFRs used to read the program and memory:

• PMCON1 • PMDATL • PMDATH • PMADRL• PMADRH

The program memory allows word reads. Program memory access allows for checksum calculationand reading calibration tables.

SPECIAL FEATURES OF THE CPU

These devices have a host of features intended to maximize system reliability, minimize cost throughelimination of external components, provide power saving

Operating modes and offer code protection:

• Oscillator Selection • RESET

- Power-on Reset (POR)- Power-up Timer (PWRT)- Oscillator Start-up Timer (OST)- Brown-out Reset (BOR)

• Interrupts • Watchdog Timer (WDT) • SLEEP

• Code Protection • ID Locations

• In -Circuit Serial Programming


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These devices have a Watchdog Timer, which can be enabled or disabled using a configuration bit. Itruns off its own RC oscillator for added reliability. There are two timers that offer necessary delayson power-up. One is the Oscillator Start-up Timer (OST), intended to keep the chip in RESET untilthe crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a fixed

delay of 72 ms (nominal) on power-up only. It is designed to keep the part in RESET while the power supply stabilizes, and is enabled or disabled using a configuration bit. With these two timerson-chip, most applications need no external RESET circuitry.

SLEEP mode is designed to offer a very low current Power-down mode. The user can wake-up fromSLEEP through external RESET, Watchdog Timer Wake-up, or through an interrupt. Severaloscillator options are also made available to allow the part to fit the application. The RC oscillatoroption saves system cost while the LP crystal optionsaves power. Configuration bits are used to select the desired oscillator mode.

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Ambient temperature under bias........................................................... -55 to +125°CStorage temperature .............................................................................. -65°C to +150°CVoltage on any pin with respect to VSS(except VDD, MCLR. and RA4) .......................................................... -0.3V to (VDD + 0.3V)

Voltage on VDD with respect to VSS ................................................... -0.3 to +6.5V

Voltage on MCLR with respect to VSS (Note 2) ...................................0 to +13.5VVoltage on RA4 with respect to Vss .......................................................0 to +12VTotal power dissipation (Note 1) ............................................................1.0WMaximum current out of VSS pin ...........................................................300 mAMaximum current into VDD pin .............................................................250 mAInput clamp current, IIK (VI < 0 or VI > VDD).................................. • 20 mAOutput clamp current, IOK (VO < 0 or VO > VDD) ........................... .. 20 mAMaximum output current sunk by any I/O pin..........................................25 mAMaximum output current sourced by any I/O pin ....................................25 mA

Maximum current sunk by PORTA, PORTB...........................................200 mAMaximum current sourced by PORTA, PORTB .....................................200 mAMaximum current sunk by PORTC ............................................................200 mAMaximum current sourced by PORTC .......................................................200 mA

Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - Σ IOH} + Σ {(VDD -VOH) x IOH} + Σ(VOl x IOL) 2: Voltage spikes at the MCLR pin may cause unpredictable results. A series resistor of greater than1 kΩ should be used to pull MCLR to VDD, rather than tying the pin directly to VDD.


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CHAPTER 3

MOVING MESSAGE DISPLAY CIRCUIT

CIRCUIT OF MOVING MESSAGE DISPLAY:


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MAIN PARTS OF MOVING MESSAGE DISPLAY CIRCUIT

1. Micro controller

2. MCU Clock

3. Display Column selection

4. Display Row selection

5. Data communication

6. EEPROM interfacing

7. Program button interfacing

8. Power supply

9. LM7805 (3 TERMINAL VOLTAGE REGULATER)

10. 7X5 Dot Matrix Of 7 Character Long Board

1] Micro controller

PIC 16F72 is the heart of the circuit which calls all of the shots. In normal operation when thedisplay is scrolling a message its task is to read data from the EEPROM, clock out a pulse to thecolumn selector IC’s, which drive the columns, then spit out data at the rows. This is all donevery,very fast as you would imagine. A 20MHz crystal and associated 22pf caps provide a clocksourcefor the micro. All of the magic is in the software. The bulk of the hardware is configured as a―workhorse if you like. It’s a no brainier. During programming of the message into the display viathe Windows based software, the micros main role is to read the serial data and organize it into theEEPROM.


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PIC16F72 IMAGE

Programming the message involves pressing the program button of the unit so thatthe PIC micro is ready to receive serial data from the Windows based software. This data is thentransferred into a serial 24C256, 256Kb EEPROM for later recall. After successful programming thedisplay will scroll from right to left the message that you just programmed in. The scroll speed can

be ―tweaked via the Windows based software and you can set the number of times the messagerepeats. In dataterms, what’s actually stored on the EEPROM is the row data that is broken down from thecharacters that you program.

The characters are all upper case, In normal operation the PIC just scans through thisdata in the EEPROM and outputs it at the rows and provides a clock source that increment 5 columncounters that are connected to the columns. It’s just a common multiplexing arrangement procedure,


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2] MCU Clock

Clock signal for the micro controller provided by crystal Y1 (20MHZ) the two 22PF capacitorshanging off it ensure correct loading for the crystal, so that it starts reliably.


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3] Display Column selection

In essence a column selector IC receives clock pulses at its clock pin and in turn increments one ofits output lines (Q0 – Q7) sequentially. When first powered up Q0 will be set high. As soon as the

first clock pulse arrives Q0 will go low and Q1 will go high.At the arrival of the next pulse Q1 will swing low and Q2 will gohigh. There are only eight outputs on this IC so by itself it can’t possible be used to drive therequired 35 columns. T he solution is what’s called a cascaded arrangement.

All ofthe column selector IC’s outputs are buffered via ULN2803 – driver IC.

4] Display Row selection

The PIC directly controls the rows via emitter follower buffers (Q1 - Q7). These are also driven welland truly into saturation by their respective 4K7 base resistors. 22E resistors limit the peak current tothe LEDS.


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5] Data communication

RC3 on the micro is the RX line designated to receive the serial data from the PC, because we areonly using the RX line on the serial port to program in the message.

These communicate with PC serial (RS232) port via current limiting resistor(R20). LED L2 provides data receiver indication and is driven by port RC1 via a 220E resistor. theexcellent IO capabilities of the PIC micro controller range of devices, and the adoption of TTL levelson most modern PC serial ports, a line driver is often unnecessary unless long distances are involved

between the transmitter and the receiver. Instead a simple current limiting resistor is all that'srequired


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FLASH EEPROM – AT24Cxxx

The AT24C256 are 256K bit electrically erasable programmable memories(EEPROM), They are manufactured in SGS- THOMSON’s Hi -Endurance Advanced CMOS

technology, which guarantees an endurance of one million erase/write cycles with a data retention of40 years. The memories operate with a power supply value as low as 1.8V for the ST24Cxxx Thememories are compatible with the I2C standard , two wire serial interface which uses a bi-directionaldata bus and serial clock.

The memories carry a built-in 4 bit, unique device identification code (1010)corresponding to the I2C bus definition. This issued together with 2 chip enable inputs (E2, E1) sothat up to 4 x 4K devices may be attached to the I2C bus and selected individually. The memories

behave as a slave device in the I2C protocol with all memory operations synchronized by the serialclock.

Read and write operations are initiated by a START condition generated by the busmaster. The START condition is followed by a stream of 7 bits (identification code 1010), plus oneread/write bit and terminated by an acknowledge bit.


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LM7805 (3 TERMINAL VOLTAGE REGULATER)

This is used to make the stable voltage of +5V for U2 (MCU). The LM7805 is threeterminal positive regulators are available in the TO-220/D-PAK package and with several fixed

output voltages, making them useful in a wide range of applications. Each type employs internalcurrent limiting, thermal shut down and safe operating area protection, making it essentiallyindestructible. If adequate heat sinking is provided, they can deliver over 1A output current.Although designed primarily as fixed voltage regulators,

ASSEMBLY INSTRUCTIONS

Use the component overlay on the PCB to place the components starting with thelowest height components first. Make sure that the diode, LED and electrolytic capacitors areinserted the right way around.

1. Resistors and diodes

2. IC sockets

3. LED s

4. Ceramic capacitors. And crystal

5. Transistors (Q1 ~ Q7)

6. Electrolytic capacitors. Make sure you insert them the correctway around.

7. switches and Relimate connector

8. LM7805 regulators. Use needle nosed pliers to bend the leadsof the regulator. It does not require a heat sink. Screw downonto to PCB


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CHAPTER 4

CONTROL CIRCUIT AND COMPONENTS USED

CONTROL CIRCUIT AND COMPONENTS:

If we just made a big array of LED’s and controlled each one separately then we’dneed a chip with about 200 pins for this small sign, and hundreds or thousands more for a larger sign.By using a few handy control and power tec hniques we’ve managed to build a scrolling LED signwith a lot of functionality in a small package and everything runs on a very simple 8-bitmicrocontroller.

So how do we control 192 pixels with a 28 pin microcontroller? A process calledMultiplexing…it’s a lot like how you’re TV or computer screen works. Instead of trying to controleach pixel all the time we scan through them much faster than the eye can see. Take a look at theschematic – you can see how all of the LED’s a re connected. An individual LED has a cathode(negative) and anode (positive) lead. To make it light we just give it power and current flows fromanode to cathode. Every LED in a given row has a common anode (most of these connections aremade inside the L ED matrix) and they’re connected to a transistor to VCC. The microcontroller can turn on any of the 8 row transistors and provide that row with a path to VCC (+V).

Ok, now what about the cathode/negative terminal? On any given column all ofthe cathode are common and connect to the output pins of column selector IC (shift registers). That

pin can either be low/0/negative in which case it will not supply current to flow through the LED, orit can be high/1/positive.

Why use shift registers here, can’t we just connect directly to themicrocontroller? There are two good reasons why it’s designed this way and one has to do with

power .The other is that it’s difficult/expensive to find a mi crocontroller with enough output pins.We would need 35 output pins just to control all the columns, but in this setup we just use 2 pins to

provide clock and data to the shift registers. Also, this setup is infinitely expandable – just daisychain more shift registers together to make a longer display.

.


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CONTROL CIRCUIT LAY OUT

COMPONENTS REQUIRED TO ASSEMBLE CONTROL CIRCUIT

LED matrix board wire color code

Four pin Relimate connector (Control Signal INPUT)

PIN No Wire Color PIN NAME

1 Orange GND2 Red CLK3 Brown VCC4 Black DIN


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U1 - PIC16F72 Programmed Micro Controller

U2 - AT24C256 SERIAL EEPROM

U3 - LM7805 3 Terminal Voltage Regulator

Q1 ~ Q7 - BC547 NPN Transistors (7)

CN1 Three PIN Relimate connector (MALE)

CN2 FOUR PIN Relimate connector

CN3 SEVEN PIN Relimate connector

SW1 4 PIN TAG SWITCH

1nos Seven Digit LED Dot Matrix Display Board

2nos 14 PIN IC SOCKET FOR U1

1nos 8 PIN IC SOCKET FOR U2

1nos RS232 Data Cable


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CIRCUIT BEFORE EQUIPING ALL THE COMPONENTS

CONTROL CIRCUIT AFTER ASSEMBLING


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DISPLAY BOARD:

L.E.D. (Light Emitting Doide) are very exciting & excellent media for indoor & outdoor advertisingand are clearly visible from very long distance. Character matrix display panels are cheaper to build

than graphic matrix panels because fewer LEDs are used.

4.3 ABOUT MODULES AND LED MATRIX SCHEMATIC

The smallest LED array built with 5x7 matrix blocks that also fits a block built with 8x8 matrix

blocks is 8X34 pixels.This is called a matrix sub-block. Figure shows the matrix sub-block aslandscape format, which is the common orientation. The matrix sub-block rotated into portrait formatinstead.

Display size: 8x34 pixels, (26.5.cm) x (5.5.cm)


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The size of the target graphic panel should be an exact multiple of this matrix sub-block. If that can be achieved, the design will use the minimum number of drivers, and the software driver can treatthe display as an orthogonal array of these matrix sub-blocks.

LED MODULE

INTERFACING WITH PC

LED display circuit is interfaced to computer using serial port RS232. Now we install the setup incomputers and after installation open the page and we change the speed settings and enter the word

we want to display.

As we control th e display board using computer , this project is called ―PC INTERFACED LEDDOT MATRIX DISPLAY


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This is the software setup page where we type the required word. For example we have just typed ―THANKFUL TO DR K.ALICE MARY, EEE HOD. And now we get the display in the dot matrix

board.

RED FILTER AND SECURITY FOR CONTROL CIRCUIT AND DISPLAY

BOARD

For protecting the control board and the display board we can use playwood and make a box and fitthe circuit into it. Also if we cover the display board using red filter we get much glow compared tothe normal one.


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CHAPTER 5

CODE

CODE FOR PIC16F72

#include #include #define TRUE 1 /* define logical true / false */#define FALSE 0 /* values for bit variables */#define SCROLL_DELAY 2000 /* scroll delay */#define TIMER0_COUNT 0xFADA // 1.1msvoid delay_us(unsigned int d);typedef unsigned char byte; /* type define objects with */code unsigned char matrix[59][6]=

{0x00,0x00,0x00,0x00,0x00,0x00, //space0x00,0x00,0x7d,0x00,0x00,0x00, //!0x00,0x60,0x00,0x60,0x00,0x00, //"0x14,0x7f,0x14,0x7f,0x14,0x00, //#0x32,0x49,0x7f,0x49,0x26,0x00, //$0x62,0x64,0x08,0x13,0x23,0x00, //%0x36,0x49,0x35,0x02,0x05,0x00, //&0x00,0x00,0x00,0x50,0x60,0x00, //'

0x1c,0x22,0x41,0x00,0x00,0x00, //(0x00,0x00,0x41,0x22,0x1c,0x00, //)0x2a,0x1c,0x3e,0x1c,0x2a,0x00, //*0x08,0x08,0x3e,0x08,0x08,0x00, //+0x00,0x01,0x02,0x00,0x00,0x00, //,0x08,0x08,0x08,0x08,0x08,0x00, //-0x00,0x00,0x01,0x00,0x00,0x00, //.0x02,0x04,0x08,0x10,0x20,0x00, ///0x3e,0x45,0x49,0x51,0x3e,0x00, //0

0x00,0x21,0x7f,0x01,0x00,0x00, //10x27,0x49,0x49,0x49,0x31,0x00, //20x22,0x49,0x49,0x49,0x36,0x00, //30x0c,0x14,0x24,0x7f,0x04,0x00, //40x7a,0x49,0x49,0x49,0x46,0x00, //50x3e,0x49,0x49,0x49,0x26,0x00, //60x41,0x42,0x44,0x48,0x70,0x00, //70x36,0x49,0x49,0x49,0x36,0x00, //80x32,0x49,0x49,0x49,0x3e,0x00, //90x00,0x00,0x22,0x00,0x00,0x00, //:0x00,0x01,0x22,0x00,0x00,0x00, //;


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0x08,0x14,0x22,0x41,0x00,0x00, //<0x14,0x14,0x14,0x14,0x14,0x00, //=0x00,0x41,0x22,0x14,0x08,0x00, //>0x20,0x40,0x45,0x48,0x30,0x00, //?

0x3e,0x41,0x4d,0x4d,0x39,0x00, //@0x1f,0x24,0x44,0x24,0x1f,0x00, //A0x7f,0x49,0x49,0x49,0x36,0x00, //B0x3e,0x41,0x41,0x41,0x22,0x00, //C0x7f,0x41,0x41,0x22,0x1c,0x00, //D0x7f,0x49,0x49,0x49,0x41,0x00, //E0x7f,0x48,0x48,0x48,0x40,0x00, //F0x3e,0x41,0x41,0x45,0x26,0x00, //G0x7f,0x08,0x08,0x08,0x7f,0x00, //H0x00,0x41,0x7f,0x41,0x00,0x00, //I0x42,0x41,0x41,0x7e,0x40,0x00, //J0x7f,0x08,0x14,0x22,0x41,0x00, //K0x7f,0x01,0x01,0x01,0x01,0x00, //L0x7f,0x20,0x18,0x20,0x7f,0x00, //M0x7f,0x10,0x08,0x04,0x7f,0x00, //N0x3e,0x41,0x41,0x41,0x3e,0x00, //O0x7f,0x48,0x48,0x48,0x30,0x00, //P0x3c,0x42,0x46,0x42,0x3d,0x00, //Q0x7f,0x48,0x4c,0x4a,0x31,0x00, //R

0x32,0x49,0x49,0x49,0x26,0x00, //S0x40,0x40,0x7f,0x40,0x40,0x00, //T0x7e,0x01,0x01,0x01,0x7e,0x00, //U0x78,0x06,0x01,0x06,0x78,0x00, //V0x7f,0x02,0x0c,0x02,0x7f,0x00, //W0x63,0x14,0x08,0x14,0x63,0x00, //X0x60,0x10,0x0f,0x10,0x60,0x00, //Y0x43,0x45,0x49,0x51,0x61,0x00};//Z

code char TEST_MSG[]="WELCOME TO VIGNAN $";sbit LED_RCK = P1^1;sbit LED_SRCK = P1^0;sbit LED_SRCLK_H = P1^3;sbit LED_DATA = P1^4;sbit LED_G_L = P1^2;//sbit LED_RESET = P3^4;

bit timer0_tick;/*

use the free-running I timer to multiplex the led displays*/

void delay_us(unsigned int d){unsigned int i,m;


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m=d/14;for(i=0;i


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tmpCurrentChar = currentChar;for (i = 0; i


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CHAPTER 6

APPLICATION

This led display circuit is used to display messages at railway stations, buses and bus stations ,schools, hospitals etc.

Led display board are widely used in sensex , industries etc.

This led display boards are used for fun purposes like displaying their names on caps, shirts, wallsetc.

The use of LED display signs in manufacturing, reader boards on pylon signs, LED displays atevents, outdoor signs in place of static billboards, some creating new types of outdoor signage,electronic signs are dynamic in their ability to take the electronic sign to a whole new level of uses.LED channel letters and signage can be purchased from a number of supply distributors, dependingon the type you need. Illuminating channel letters used to always be done by neon, but LEDs are nowemerging as an alternative source. The overall features of LED channel letters on display signs arehigh brightness, lower cost in terms of energy efficiency and long operation life.


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CHAPTER 7

CONCLUSION AND RESULT

The project dot matrix led display circuit which is a scrolling message device is interfacedwith computer by a serial port. When the words are typed into the message box of the software setup.And after we reset the switch the message appears on to the screen. And we have been successfulwith this project , which we have done under the guidance of Dr.K.ALICE MARY, HOD EEEDepartment.

And we can type a long sentence of 4000 characters as well as store that sentence inEEPROM.


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BIBLIOGRAPHY

1. PICList FAQ and Archive from the "PICList" email list hosted at MIT. A well respected source

Of manufacturer-independent solutions, source code, and expertise.

2. PICNET Programmer Open Source Pic micro programmer.

3. GPUTILS Open Source assembler and linker.

4. Free software tools Free C, C++, Pascal, Basic compilers for the PIC microcontroller series.

5. Example of robot controlled by PIC16F877A: [12] [13]

6. USB Pic Programmer An open source project for a universal PIC programmer

7. A PIC microcontroller-based network I/O controller

8. Technical support is available through the web site at: http://support.microchip.com

9. PIC16F72 DATA SHEET

10. www.googlesearch.com

11. Wikipedia and blogs regarding moving message display circuits.
http://www.piclist.com/http://en.wikipedia.org/wiki/MIThttp://gputils.sourceforge.net/http://softwarepic.50webs.com/http://it.youtube.com/watch?v=NCo9fr7knK4http://it.youtube.com/watch?v=WoD_8QA2VSghttp://usbpicprog.org/http://www.cainetworks.com/manuals/webcontrol/WebControlUserGuide.pdfhttp://support.microchip.com/http://www.googlesearch.com/http://www.googlesearch.com/http://support.microchip.com/http://www.cainetworks.com/manuals/webcontrol/WebControlUserGuide.pdfhttp://usbpicprog.org/http://it.youtube.com/watch?v=WoD_8QA2VSghttp://it.youtube.com/watch?v=NCo9fr7knK4http://softwarepic.50webs.com/http://gputils.sourceforge.net/http://en.wikipedia.org/wiki/MIThttp://www.piclist.com/

a4 Led Moving Message Display

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