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ApiGetTcomStatus Gets target communication status of command execution
ApiGetOpenErr Gets error code after unsuccessful ApiOpenEx
ApiInstIntHandler Provides a pointer to the interrupt handler function
ApiDelIntHandler Removes the pointer interface to the interrupt handler function
ApiConnectToServer Establishes a network connection to a specified PC server where AIM Network Server (ANS) software is running.
ApiDisconnectFromServer Disconnects the network connection
ApiPrintfOnServer Prints message on console output of ANS console
ApiGetServerInfo Retrieves information about AIM boards installed on the ANS PC
ApiSetDllDbgLevel Sets the debug output level
ApiGetLibraryInfo Reads extended information about the current library settings
ApiGetBoardInfo Read extended information about the board capabilities.
Programmer's Guide for PCI 1553 Windows Applications 27
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-II System Function Descriptions
Function Description
ApiCmdIni Initializes AIM board and returns board configuration
ApiCmdReset Resets the AIM board and ASP driver software data to initial state
ApiCmdBite Performs a selftest on the AIM board
ApiCmdDefRespTout Defines the response timeout value (default is 14 µsec)
ApiCmdReadSWVersion Reads software version of AIM board target software
ApiReadBSPVersionEx Returns the version # of all AIM board s/w package components
ApiCmdPSCTimerCon Configures up to 4 PCI and System Controller (PSC) s/w timers
ApiCmdTimerIntrCheck Reads the interrupt status of the selected PSC s/w timer
ApiCmdBiuIntrCheck Reads the interrupt status of the selected BIU
ApiCmdLoadSRec Downloads S-Record formatted strings to the AIM board target
ApiCmdProgFlash Inserts data into the AIM board on-board Flash-PROM
ApiCmdExecSys Executes a system-related function on the AIM board
ApiCmdSetIrigTime Sets the time of the on-board IRIG timecode encoder
ApiCmdGetIrigTime Reads the time on the on-board IRIG timecode encoder
ApiCmdDefMilbusProtocol Defines MILbus Protocol type (A or B) for individual or single RTs
ApiReadRecData Provides for the storing of data recorded by the BM function to an application buffer
ApiWriteRepData Writes and copies replay data
ApiCmdSystagDef Defines the generation of dynamic data words or datasets in BC and RT mode
ApiCmdSystagCon Suspends or resumes the generation of dynamic data words or datasets in BC and RT mode.
ApiCmdTrackDefEx Defines an area (track) in the 1553 Data Buffer to be copied and stored in a Shared memory area and multiplexed with tracks from subsequent buffers transmitted/received with the same XID/RT SA
ApiCmdTrackPreAlloc Pre-allocates the memory of a list of multiplex states
ApiCmdTrackScan Get information of all received multiplex states
ApiCmdTrackReadEx Reads the multiplexed 1553 message data defined as a track with ApiCmdTrackDefEx
ApiCmdSysSetMemPartition Configures the Global RAM of the board
ApiCmdSysGetMemPartition Reads the configuration of the Global RAM of the board
ApiCmdReadDiscretes Reads from the onboard discrete register
ApiCmdWriteDiscretes Writes to the onboard discrete register
ApiCmdInitDiscretes Initializes the onboard discrete behaviour
ApiCmdSyncCounterGet Reads all synchronization counter values
ApiCmdSyncCounterSet Initializes the synchronization counter value
28 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-III Calibration Function Descriptions
Function Description
ApiCmdCalCplCon Sets up the physical MILbus coupling mode
ApiCmdCalSigCon Enables/disables 1 Mhz square wave calibration test signal
ApiCmdCalTransCon Controls the data rate of MILbus (500 kbps or 1 Mbps).
ApiCmdCalXmtCon Modifies the output amplitude of the MILbus/test signal
Table 3.2.3-IV Buffer Function Descriptions
Function Description
ApiCmdBufDef Defines the contents of the BC/RT transmit/receive message buffer
ApiCmdBufRead Reads the contents of the BC/RT transmit/receive message buffer
ApiCmdBufWrite Writes a data word/bits to variable positions of the BC/RT transmit/receive message buffer
ApiCmdRamWrite Writes data words to the AIM board global memory
ApiCmdRamRead Reads data words from the AIM board global memory
ApiCmdRamWriteLWord Writes data long word (32-bit) to the AIM board global memory
ApiCmdRamWriteWord Writes data word (16-bit) to the AIM board global memory
ApiCmdRamWriteByte Writes data byte (8-bit) to the AIM board global memory
ApiCmdRamReadLWord Reads data long word (32-bit) from the AIM board global memory
ApiCmdRamReadWord Reads data word (16-bit) from the AIM board global memory
ApiCmdRamReadByte Reads data byte (8-bit) from the AIM board global memory
ApiCmdRamWriteDataset Writes 32-word dataset to ASP Local RAM when in Dynamic Dataset mode
ApiCmdRamReadDataset Reads 32-word dataset from ASP Local RAM when in Dynamic Dataset mode
ApiReadMemData Reads a byte/word/longword from AIM board memory bypassing AIM board cmd/ack interface
ApiWriteMemData Writes a byte/word/longword to AIM board memory bypassing AIM board cmd/ack interface
ApiReadBlockMemData Reads a datablock from AIM board memory bypassing AIM board cmd/ack interface
ApiWriteBlockMemData Writes a datablock to AIM board memory bypassing AIM board cmd/ack interface
ApiCmdBufC1760Con Enables/Disables the generation of MIL-STD-1760 checksum
ApiBHModify Modifies the BC/RT buffer header on-the-fly
Programmer's Guide for PCI 1553 Windows Applications 29
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-V FIFO Function Descriptions
Function Description
ApiCmdFifoIni Initializes up to 32 FIFOs, each with up to 128 32-word buffers, in shared ASP Local RAM for 1553 transfers
ApiCmdFifoWrite Loads/reloads buffers of a FIFO with data
ApiCmdFifoReadStatus Reads the status of the number of 16-bit words in FIFO to reload
ApiCmdBCAssignFifo Links a BC transfer to a FIFO. The FIFO becomes the source of the BC message buffer data transmitted.
ApiCmdRTSAAssignFifo Links an RT data transmission to a FIFO. The FIFO becomes the source of the RT message buffer data transmitted.
30 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-VI Bus Controller Function Descriptions
Function Description
ApiCmdBCAcycPrep Defines the properties of the acyclic "on-the-fly" BC transfers to be inserted into the BC framing sequence
ApiCmdBCAcycSend Starts the insertion of the acyclic transfers into the BC framing sequence "on-the-fly" or at a pre-defined time
ApiCmdBCBHDef Defines a BC Buffer Header ID, Buffer Queue size, Queue mode & error protocol
ApiCmdBCBHRead Reads the Data Buffer ID, Buffer Queue size, Queue mode, and error protocol of a BC Buffer Header ID
ApiCmdBCDytagDef Defines the generation of dynamic data words for BC transmissions
ApiCmdBCFrameDef Defines the sequence of 1553 transfers within a minor frame with options for inserting delays, strobe pulse outputs, and skip transfer instructions
ApiCmdBCGetDytagDef Read Dytag settings for the generation of dynamic data words for BC-RT transfer type or for BC broadcast transfer type
ApiCmdBCGetMajorFrameDefinition Read the sequence of Minor Frames within the Major Frame
ApiCmdBCGetMinorFrameDefinition Read the sequence of Bus Controller Transfers within a Minor Frame sequence
ApiCmdBCGetXferBufferHeaderInfo Get the buffer header id of given transfer
ApiCmdBCGetXferDef Get all transfer properties of a Bus Controller Transfer
ApiCmdBCHalt Stops BC transfers
ApiCmdBCIni Initializes the BC with information controlling # of retries and bus switching
ApiCmdBCInstrTblGen Provides an alternate method of defining minor and major frame sequences
ApiCmdBCInstrTblGetAddrFomLabel
Obtains the address of a BC Instruction Table entry pre-defined by the user using the ApiCmdBCInstrTblGen function
ApiCmdBCInstrTblIni Initializes the memory area associated with creating a BC Instruction Table for major and minor frame sequencing
ApiCmdBCMFrameDefEx Defines the sequence of minor fames within the major frame
ApiCmdBCSrvReqVecCon Set the sub address where the modecode “Last Vector Word” is sent to in case of a service request handling
ApiCmdBCSrvReqVecStatus Read BC Service Request and Vector Word Status information maintained by the BC for a specific RT
ApiCmdBCStart Starts the execution of pre-defined BC transfers within minor/major frame structure and defines minor fame timing
ApiCmdBCStatusRead Reads execution status of the BC
ApiCmdBCXferCtrl Enables/Disables the BC Transfer
ApiCmdBCXferDef Defines all transfer properties including source/destination information, error insertion and interrupt generation
ApiCmdBCXferReadEx Reads status of an individual BC transfer
ApiCmdBcModeCtrl Enable / disable various BC functionality on-the-fly
Programmer's Guide for PCI 1553 Windows Applications 31
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-VII Remote Terminal Function Descriptions
Function Description
ApiCmdRTBHDef Defines an RT Buffer Header to be assigned to an RT SA/Mode code
ApiCmdRTBHRead Read the RT-SA buffer header structure
ApiCmdRTDytagDef Defines dynamic data to be inserted into the RT transmit Data words
ApiCmdRTEnaDis Enables/Disables a selected RT on the fly
ApiCmdRTGetDytagDef Read the Dytag settings for the generation of dynamic data words for a RT transmit SA
ApiCmdRTGetSABufferHeaderInfo Get the buffer header id of a certain RT/SA combination
ApiCmdRTGetSAConErr Read the error injection settings of the specified RT Sub-address/Mode code
ApiCmdRTGetSimulationInfo Read the simulation and monitoring status of an RT
ApiCmdRTGlobalCon Initializes multiple RTs at one time (combination of ApiCmdRTIni and ApiCmdRTSACon)
ApiCmdRTHalt Stops the RT operation for all assigned RTs
ApiCmdRTIni Initializes a select RT including configuration for simulation/mailbox mode, Response time and Next Status word
ApiCmdRTLCW Redefines the Last Command word associated with the RT
ApiCmdRTLSW Redefines the Last Status word associated with the RT
ApiCmdRTMsgRead Reads the individual RT's Next/Last Status word, Last Command word and message and error counter
ApiCmdRTMsgReadAll Reads the RT message and error counter for all 32 RTs
ApiCmdRTNXW Redefines the Next Status word associated with the RT
ApiCmdRTRespTime Redefines the Response time associated with the RT
ApiCmdRTSACon Defines the properties of the RT SA/Mode code such as interrupt control, and unique Next Status word setup
ApiCmdRTSAConErr Defines the error injection of the RT SA/Mode code
ApiCmdRTSAMsgReadEx Reads the execution status for an RT SA/Mode code
ApiCmdRTStart Starts the RT operation for all assigned RTs
ApiCmdRTStatusRead Reads the execution status of the general RT operation and the RT global message and error counters
ApiCmdRtModeCtrl Enable/disable various RT functionality on-the-fly
32 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-VIII Bus Monitor Function Descriptions
Function Description
ApiCmdBMActRead Reads BM Bus Activity transfer/error counters
ApiCmdBMCapMode Configures the Capture/Recording mode of the BM
ApiCmdBMDytagMonDef Define a dytag monitor id
ApiCmdBMDytagMonRead Read the actual dytag monitor status
ApiCmdBMFilterIni Disables the monitoring of specific RT SA/Mode codes
ApiCmdBMFTWIni Defines the bit pattern to be used by the BM to initiate a Start Trigger Event and/or Stop Trigger Event used for Start/Stop of the "Data Capture"
ApiCmdBMHalt Stopps the chronological BM operation
ApiCmdBMIllegalIni Sets up the BM to tag/not tag illegal command transfers to specific RT SA/Mode codes
ApiCmdBMIni Initializes the Bus Monitor
ApiCmdBMIniMsgFltRec Defines the command words used for filtering 1553 transfers to determine what data the BM will record when in Message Filter Recording Mode
ApiCmdBMIntrMode Enables/disables the generation of interrupt and strobe outputs for various BM conditions
ApiCmdBMReadMsgFltRec Retrieves multiple 1553 message transfers from the Monitor Buffer in one of four special formats (for data recorded in Message Filter Recording Mode)
ApiCmdBMRTActRead Reads the BM transfer/error counters for a specified RT
ApiCmdBMRTSAActRead Reads the BM transfer/error counters for a specified RT Subaddress
ApiCmdBMStackEntryFind Finds a specific BM entry in the Monitor buffer
ApiCmdBMStackEntryRead Obtains information about a specific BM entry in the BM buffer
ApiCmdBMStackpRead Obtains the BM buffer pointers to be used to index into the Monitor Buffer to read entries
ApiCmdBMStart Starts the chronological BM operation
ApiCmdBMStatusRead Reads the status of the BM
ApiCmdBMSWXMIni Enables the bits in the BM Status Word Exception Mask to be used by the BM to check the status word for errors/exceptions
ApiCmdBMTCBIni Sets up the Trigger Control Block which defines the conditions evaluated by the BM to generate a Start/Stop Trigger Event
ApiCmdBMTCIIni Defines the next Trigger Control Block to be evaluated for the next trigger
ApiCmdBMTIWIni Arms the BM with the Triggers to be evaluated
ApiCmdQueueFlush Flush the messages recorded while in Record with Queuing mode
ApiCmdQueueHalt Stops queueing bus data to the Monitor buffer
ApiCmdQueueIni Initializes the Record with Queueing process
ApiCmdQueueRead Read a queued 1553 transfer message in the Monitor buffer
ApiCmdQueueStart Starts queueing bus data to the Monitor buffer
Programmer's Guide for PCI 1553 Windows Applications 33
Section 3 – AIM 1553 Bus Interface Module Overview
Table 3.2.3-IX Replay Function Descriptions
Function Description
ApiCmdReplayIni Initializes Replay interrupts, Time tag replay and defines the size of the data to be replayed
ApiCmdReplayStart Starts the Replay of data in the Replay buffer
ApiCmdReplayStop Stops the Replay of data in the Replay buffer
ApiCmdReplayStatus Reads the status of the Replay activity
ApiCmdReplayRT Disables replay of one or more specific RT(s)
34 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
3.2.5 Application Program Structure Overview
The API function calls can be used to simulate a BC and/or RT on the bus as well as monitor
bus activity and replay recorded data. Figure 3.2.4-1 shows the structure of a basic application
program and the API function categories associated with each major part of the program.
Programmer's Guide for PCI 1553 Windows Applications 35
Section 3 – AIM 1553 Bus Interface Module Overview
Figure 3.2.4-1 Basic Application Program Structure
Initialization--->Board setup--->
BC Simulation Setup---> RT Simulation Setup---> Bus Monitor Setup --->
Start BM/RT/BC--->
Retrieve Status/Captured Data --->
Shutdown
Decide if you need to simulate a BC, and/or one or more RT(s). Determine if you want to program
the BM to capture/replay data.
For BC simulations, know the BC-to-RT, RT-to-BC, and RT-to-RT transfers that must be initiated.
Determine how the data words will be generated and whether errors are to be injected into the
transfer. Know how all simulated transfers are to be included in the minor/major frame structure.
For RT simulations, know which RT's and RT SA's need to be simulated, the response time and the
status to be returned, or whether the RT is to be configured for mailbox monitoring (no response on
the bus). For RT-to-RT and RT-to-BC transfers, determine how the data words will be generated
and whether errors are to be injected into the transfer. Know whether the RT is required to respond
to Mode Codes and which mode codes are required.
If you want the databus to be monitored, know the capture mode that best suits your requirements
and how you want the monitor to be started (triggered) i.e trigger on error, external trigger, first
word received... Determine if you want all or specific RT SAs/Modecodes to be monitored.
Determine if you need an interrupt handler to handle BC, RT and/or BM interrupt signals. BC, RT
and BM function calls can be setup to produce interrupts based on certain conditions.
Follow the basic structure below utilizing the function call groups indicated to create your
application program.
Initialization (1) Initialize API Library
(2) Open Stream
(3) Optional interrupt handler
setup
Board Setup (1) Initialize device
(2) Define MILBus protocol(A or B) and Response
timeout
(3) Define MILBus coupling mode
(4) IRIG time setup
1
2
Library Administration Functions
System Functions
Module Handle
continued on next page…
36 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
BC Simulation Setup (1) Initialize the BC – retry mechanism, Service Request Control, define whether all
transfers use the same/different bus
(2) Define the properties of each BC-to-RT, RT-to-RT, RT-to-BC transfer to be simulated
including data word count, reponse control, retry control, status word handling,
error/gap injection, Status word handling and interrupt generation.
(3) Assign Header ID (to contain transfer pointers to Status queue, Event Queue and
messag buffer queue) and Message Buffers IDs (for transmission of data words) for
each transfer.
(4) Insert data words into the message buffers using one of 5 methods including inserting
fixed data, dynamically updating data using function generators, using FIFOs pre-
filled by user's application, using Dataset Buffers, using an interupt handler routine to
refill the buffer on end-of-transfer.
(5) Determine framing mode (Standard or BC Instruction Table mode) and configure
minor/major frames or BC instruction tables accordingly
4
5
Bus Monitor Setup (1) Initialize monitor
(2) Configure capture mode for Standard Capture, Selective
capture, Recording mode or Message Filter Recording mode
(3) Define when you want the monitor to interrupt your
application: on half buffer full, capture start/stop or end of
select capture.
(4) Define the trigger(s) for start of capture/arm the trigger and
whether the trigger creates an interrupt.
(4) If required, define filter captured data based on transfer ID.
BM Functions Buffer Functions
3
BC Functions Buffer Functions
FIFO Functions
RT Simulation Setup
(1) Initialize the RT defining the RT's address, whether RT is simulated or
configured for Mailbox monitoring (used to monitor non-simulated
"external" RTs), response time, and the Status word the RT will
respond with.
(2) Assign Header ID (to contain transfer pointers to Status queue, Event
Queue and messag buffer queue) and Message Buffers IDs (for
reception/ transmission of data words) for each transfer. Enable
interrupt generation if required.
(3) Enable the RT's SA for transmit, receive or modecode transfers, and
specific Status word response value.
(4) For RT-to-RT or RT-to BC transfers, insert data words into the
message buffers using one of 5 methods including inserting fixed data,
dynamically updating data using function generators, using FIFOs
pre-filled by user's application, using Dataset Buffers, using an
interupt handler routine to refill the buffer on end-of-transfer.
(5) For RT-to-RT (receive) or BC-to RT transfers, clear the Receive buffer
area if desired
continued on next page…
RT Functions Buffer Functions FIFO Functions
Programmer's Guide for PCI 1553 Windows Applications 37
Section 3 – AIM 1553 Bus Interface Module Overview
7
Start RTs/BC
(1) Start all RTs
(2) Start the BC
6
Start Bus Monitor (1) Start receiving and/or monitoring the
MILBus data
BM Functions
Retrieve Status/Data (1) BC Status
(2) RT Status
(3) Retrieve Captured data
System Functions BC Functions RT Functions BM Functions
Replay Functions
9
Stop RT/BC/BM - Shutdown (1) Stop BC/RT/BM
(2) Uninstall any interrupt handlers
(3) Close each resource
Library Administration Functions BC Functions RT Functions BM Functions
8
RT Functions BC Functions
38 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
3.2.6 MIL-STD-1553 Transfers and Frame Structure Overview
Programming the AIM 1553 bus interface module to simulate a BC and/or RT revolves around
the concept of defining transfers. Additionally, for the BC the transfers must then be scheduled
into minor and major frames. The following two sections will provide an overview of these
two concepts.
3.2.6.1 About MIL-STD-1553 Transfers
In order to simulate the BC, the user must define BC transfers. A BC transfer is assigned a
Transfer ID and Header ID (usually the same number) for the BC side of the BC-to-RT, RT-to-
BC or RT-to-RT transfers to simulate on the 1553 bus. The BC Header ID points to memory
locations containing Status and Event information for a specific BC transfer and the Message
buffer(s) which contain the BC transmit/receive Data words within the 1553 transfer. In order
to simulate the RT SA using 1553 protocol standards the user must assign a Header ID which
is associated with all the RT SA properties, status and transmit/receive message buffers for the
RT side of the BC-to-RT, RT-to-BC or RT-to-RT transfers. For BC and RT simulations, the
maximum number of Transfers/Header IDs that can be defined will vary based on the amount
of Global RAM available on your board as shown in Table 3.2.6.1-I. Our examples will utilize
the maximum value of 511 Transfer/Header IDs.
Table 3.2.6.1-I Transfer ID/Buffer Header ID Ranges
Streams 1MB 2MB 4MB 8MB 16MB
1 x 1553 1..511 1..2047 1..4095 1..8191 1..16383 2 x 1553 - 1..511 1..2047 1..4095 1..8191 4 x 1553 - - 1..511 1..2047 1..4095
A BC transfer defines the characteristics/properties (including error injection) for the BC side
of any one of the MIL-STD-1553 Command/Data/Status.
All BC and RT message transfers utilize a common message buffer pool located in Global
RAM. All BC and RT message transfers require the user to assign at least one Global RAM
message buffer. For instance, for an application with a simulated BC and simulated RT, for
one BC-to-RT transfer, at least one message buffer will be assigned to the BC transmit
message and at least one message buffer assigned for the RT receive message. If there are no
MIL-STD-1553 Data words within the 1553 transfer, a message buffer will still need to be
assigned.
Table 3.2.6.1-II Buffer ID Ranges
Streams 1MB 2MB 4MB 8MB 16MB
1 x 1553 1..2047 1..8191 1..16383 1..32767 1..65536 2 x 1553 - 1..2047 1..8191 1..16383 1..32767 4 x 1553 - - 1..2047 1..8191 1..16383
Programmer's Guide for PCI 1553 Windows Applications 39
Section 3 – AIM 1553 Bus Interface Module Overview
Figure 3.2.6.1-1 shows the basic interface between the Transfer Descriptors (which are created
for each transfer defined by the user) and associated Buffer Headers and Data buffers. These
diagrams depict the basic memory structure and relationship for BC/RT simulation/status
information contained in shared global memory. The user is not required to physically address
into global memory to obtain the status information. The API provides the functions that allow
the user to easily configure and retrieve status information for the BC, RT and BM.
As shown in Figure 3.2.6.1-2, the AIM bus interface module is designed with additional buffer
areas which can be utilized, in combination with the message buffers described above
a. FIFO Area - used for creating large sets of data to be transmitted within a 1553
transfer.
b. Dataset Area - used for cycling through multiple 32 word buffers to be
transmitted within a 1553 transfer. (An alternative to cycling through Message
Buffers from the Global RAM Buffer Pool.)
These message buffer concepts are the core design concepts for 1553 transfers that will be
detailed further within the BC and RT Programming sections to follow.
40 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
Figure 3.2.6.1-1 API S/W Buffer Assignments for 1553Transfers
API S/W Buffer Assignments for Simulated BC and RT
LS Transfer - (xfer_id = a)
BC Assignments RT assignments
BC Buffer Header ID = b RT Buffer Header ID= d
Buffer(s) ID = c Buffer(s) ID = c
The number of ids depends on the Global RAM size and the number of
streams:
a.) See table 3.2.6.1-I
b.) See table 3.2.6.1-I
(Usually defined with the same number as the Transfer ID)
c.) See table 3.2.6.1-II
(Buffers shared by both RT and BC)
d.) See table 3.2.6.1-I
Buffer Pool for LS data
(32 x 16Bit words each buffer) 1 2 3 4
6 5
7
n-
n n-
n-
Queue of 4 buffers
The queue size can be selected as 2^k, where k can have a range from 0 to 8.
Note: The buffers are shared between BC, RT on both BIUs
BC - Status Queue
BC - Event Queue
received status words actual data buffer
control word
res
res res
control word
511 / BIU
time tag
RT Buffer Header RT - Status Queue
RT - Event Queue
received status words actual data buffer
control word
res
res res
control word
511 / BIU
time tag
User
Data
control word status queue pointer
Message buffer queue pointer
event queue
BC Buffer Header
control word status queue pointer
data buffer queue
event queue
n :
See Table 3.2.6.1-II for
Buffer Id ranges.
Programmer's Guide for PCI 1553 Windows Applications 41
Section 3 – AIM 1553 Bus Interface Module Overview
Figure 3.2.6.1-2 FIFOs and Dataset Buffers I/ F to Message Buffer Pool
Buffer Pool (Global RAM)
for 1553 data (32 x 16Bit words each buffer)
1 2 3 4
6 5
7
n-3
n n-1 n-2
Example 1: XFR 1 (BC-to-RT) uses 2 buffers. BC cycles through 128 32 word
buffers of assigned FIFO for each message transmitted by the BC
Example 2: XFR 2 (RT-to-BC) uses 1 buffer. RT cycles through three dynamic dataset buffers assigned for each message transmitted by the RT
n Board 2047 1553-1 4095 1553-2
1
2
3
4
6
5
7
32
One FIFO is a Queue of 128 32 16-bit word
buffers
FIFO Buffer Pool (ASP Shared RAM)
1 2 3 4
6 5
7
4095
Queue of 4095 32 16-
bit words
Dataset Buffer Pool
(ASP Shared RAM)
Data from a FIFO can be associated with 1553 transfers for BC or RT
message transmissions
Example 1: FIFO 2 is assigned to XFR 1
Total of 32 FIFOs
available
Example 2: Dataset 1-3 buffers are assigned to XFR 2
Data from Dataset buffers can be associated with
1553 transfers for BC or RT message transmissions
User
Data
n :
See Table 3.2.6.1-II for Buffer Id
ranges.
42 Programmer's Guide for PCI 1553 Windows Applications
Section 3 – AIM 1553 Bus Interface Module Overview
Transformer coupled with resistive network emulation. (on-board
MILbus network simulation) (API_CAL_CPL_EXTERNAL)
Onboard, digital wrap-around loop between MILbus Encoder and
Decoder (API_CAL_CPL_WRAP_AROUND_LOOP)
Note: Have a look to the 1553 Reference Manual for some coupling restrictions
on various board types.
In the network emulation mode, the MILbus emulation circuitry emulates a
transformer-coupled network without the use of MILbus couplers (using a
resistor network). Thus, an external dual-redundant MIL-STD-1553 Terminal
can be directly connected to the module.
The following functions are examples of the ApiCmdCalCplCon function.
The coupling parameter you use will be dependent upon your MILbus
configuration.
// Setup for Isolated Bus Coupling ApiCmdCalCplCon( ApiModuleHandle, 0, API_CAL_BUS_PRIMARY, API_CAL_CPL_ISOLATED ); ApiCmdCalCplCon( AiModuleHandle,0, API_CAL_BUS_SECONDARY, API_CAL_CPL_ISOLATED );
b. Define the output amplitude of the MILbus transceiver for the BIU.
ApiCmdCalXmtCon - defines the amplitude of the MILbus transceiver
The MIL-STD-1553 trapezoidal dual transceivers offer the capability to control
the output amplitude on the MILbus via the voltage control pins. If necessary for
Programmer's Guide for PCI 1553 Windows Applications 49
Section 4 – Programming Using the API Library Library Administration and System Programming
your application, the output amplitude of the MILbus transceiver can be
adjusted using the ApiCmdCalXmtCon function. Figure 4.1.4-1 shows the
relationship between amplitude percentage and the Voltage control (Vcontrol).
The Vcontrol input follows the following formula
Vcontrol = 2.56 x 5V x ( Input Value / 256)
The Input Value in this formula is the digital eight bit value (0..255) you
provide as input to the ApiCmdCalXmtCon function. The 100% value
depends on the transceiver type, the coupling mode and the bus termination. A
typical value is 22Volts for a transformer coupled stub terminated with 70 Ohm.
Figure 4.1.4-1 MILbus Output Amplitude vs. Voltage Control
Note: These functions are not applicable on AMC1553-1/2 modules.
The ApiCmdCalXmtCon function below adjusts the output amplitude:
// Modify Output Amplitude (check with Scope) to 25% ApiCmdCalXmtCon(ApiModuleHandle,0,API_CAL_BUS_PRIMARY,0x40); // Modify Output Amplitude (check with Scope) to 63% ApiCmdCalXmtCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,0xA0); // Set Default ApiCmdCalXmtCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,0x80);
Note: The output amplitude value is dependent on the coupling mode setting.
c. Enable/Disable a 1Mhz square wave calibration test signal on the BIU
MILbus Output vs Vcontrol
0
10
20
30
40
50
60
70
80
90
100
0 1 2 3 4 5 6 7 8 9 10 11 12
Vcontrol [V]
MIL
bu
s V
ou
t [%
]
50 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Library Administration and System Programming
ApiCmdCalSigCon - enables/disables a 1 Mhz square wave calibration test
signal
The AIM board is capable of generating a 1MHz test signal applied at the
Encoder outputs of the primary or secondary MILbus. This test signal can be
enabled/disabled using the ApiCmdCalSigCon Calibration function. The
amplitude of this signal can be controlled using the ApiCmdCalXmtCon as
described above. Following is sample code to enable the 1 Mhz test signal,
modify the amplitude output, reset the amplitude output to default, then disable
the 1 Mhz test signal.
// Enable Test Signal ApiCmdCalSigCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,API_ENA); // Modify Output Amplitude (check with Scope) to 63% ApiCmdCalXmtCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,0xA0); // Set Default ApiCmdCalXmtCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,0x80); // Disable Test Signal ApiCmdCalSigCon(ApiModuleHandle,0, API_CAL_BUS_PRIMARY,API_DIS);
Note: The frequency of this test signal is not dependent on the coupling mode
setting.
d. ApiCmdDefMilbusProtocol - defines the MILbus protocol type (A or B) for
individual or single RTs. (ApiCmdReset initializes this parameter to 1553B)
If your application requires MIL-STD-1553A protocol for any or all RTs, you
should include the System function, ApiCmdDefMilbusProtocol, in your
program.
// Set all RTs for MILbus 1553A protocol ApiCmdDefMilbusProtocol( ApiModuleHandle,0, API_PROTOCOL_1553_A, API_MODE_ALL_RT );
4.1.5 Configuring Response Timeout
Configuration of timeout values for your application may require the execution of the
following functions:
a. ApiCmdDefRespTime - defines the timeout value (default is 14 µs)
The Response Timeout value is used in all modes of operation to define the
minimum time the Bus Controller waits for a Status Word response. The
response timeout value is used by the Bus Controller and Bus Monitor as "No
Response" timeout and from the RT's to calculate the RT-to-RT Status Word
Programmer's Guide for PCI 1553 Windows Applications 51
Section 4 – Programming Using the API Library Library Administration and System Programming
timeout. The default timeout value, as initially configured using the
ApiCmdReset function is set to 14µs for compliance with the specification
MIL-STD-1553B.
The Response Timeout value, however, can be modified by the
ApiCmdDefRespTout function within a range of 0 to 63.75 in .25 µs steps. In
the following example, the Response timeout is set to 17µs.
ApiCmdDefRespTout( ApiModuleHandle, 0, 17.00 )
Attention: Due to the Response-/Gap time measurement specification of
MIL-STD-1553, the Response time is measured from the mid-bit zero crossing
of the last bit of the previous word to the mid- zero crossing of the Command
Sync of the current word. Thus, timeout value of (e.g.) 14µs allows a Bus dead
time of 12µs at 1Mbit Transmission Mode and a Bus dead time of 10µs at
500Kbit Transmission Mode.
Note: For broadcast transfers, the response timeout is used to check that no
status word has responded. Therefore, if the response timeout is greater
than the Intermessage Gap Time in Standard Gap Mode, the
Intermessage Gap will be extended.
4.1.6 Utilizing IRIG-B
The API S/W Library provides two System function calls for IRIG-B processing, these include:
a. ApiCmdSetIrigTime - Sets the IRIG-B time on the on-board IRIG timecode
encoder
b. ApiCmdGetIrigTime - Reads the IRIG-B time on the on-board IRIG timecode
encoder
The following is an example of the ApiCmdSetIrigTime/ ApiCmdGetIrigTime. Notice the
declaration of the api_irig_time as type TY_API_IRIG_TIME.
TY_API_IRIG_TIME is defined in the Ai1553i_def.h header file.
Note: To obtain an accurate time stamp value you should delay the immediate reading of the
IRIG time.
TY_API_IRIG_TIME api_irig_time; // Set onboard IRIG time to Day 288 11:32:25 (Hours:Minutes:Seconds), api_irig_time.day_hi = 1; //(0 or 1) Increases day by 256 if equal to 1 api_irig_time.day_lo = 32; //
52 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Library Administration and System Programming
- Trigger on external event INT_TYPE, METI Monitor Buffer Pointer
N/A N/A
Replay
ApiCmdReplayIni
- Half Buffer Transmitted
Replay Buffer Pointer
N/A N/A
Programmer's Guide for PCI 1553 Windows Applications 55
Section 4 – Programming Using the API Library Library Administration and System Programming
INT_TYPE
Description
RT Interrupt Type BC Interrupt Type BM Interrupt Type Replay Interrupt Type BC Branch Interrupt Type
UPF Update Flag
If set to 1, Interrupt Loglist Entry was updated
AEI Any Error Interrupt
If set to 1, an interrupt was asserted if any error was detected during transfer.
IXI Index Interrupt
If set to 1, an interrupt was asserted due to the current buffer index.
PGI Programmed Transfer (BC) or SA (RT) Interrupt
For BC: If set to 1, an interrupt was asserted due to programmed BC Iinterrupt.
For RT: If set to 1, an interrupt was asserted due to programmed RTSA Iinterrupt
BCH Bus Controller Halt
If set to 1, an interrupt was asserted due to BC Halt (1553 protocol only)
UXI Unexpected (Status Word) Response Interrupt
If set to 1, an unexpected Status Word response interrupt was asserted (1553 protocol only)
METI Monitor External Trigger Event during bus idle time
If set to 1, an interrupt was asserted if no bus traffic takes place and an external trigger event was detected. This trigger type provides neither a trigger control block index (TCBI) nor a monitor buffer pointer (MBP) to the interrupt loglist entry (1553 protocol only)
MTI Monitor Trigger Interrupt
If set to 1, an interrupt was asserted if a trigger event becomes valid during the trigger control block processing (1553 protocol only)
MBF Monitor Buffer Full Interrupt (or Half Buffer Full Interrupt in Recording Mode)
If set to 1, an interrupt was asserted due to the Monitor Buffer Full event is standard or selective data capture mode and due to the Half Buffer Full event in recording mode
MSI Monitor Start Interrupt
If set to 1, an interrupt was asserted due to a Monitor start trigger event
MST Monitor Stop Interrupt
If set to 1, an interrupt was asserted due to a Monitor stop trigger event (1553 protocol only)
RSO Replay Stop Interrupt
If set to 1, an interrupt was asserted if the replay operation expired due to an expired count.
RPI Replay Half Buffer Interrupt
If set to 1, an interrupt was asserted if one half buffer was replayed and indicates a buffer reload request.
RBI Relative Buffer Index
Value Description
0..255 Indicates the buffer index of the currently used buffer that is related to this interrupt
TCBI Trigger Control Block Index
Value Description
0..255 Indicates the index of the trigger control block that created the interrupt. This field is only updated if the interrupt is asserted by the trigger control block processing (METI or MTI). this field is not used on MBF, MSI, or MST events.
Note: On occurrence of the METI event, the TCBI field will not be initialized.
56 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Library Administration and System Programming
Figure 4.1.7-1 Interrupt Setup Process
Further definition and examples of these interrupt scenarios can be found in the BC, RT, BM or
Replay applicable sections to follow. In addition, the sample program, LS_Interrupt_Sample.c
is included and provides an excellent example of Interrupt Handling programming.
Decide which type of interrupt is required for
your application
Create an Interrupt Handler application to process interrupt/data when interrupt
occurs. Interrupt Loglist Event Entries (See ApiInstIntHandler in the API reference
manual) are updated by the BIU when an interrupt occurs. The interrupt handler
should include code to check the Interrupt Loglist Event Entry for expected interrupts
and process as required based on the user's application requirements.
Include function call ApiInstIntHandler
to intialize the stream with a pointer to
your Interrupt Handler.
Delete the the host-to-AIM board
interrupt setup prior to the end of your
application using ApiDelIntHandler.
1
2
4
Setup the BC/RT/Bus Montitor/Replay
function(s) interrupt(s) as required by your
application (See Table 4.1.7-I)
3
Programmer's Guide for PCI 1553 Windows Applications 57
Section 4 – Programming Using the API Library Library Administration and System Programming
4.1.8 Debugging
The API S/W Library provides the developer with the capability to control the output of error
messages which are detected by the API S/W Library functions using the ApiSetDllDbgLevel
function. One, multiple, or all types of error messages can be enabled/disabled by using this
function. The types of error message outputs are shown in Table 4.1.8-I.
The default setting provides for the output of DBG_ERROR outputs to warn the application
user of "out of range" parameters within the Api function parameters used in the software
program and if any errors occur within the on-board software that are detected by the Api_Io
function internal to the API S/W Library. (See S/W Library Reference Manual for
Windows Applications for additional help with troubleshooting errors within your
application.)
Table 4.1.8-I Error Message Output Control Levels
Constant Description
DBG_DISABLED Force no debug output
DBG_INT Force interrupt related debug output
DBG_INIT Force initialization related debug output
DBG_OPEN Force module open related debug output
DBG_CLOSE Force module close related debug output
DBG_IO Force module I/O related debug output
DBG_READREC Force recording related debug output
DBG_WRITEREP Force replay related debug output
DBG_MUTEX Force mutex related debug output
DBG_TRACE Log function calls in aim_mil.log
DBG_INFO Force informational debug output
DBG_ERROR Force general error related debug output
(e.g. range check errors)
DBG_ERRORMSG Force error message box, if I/O to the
board fails with error or range check fails
DBG_ALL Force all available debug output
58 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Library Administration and System Programming
4.1.9 GPIO Programming
The APX1553 and APM1553 modules include a Board to Board connector that provides eight
GPIO Discrete I/O signals. Each GPIO can be used as a simple input or output to generate a
strobe to another APX/APM1553 board or to sense a digital input signal from another
APX/APM1553 board. Please see the associated Hardware Manual for connector pinout
information for the eight GPIO signals.
The following function calls are required to generate outputs or receive inputs from these GPIO
pins:
a. ApiCmdInitDiscretes – used to define whether the GPIO signal is to be as an
input or output signal. This function call must be called before either of the
following two function calls.
b. ApiCmdWriteDiscretes – used to generate a discrete output to one or more of
the eight discrete GPIO pins which have previously been configured as output
with ApiCmdInitDiscretes.
c. ApiCmdReadDiscretes. – used to read whether the GPIO discrete register has
been set. The GPIO register bit set must have previously been configured as
input with ApiCmdInitDiscretes.
Programmer's Guide for PCI 1553 Windows Applications 59
Section 4 – Programming Using the API Library Bus Controller Programming
4.2 Bus Controller Programming
The main function of the BC is to provide data flow control for all transfers on the bus. In
addition to initiating all data transfers, the BC must transmit, receive and coordinate the
transfer of information on the data bus. All information is communicated in
command/response mode. The BC sends a command to the RTs, which reply with a response.
Information Transfer Formats are shown in Section 2.
Normal BC dataflow control includes transmitting commands to RTs at predetermined time
intervals as defined in the minor/major frame definition. The commands may include data or
request for data (including status) from RTs. Command word, Data word and Status word
formats are shown in Section 2. The BC has control to modify the flow of bus data based on
changes in the operating environment. These changes could be a result of an air-to-ground
attack mode changing to air-to-air, or the failure mode of a hydraulic system. The BC is
responsible for detecting these changes and initiating action to counter them. Error detection
may require the BC to attempt communication to the RT on the redundant, backup bus.
If your application requires the simulation of a BC, this section will provide you with the
understanding of the BC programming functions required for use within your application.
Programming the BC may require the use of more than just the BC functions. Also needed
may be the Buffer and FIFO functions. This section will discuss some of the typical scenarios
a programmer would encounter that would require the use of the Buffer, FIFO and BC
functions as listed in Tables 3.2.3-IV, 3.2.3-V, and 3.2.3-VI respectively. These scenarios
include:
a. Initializing the BC
b. Defining 1553 transfers
BC transfers using single buffers
BC transfers using multiple buffers
BC transfers using FIFOs
BC transfers with dynamic data
c. BC transfers with error injection
d. Defining Minor/Major frames
Standard Framing Mode
BC Instruction Table Mode
e. Starting the BC
60 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
f. Acyclic 1553 transfers
g. BC Interrupt programming
h. Status word exception handling
i. Tracking BC-receive 1553 data via Track Multiplex Buffers
4.2.1 Initializing the BC
Initialization of the BC must be the first BC setup function call issued. This function call,
ApiCmdBCIni, will perform setup of the BC global transfer characteristics including:
a. Transfer Retry Protocol - Definition of the number of retries the BC will
perform if a transfer is erroneous, the retry mechanism and the bus switching
protocol include selection of one of the following:
Retry disabled
One retry on the alternate bus
One retry on the same bus, one retry on the alternat bus
Two retries on the same bus, then one retry on the alternate bus
b. Service Request Control - When enabled the BC will perform specific pre-
defined actions when the Service Request bit in the status word received by the
BC is set. The specific pre-defined action the BC will perform is defined for
each transfer using the ApiCmdBCXferDef function. When this Service
Request function is enabled (with the ApiCmdBCIni function), and the BC
receives a status word with the Service Request Bit set, the BC will
automatically generate and transmit to the RT a Transmit Vector Word mode
code (Mode code 16). A Vector Word will then be transmitted by the RT
containing information indicating the next action to be taken by the BC. The
actions taken by the BC following the receipt of the vector word are also defined
by the ApiCmdBCXferDef function
Note: If Status Word Exception handling is required for any RT, this function
must enable Service Request capability for the BC.
c. BC Transfer Bus Mode/Global Start Bus- Provides one of the following
options:
Allows the user to select the bus (primary or secondary) used for a
transfer on a transfer-by-transfer basis (using ApiCmdBCXferDef)
Programmer's Guide for PCI 1553 Windows Applications 61
Section 4 – Programming Using the API Library Bus Controller Programming
Allows the user to specify a default bus (primary or secondary) for all
MILBus transfers
The following code example uses API S/W Library constants to initialize the BC for Retry
disabled, Service Request disabled, Transfer Bus Mode setup so that individual transfers can
define the bus used for the transfer using ApiCmdBCXferDef. (The last parameter is ignored
since the bus used for transfers can be defined individually.)
Note: ApiCmdBCIni must be called first when programming the BC regardless of the framing
mode (Standard or Instruction Table Mode).
4.2.2 Defining 1553 Transfers
Transfers controlled/generated by the BC will follow the formats/protocol as shown in the
Information Transfer Formats in Section 2. The API S/W Library divides transfers into three
basic types: BC-to-RT, RT-to-BC and RT-to-RT. Variations of these types of transfers
include Mode commands and Broadcast commands.
The API S/W Library supports definition of a default value of 511 unique 1553 transfers. A
transfer ID must be assigned by the user for each transfer. The method used by the AIM 1553
bus interface module to accomplish the transfer of the Command, Status and/or Data words
within the transfers is to utilize a common buffer pool containing the message buffers located
in Global RAM as shown in Figure 3.2.6.1-1. All BC message transfers require the user to
assign at least one Global RAM message buffer. The message buffer will be used to
transmit/receive the Data words within the message transfer. If there are no Data words within
the transfer, a message buffer will still need to be assigned. (However, the API S/W Library
does not prevent the user from using the same buffers in more than one transfer, therefore, the
same message buffer can be assigned for transfers that do not require the
transmission/reception of Data word(s)). Each message buffer has a unique ID which must be
assigned by the user.
In addition to the assignment of the message buffer(s) for each transfer, a Buffer Header ID
must be assigned for the BC to enable the processor to identify the location of the buffers used
and status and event data generated for each transfer.
1553 transfers will require the use of the following BC function calls:
a. ApiCmdBCBHDef - this BC function will define a BC Buffer Header structure.
As shown in Figure 3.2.6.1-1, the BC Buffer Header structure enables the
processor to identify the location of the message buffers used and status and
event data generated for each 1553 transfer. The BC Buffer Header information
to be setup by this function includes the following:
62 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
BC Buffer Header ID - the ID of the BC Buffer Header structure.
1553 Transfer ID - the ID of the 1553 Transfer (later defined with
ApiCmdBCXferDef below)
Message Buffer ID - the ID of the first buffer in the Global RAM
message buffer pool to be used for the transfer of the Data words. See
Table 3.2.6.1-II for the number of possible Buffer IDs. The buffers are
shared between BC and RT. A Message Buffer ID of 20 would indicate
that the 20th buffer in the Global RAM Buffer Pool will be used. See
Figure 3.2.6.1-1for a diagram of the structure of these message buffers.
Buffer Queue Size - the number of Global RAM message buffers to be
used for the transfer of the Data words. One or more buffers can be used
for the transfer. You will always need to assign at least one message
buffer from the Global RAM Buffer Pool for your transfer. For
example, assigning API_QUEUE_SIZE_8 for a transfer indicates that 8
contiguous buffers. Using the example of Message Buffer ID of 20
above, and a queue size of 8, message buffers 20 - 27 would be used for
the transfer.
Buffer Queue Mode - specifies the order in which multiple buffers as
specified in the Buffer Queue Size, will be filled. In most cases, users
will choose to store the Data words into the Message Buffers in a cyclic
fashion (API_BQM_CYCLIC)
Data Buffer Store Mode - will allow the user to indicate the actions to
be taken in case of error in the transmission or reception of Data words
such as whether to keep transmitting the same message buffer at transfer
error, or continue with the next buffer in the queue for the next
transmission.
Note: Buffer Queue Size, Buffer Queue Mode, Data Buffer Store Mode, and
Buffer Size and the Current Buffer Index can be modified "on the fly"
(i.e. after the BC has been started) using the Buffer function call
ApiBHModify.
b. ApiCmdBCXferDef - this BC function will utilize the api_bc_xfer
structure to define the properties of a 1553 transfer. Information contained in
this structure will be used to create the Command word, Data word(s)/Mode
Code and define the process for handling the Status word. It will also include
error injection setup. This information will be sent to the BIU when this
function is called. The information contained in the structure includes the
information defined in Table 4.2.2-I. This table denotes the structure elements
that are used by the BC simulation to form the Command Word.
Programmer's Guide for PCI 1553 Windows Applications 63
Section 4 – Programming Using the API Library Bus Controller Programming
Figure 3.2.6.1-1 BC Buffer Header and Buffer Pool Interface
Buffer Pool for 1553 data
(32 x 16Bit words each buffer) 1 2 3 4 6 5
7
n-3
n n-1 n-2 Queue of
4 buffers The queue size can be selected as 2^k, where k can have a rang from 0 to 8.
n Board 2047 1553-1
BC Buffer
BC - Status Queue
BC - Event Queue
control word status queue pointer
Message buffer queue pointer event queue pointer
received status words actual data buffer
control word
res
res res
control word
511 / BIU
time tag
User
Data
n :
See Table 3.2.6.1-II for
Buffer Id ranges.
64 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Table 4.2.2-I 1553 BC Transfer Definition Structure (api_bc_xfer)
BC Transfer
Structure
Element in
api_bc_xfer
Definition CW
xid Transfer ID
hid Buffer Header ID - defines the ID of the Buffer Header that tracks the message buffer(s) used for this transfer.
type Transfer Type - BC-to-RT, RT-to-BC, RT-to-RT chn MILbus - Primary or secondary bus to be used for this
transfer
xmt_rt Transmitting RT - RT address/number of the transmitting terminal (N/A for BC-to-RT transfer)
rcv_rt Receiving RT - RT address/number of the receiving RT (N/A for RT-to-BC transfer)
xmt_sa Transmitting RT subaddress - RT subaddress of the transmitting terminal or mode control indication (0 or 31)(N/A for BC-to-RT transfer)
rcv_sa Receiving RT subaddress - RT subaddress of the receiving terminal or mode control indication (0 or 31) (N/A for RT-to-BC transfer)
wcnt Word Count/Mode Code field - contains either the word count or the Mode code
tic Interrupt control - setup for generation of a BC interrupt upon end of transfer, transfer error or status word exception
hlt Halt control - setup to halt the BC upon end of transfer, transfer error, status word exception or any interrupt
sxh Status word exception handling - defines the process to execute upon occurrence of a Status word Service Request
sxh Status word exception handling - defines process to execute upon occurrence of a status word exception
swxm Status Word Exception Mask - defines the bits in the status word received by the RT that will be checked by the BC
rsp Expected Response - defines the response the BC expects from the RT such as basic response as defined by ApiCmdDefMilbusProtocol, no status word 1 expected, or no status word 2 expected.
rte Retry enable flag - enables or disables retry of this transfer upon transfer error. Also allows the user to alternate tranmission of this transfer between the Primary and the Secondary bus.
res Reserved
gap_mode Gap Mode - defines the gap between this transfer and the next transfer
gap Gap Value - defines the transfer wait time for the gap mode specified above.
err.type Error Injection Type - defines 1 of the 14 possible error injection schemes
err.sync Error Sync Pattern - sync pattern to be used for command sync or data sync error injection scheme
err.contig Gap Error or Zero Crossing Error Value - the # of half bits to be used for the Gap Sync Error injection scheme or the Zero Crossing Error value to be used for the Zero Crossing Error injection scheme.
err.err_spec Reserved
err.err_spec Word Position - the location of the 1553 transfer word for which the specified error will occur
err.err_spec Bit Position- the location of the bit in the 1553 transfer word (above) for which the specified error will occur
err.err_spec Number of bits - the number of bits at the location of the bit (above) in the 1553 transfer word (above) for which the specified error will occur
Programmer's Guide for PCI 1553 Windows Applications 65
Section 4 – Programming Using the API Library Bus Controller Programming
The following excerpt of code from the LS_BC_RT_BM_Sample.c sample program (Section
4.2.1) is an example of setting up the BC for a BC-to-RT transfer to RT1, SA1 with a data
word count of 4. The IDs assigned to this transfer include:
Transfer - BC-to-RT (xfer_id = 2)
BC Assignments
BC Buffer Header ID = 2
Buffer ID = 2
This 1553 transfer is to be put on the secondary bus, has no associated interrupts, no requests
for halt control, no service request handling, no error injection and specifies a gap of 0 µs that
will cause the BC to generate an intermessage gap of approximately 11 µs.
4.2.3 BC Transmit and Receive Message Data Word Generation/Processing
Now that you are familiar with the method used to define the characteristics of the 1553
transfers generated by a simulated BC, we can now discuss the following:
How to setup and place data into the message buffers assigned for Data word
transmissions by the BC for BC-to-RT and BC Broadcast type transfers.
How to setup and obtain data from the message buffers used for Data word
reception by the BC for RT-to-BC type transfers.
4.2.3.1 For BC-to-RT and BC Broadcast Type Transfers (BC Transmit)
The API S/W Library provides several methods to insert real-time/dynamic/fixed user data into
the Global RAM 1553 Message Buffers used by the BC transmitting side of the 1553 transfer
and specified in the ApiCmdBCBHDef function described in the previous section. The
methods and functions used for each method are summarized in Table 4.2.3.1-I.
Programmer's Guide for PCI 1553 Windows Applications 67
Section 4 – Programming Using the API Library Bus Controller Programming
Table 4.2.3.1-I BC Transmit Buffer Fill Method Summary
BC Transmit Message Source
Functions Used Other Examples
Fixed Data 1. ApiCmdBCBHDef 2. ApiCmdBCXferDef 3. ApiCmdBufDef to initialize buffer with fixed data words
(or ApiCmdBufWrite to initialize a buffer with a single 16-bit word)
LS_BC_RT_BM_Sample.c
With Dynamic Data Words
1. ApiCmdBCBHDef 2. ApiCmdBCXferDef 3. ApiCmdBufDef to setup non-dynamic data 4. ApiCmdBCDytagDef to setup 1-4 dynamic data words
Using FIFOs 1. ApiCmdBCBHDef 2. ApiCmdBCXferDef 3. ApiCmdFifoIni to initialize the FIFO 4. ApiCmdBCAssignFifo to assign the FIFO to the
transfer 5. ApiCmdFifoReadStatus to determine how much FIFO
data to reload 6. ApiCmdFifoWrite to fill the FIFO with data
With Dynamic Dataset Buffers
1. ApiCmdBCBHDef 2. ApiCmdBCXferDef 3. ApiCmdRamWriteDataset to fill the dataset buffers
with data to be used in the message buffers 4. ApiCmdSystagDef to assign the Dataset buffers to
the transfer
Using an interrupt handler routine to interrupt on end-of-transfer
See Section 4.2.7
The Dynamic Data Word Generation method and the FIFO and Dynamic Dataset methods are
described further in the following sections.
68 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
4.2.3.1.1 Dynamic Data Word Generation
Using the API function calls describe in the previous section, you can setup function generators
to dynamically change data words within the transmit message buffer. The Function generators
available are summarized in Table 4.2.3.1.1-I.
Table 4.2.3.1.1-I Dynamic Data Word Generation Summary
Mode Description
Function Mode Provides for up to two dynamic data words per transfer using any combination of the following functions as pictured in Figure 4.2.3.1.1-1
1. Positive Ramp
2. Negative Ramp
3. Positive Triangle
4. Negative Triangle
5. Transmit a Data word from a different Message Buffer
Tagging Mode Provides for up to four dynamic data words per transfer using Sawtooth Tagging. The Sawtooth Tagging mode provides an incrementer by 1, which is performed on the user-specified location with each execution of the associated BC transfer. The location to be incremented can be setup with an initial value to be incremented each transfer, or the existing value can be incremented. The options are to increment any combination of the following byte or words:
1. 16-Bit Sawtooth
2. 8-Bit Sawtooth LSB (lower byte of word)
3. 8-Bit Sawtooth MSB (upper byte of word)
Programmer's Guide for PCI 1553 Windows Applications 69
Section 4 – Programming Using the API Library Bus Controller Programming
Figure 4.2.3.1.1-1 Data Generation Functions Diagram
4.2.3.1.2 Using FIFOs and Dataset Buffers for Data Generation
BC transfer data can be defined using FIFOs or Datasets using the API function calls described
in Section 4.2.3.1. The basic concept of each method is described below and shown in Figure
4.2.3.1.2-1:
a. Assign a FIFO (ASP Shared RAM) to the transfer. (Each FIFO consists of 128
32-word buffers. There are 32 FIFOs.) Pre-fill the FIFO with application data,
the data transmitted in the Global RAM message transmit buffer will be
obtained from the FIFO. Re-fill the FIFO as needed.
b. Assign Dataset buffers (ASP Shared RAM) to the transfer. (There are 4095 32-
word buffers in the Dataset Buffer pool.) Pre-fill the Dataset buffer(s) with
application data, the data transmitted in the Global RAM message transmit
buffer will be obtained from the Dataset buffers. Refill the Dataset buffers as
needed.
Upper Limit
Lower Limit
Start
Positive Ramp Function Upper Limit
Lower Limit
Start
Negative Ramp Function
Upper Limit
Lower Limit
Start
Positive Triangle Function
Upper Limit
Lower Limit
Start
Negative Triangle Function
70 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Figure 4.2.3.1.2-1 BC Transfer Data Generation via FIFO or Dataset Buffers
4.2.3.2
Buffer Pool (Global RAM)
for 1553 data (32 x 16Bit words each buffer)
1 2 3 4
6 5
7
n-3
n n-1 n-2
Example 1: XFR 1 (BC-to-RT) uses 2 buffers. BC cycles through 128 32 word
buffers of assigned FIFO for each message transmitted by the BC
Example 2: XFR 2 (RT-to-BC) uses 1 buffer. RT cycles through three dynamic dataset buffers assigned for each message transmitted by the RT
n Board 2047 1553-1 4095 1553-2
1
2
3
4
6
5
7
32
One FIFO is a Queue of 128 32 16-bit word
buffers
FIFO Buffer Pool (ASP Shared RAM)
1 2 3 4
6 5
7
4095
Queue of 4095 32 16-
bit words
Dataset Buffer Pool
(ASP Shared RAM)
Data from a FIFO can be associated with 1553 transfers for BC or RT
message transmissions
Example 1: FIFO 2 is assigned to XFR 1
Total of 32 FIFOs
available
Example 2: Dataset 1-3 buffers are assigned to XFR 2
Data from Dataset buffers can be associated with
1553 transfers for BC or RT message transmissions
User
Data
n :
See Table 3.2.6.1-II for Buffer
Id ranges.
Programmer's Guide for PCI 1553 Windows Applications 71
Section 4 – Programming Using the API Library Bus Controller Programming
For RT-to-BC Type Transfers (BC Receive)
Before the BC receives the Data words from the RT, as part of the setup process, you may
choose to clear your receive buffer to avoid any Data word transmission confusion. The
receive buffers can be cleared before use by using the ApiCmdBufDef function.
After the BC has received Data words from an RT, software will need to be added to process
the data. Processing data received by the BC can be accomplished in one of two ways: polling
at pre-defined intervals to examine the BC data, or setting up the transfer to interrupt at end-of-
transfer. To accomplish the interrupt on end-of-transfer method of processing the data, an
interrupt handler routine would need to be developed to handle the interrupt which will occur
after all Data words have been received. Upon end-of transfer interrupt, the interrupt handler
would be called at which time the buffer could be read and processed as required by the
application. Interrupt handling is discussed further in Section 4.2.8.
4.2.4 BC Transfers with Error Injection
BC transfers can be configured for error injection in any Command word or Data word
transmitted by the BC. The BC is capable of injecting one of the following errors for a defined
transfer:
a. Command Sync Error - changes the transmitted Command word sync pattern
to one specified by the user
b. Data Sync Error - changes the transmitted Data word sync pattern to one
specified by the user
c. Parity Error - creates a parity error for the Command word or specified Data
word
d. Manchester stuck at high error - creates a Manchester stuck at high error for a
specified Command word, or Data Word at a specified bit position
e. Manchester stuck at low error - creates a Manchester stuck at low error for a
specified Command word, or Data Word at a specified bit position
f. Gap error - inserts specified Gap after defined Command or Data word
g. Word Count High - transmits the number of Data words defined for the
original transfer plus one
h. Word Count Low - transmits the number of Data words defined for the original
transfer minus one
i. Bit Count High - transmits a specified number (1-3) additional bits for
specified Command word or Data word.
72 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
j. Bit Count Low - transmits a specified number (1-3) less bits for specified
Command word or Data word.
k. Zero Crossing Low Deviation Error - implements zero crossing low deviation
at a specified Command word or Data word position, bit position with four
predefined deviation values.
l. Zero Crossing High Deviation Error - implements zero crossing high
deviation at a specified Command word or Data word position, bit position with
four predefined deviation values.
To setup for BC Command/Data word error injection, the transfer definition parameters
pertaining to error injection should be set. The following error injection sample code will setup
the transfer to inject a Data Sync Error on the third data word. The transfer definition
parameters and the values required for error injection are shown in bold text.
Set BC to RT RT01 RCV SA01 WC15 (Inject Data Sync Error in 3rd data word)
xfer_id = 1; // Defines the transfer descriptor that will be assigned to this transfer bc_hid = 1; // Defines the buffer header that will be assigned to this transfer ID buf_id = 1; // Defines the buffer ID that will be used by the Buffer Header ID.
type = API_ERR_TYPE_DATA_SYNC;
sync = 0x30; // set invalid data sync 110000
contig = 0; // not used
wpos = 3; // Inject Error on the 3 data word
bpos = 0; // not used
bc_bits = 0; // not used api_bc_xfer.xid = xfer_id; /* Transfer ID */ api_bc_xfer.hid = bc_hid; /* BID Buffer Header ID */ api_bc_xfer.type = API_BC_TYPE_BCRT; /* Transfer Type */ api_bc_xfer.chn = API_BC_XFER_BUS_PRIMARY; /* MILbus */ api_bc_xfer.xmt_rt = 0; /* XMT-RT */ api_bc_xfer.rcv_rt = 1; /* RCV-RT */ api_bc_xfer.xmt_sa = 0; /* XMT-SA */ api_bc_xfer.rcv_sa = 1; /* RCV-SA */ api_bc_xfer.wcnt = 15; /* Word Count field */ api_bc_xfer.tic = API_BC_TIC_NO_INT; /* Interrupt control */ api_bc_xfer.hlt = API_BC_HLT_NO_HALT; /* Halt control */ api_bc_xfer.rsp = API_BC_RSP_AUTOMATIC; /* Response control */ api_bc_xfer.sxh = API_BC_SRVW_DIS; /* Service Request Handling */ api_bc_xfer.rte = API_DIS; /* Retry disabled */ api_bc_xfer.res = 0; /* Reserved */ api_bc_xfer.swxm = 0; /* Status Word Exception Mask */ api_bc_xfer.gap_mode = API_BC_GAP_MODE_DELAY; /* Gap Mode */ api_bc_xfer.gap = 0; /* use default gap */
api_bc_xfer.err.type = API_ERR_TYPE_DATA_SYNC; /* error injection type */
In Standard Framing mode, the API/ACI1553 device supports up to 128 transfers per minor
frame and 512 minor frames per major frame. With Standard Framing mode, you will first be
defining all the minor frames (ApiCmdBCFrameDef) then defining which of those minor
frames will be placed in the major frame (ApiCmdBCMFrameDefEx). Further definition of
these two API S/W Library function calls associated with the definition of the minor/major
frames for this mode include:
a. ApiCmdBCFrameDef - Defines the sequence of 1553 transfers within a minor
frame. The Minor frame characteristics defined by this function include:
Minor Frame ID - an ID that you define for the minor frame (1 - 64 is
available)
Number of Instructions (Transfers) in the Minor frame
74 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Type of instruction - Generally this parameter is the 1553 Transfer ID,
however, the API S/W Library provides for advanced programming of
the minor frames other than transfer identification. Instructions which
can be executed by the BC at the programmed location in the minor
frame are shown in Table 4.2.5.1-I:
Table 4.2.5.1-I Standard Framing Mode Instructions
Constant Description
API_BC_INSTR_TRANSFER Execute BC Transfer
API_BC_INSTR_SKIP BC Skip (skip a specified number of instructions)
API_BC_INSTR_WAIT BC Wait (wait a specified delay time).
API_BC_INSTR_STROBE BC external Strobe (output strobe pulse)
b. ApiCmdBCMFrameDefEx - Defines the sequence of minor frames within the
major frame using the Minor Frame IDs defined in the ApiCmdBCFrameDef
function above. Therefore, this function should be executed after the
ApiCmdBCFrameDef function above.
The following
example defines
minor/major frames
using the Standard
Framing mode.
This sample code
demonstrates the
setup of minor and
major frames and the starting of the BC using 4 previously setup transfers with Transfer IDs of
1 through 4. The first minor frame includes 5 instructions; (1) execute Transfer 1, (2) execute
Transfer 2, (3) execute a wait delay of 1 millisecond, (4) execute Transfer 3, (5) execute
Transfer 4. The second minor frame has only one instruction; (1) execute Transfer 1.
Define Minor Frames /* Minor Frame 1 Transfer sequence */ api_bc_frame.id = 1; /* Minor frame Identifier*/ api_bc_frame.cnt = 5; /* Number of instruction in the minor frame /* api_bc_frame.xid[0] = 1; /* Transfer 1 */ api_bc_frame.instr[0] = API_BC_INSTR_TRANSFER; api_bc_frame.xid[1] = 2; /* Transfer 2 */ api_bc_frame.instr[1] = API_BC_INSTR_TRANSFER; api_bc_frame.xid[2] = 4000; /* Insert 1 ms delay after Transfer 2 */ /* delays are in 250ns increments */ api_bc_frame.instr[2] = API_BC_INSTR_WAIT; api_bc_frame.xid[3] = 3; /* Transfer 3 */ api_bc_frame.instr[3] = API_BC_INSTR_TRANSFER;
Minor Frame 1 T1 T2 Minor Frame 2 T1
Transfer
Major Frame T3 T4
Wait 1
W1
Minor Frame Time = 10 ms
Programmer's Guide for PCI 1553 Windows Applications 75
Section 4 – Programming Using the API Library Bus Controller Programming
api_bc_frame.xid[4] = 4; /* Transfer 4 */ api_bc_frame.instr[4] = API_BC_INSTR_TRANSFER; ApiCmdBCFrameDef(ApiModuleHandle,0,&api_bc_frame); /*Define Minor Frame 1*/ /* Minor Frame 2 Transfer sequence */ api_bc_frame.id = 2;/* Minor frame Identifier*/ api_bc_frame.cnt = 1; /* Number of instruction in the minor frame /* api_bc_frame.xid[0] = 1; /* Transfer 1 */ api_bc_frame.instr[0] = API_BC_INSTR_TRANSFER; ApiCmdBCFrameDef(ApiModuleHandle,0,&api_bc_frame); /*Define Minor Frame 2*/
Define Major Frames /* Minor Frame sequence in Major Frame */ api_bc_mframe_ex.cnt = 2; /* Number of Minor Frames api_bc_mframe_ex.fid[0] = 1; /* Minor Frame 1 */ api_bc_mframe_ex.fid[1] = 2; /* Minor Frame 2 */ ApiCmdBCMFrameDefEx(ApiModuleHandle,0,&api_bc_mframe_ex);
In BC Instruction Table mode, the number of minor frame and major frames supported is
limited only by the amount of memory allocated for the BC Instruction Table list. In this
mode, the user defines both minor and major frames within one Instruction Table
(ApiCmdBCInstrTblGen). Each minor frame defined in the Table is associated with a user-
defined label. If you are using BC Instruction Table mode to setup your minor/major frames,
all programmed actions the BC is to take is to be entered into the BC Instruction Table
manually using the appropriate BC Instruction mode functions defined below.
There are two API S/W Library function calls associated with the definition of the minor/major
frames and minor frame timing for this mode including:
a. ApiCmdBCInstrTblIni - Initializes the BC Instruction Table mode. This
function internally calls ApiCmdSysMemLayout to obtain the size and start
address of the BC Instruction List from the Global memory layout.
b. ApiCmdBCInstrTblGen - Clears/Converts/Writes the BC Instruction Table
which contains the minor frame(s) and the major frame information/definition
Clears - Initializes the BC Instruction Table to all zeros. (Zeros are considered
No-Op instructions by the BC controller.)
Converts - Converts the user-defined BC Instruction Table entries into an array
of firmware instruction long-words (which are written into the BC Instruction
list area of Global Memory using the Write command). Prior to the execution
of this command the user must define the BC Instruction Table entries using
TY_API_BC_FW_INSTR structure for each BC Instruction Table entry. BC
Instruction Table entries include the following:
76 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Label - a unique user-defined 16-Bit value used as address
Firmware Operational code (Opcode) - instructions to be executed
within the minor fame. These instructions consist of one or more of the
codes shown in Table 4.2.5.2-I:
Instruction parameters - parameters required for the Firmware
Instruction
Writes - Writes the converted BC Instruction Table to the Instruction List
global memory area.
Programmer's Guide for PCI 1553 Windows Applications 77
Section 4 – Programming Using the API Library Bus Controller Programming
Table 4.2.5.2-I BC Instruction Table Mode Instructions
Constant Description
API_BC_FWI_XFER Execute BC Transfer (defined using ApiCmdBCXferDef)
API_BC_FWI_CALL Call Subtable - allows you to jump to a subtable/minor frame definition identified with a label.
API_BC_FWI_RET Return from Subtable - used to return to the main BC Instruction Table entry following the related API_BC_FWI_CALL opcode.
API_BC_FWI_JUMP Jump to Subtable / Instruction - absolute jump to an Instruction Table entry identified by a label.
API_BC_FWI_SKIP Relative Branch (Skip) - skip a user-specified number of instructions
API_BC_FWI_WTRG Wait for BC Trigger input - ties the external pulse to start of minor frames, or starts execution of the major frame based on the external pulse
API_BC_FWI_STRB Strobe BC Trigger output - instruction to output a strobe signal
API_BC_FWI_DJZ
Decrement and Jump on Zero - When using non-cyclic major frame (as specified in ApiCmdBCStart) you can jump to a label in the BC Instruction Table when the major frame counter is decremented to zero.
API_BC_FWI_WMFT Wait for next Minor Frame Time slot - instruction to wait until the next minor frame time slot begins, then continue with the following entry in the BC Instruction Table
API_BC_FWI_HALT BC Operation Halt - Halt the BC
API_BC_FWI_DELAY Delay - delay the execution of the next entry in the BC Instruction Table by a user-specified time
API_BC_FWI_CMFT Change Minor Frame Time - instruction to change the minor frame time "on-the-fly" to a user-specified value.
API_BC_FWI_RESMF Reset Major Frame - instruction to swap between several different major frames in one BC setup.
Two other API S/W Library functions can be called in order to read the contents of the Global
memory BC Instruction List including: ApiCmdBCInstrTblGetAddrFromLabel which
obtains the address of the BC Instruction List for a user-specified label, and
ApiReadBlockMemData to read the Global Memory's BC Instruction List at the address
returned by ApiCmdBCInstrTblGetAddrFromLabel.
The following
example defines
minor/major frames
using the BC
Instruction Table
mode. This sample
code demonstrates
the setup of minor
and major frames and the starting of the BC using 4 previously setup transfers with Transfer
IDs of 1 through 4. The first minor frame includes 5 instructions; (1) execute Transfer 1, (2)
execute Transfer 2, (3) execute a wait delay of 1 millisecond, (4) execute Transfer 3, (5)
execute Transfer 4. The second minor frame has only one instruction; (1) execute Transfer 1.
(Note: This is the same minor/major frame architecture setup as defined in the example for
Standard Framing mode in Section 4.2.5.1.)
Note: If you want to setup a cyclic major frame then the last instruction has to be
API_BC_FWI_JUMP (back to the start of the major frame).
Minor Frame 1 T1 T2 Minor Frame 2 T1
Transfer
Major Frame T3 T4
Wait 1
W1
78 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Define Minor/Major Frames AiUInt32 i, line; AiUInt8 rval; TY_API_BC_FW_INSTR instr_tbl[7]; AiUInt32 ctbl[7]; /* Get BC resources by initializing to BC Instruction Table mode*/ ApiCmdBCInstrTblIni(ApiModuleHandle,0); /* Clear BC Instruction Table structure */ ApiCmdBCInstrTblGen(ApiModuleHandle,0, 0 /*mode=CLEAR*/, 8 /*# of entries */, 0L/*dest_cnt*/, 0L/*dest_offset*/,instr_tbl, ctbl, &line, &rval); /* Setup BC Instruction Table */ instr_tbl[0].label = 0x1111; // Label for first minor frame instr_tbl[0].op = API_BC_FWI_XFER; instr_tbl[0].par1 = 1; /* Transfer 1*/ instr_tbl[1].op = API_BC_FWI_XFER; instr_tbl[1].par1 = 2; /* Transfer 2 */ instr_tbl[2].op = API_BC_FWI_DELAY; /* delays are in 250ns increments */ instr_tbl[2].par1 = 4000; /* Insert 1 ms delay after Transfer 2 */ instr_tbl[3].op = API_BC_FWI_XFER; instr_tbl[3].par1 = 3; /* Transfer 3 */ instr_tbl[4].op = API_BC_FWI_XFER; instr_tbl[4].par1 = 3; /* Transfer 4 */ instr_tbl[5].op = API_BC_FWI_WMFT; /* Wait for Next Minor Frame Time */ instr_tbl[6].label = 0x2222; // Label for second minor frame instr_tbl[6].op = API_BC_FWI_XFER; instr_tbl[6].par1 = 1; /* Transfer 1 */ instr_tbl[7].op = API_BC_FWI_WMFT; /* Wait for Next Minor Frame Time */ Instr_Tbl[8].op = API_BC_FWI_JUMP; /* Setup this major frame to be cyclic */ Instr_Tbl[8].label = 0x1111; /* by jumping back to the first min frame */ /* Convert and Write BC Instruction Table to memory image in ctbl */ ApiCmdBCInstrTblGen(ApiModuleHandle,0, 3/*mode=CONVERT & WRITE*/, 8 /*# of entries*/,8 /*dest_cnt*/, 0L/*dest_offset*/,instr_tbl, ctbl, &line, &rval);
Programmer's Guide for PCI 1553 Windows Applications 79
Section 4 – Programming Using the API Library Bus Controller Programming
4.2.6 Starting the Bus Controller
The BC can be started after the minor/major frame definition has been performed as defined in
Section 4.2.5. The function, ApiCmdBCStart, starts the execution of pre-defined BC
transfers/instructions and defines minor frame timing as defined below:
a. Minor Frame Time - the time allotted by the BC for each minor frame
transmission. Figure 4.2.6-1 shows how the Minor Frame Time parameter is
used by the BC to control the timing of the minor frames. In essence, the timing
starts at the beginning of the minor frame, the minor frame transfers/instructions
are executed back-to-back then the BC waits for the Minor Frame Time
(specified by the user) to expire
b. Bus Controller Start Mode - Defines the method the BC will use to begin the
transmission of the major/minor frames including one of the modes as defined
in Table 4.2.6-I.
The Autoframing method, as shown in Figure 4.2.6-2, of inserting minor frames
into the major frame is used for all start modes, with the exception of API_BC_START_EXTERNAL_PULSE.
Figures 4.2.6-3 and 4.2.6-4 show two scenarios using an external pulse to frame
the minor frames. The first scenario (Figure 4.2.6-3) shows how the rising edge
of the pulse controls the transmission of the minor frame. The second scenario
adds a wait instruction (using the ApiCmdBCFrameDef function) as the first
instruction the BC executes after the rising edge of the pulse is detected.
c. Number of times the major frames will execute. The user can specify "cyclic"
in order to continuously execute the major frame (in Standard Framing mode
only), or the user can specify a major frame count from 1 to 255 to indicate the
number of times the major frame will be transmitted.
Note: To create cyclic execution in BC Instruction Table mode, the programmer
must include the API_BC_FWI_JUMP instruction at the end of the BC
Instruction Table major frame using the ApiCmdBCInstrTblGen
function.
80 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Table 4.2.6-I BC Start Modes
Value Constant Description
1 API_BC_START_IMMEDIATELY Start BC operation / Transfer execution immediately
2 API_BC_START_EXT_TRIGGER Start BC operation / Transfer execution by external BC trigger input
3 API_BC_START_RT_MODECODE Start BC operation / Transfer execution by RT Modecode Dynamic Bus Control
4 API_BC_START_EXTERNAL_PULSE Drive minor framing from external pulse (BC trigger input)
5 API_BC_START_SETUP Prepare BC Instruction sequence (= Minor and Major Frame sequence) in the Board Global memory for a fast start with API_BC_START_FAST.
6 API_BC_START_FAST Start BC operation / Transfer execution immediately fast. Note that API_BC_START_SETUP and API_BC_START_FAST shall be used in conjunction.
7 API_BC_START_INSTR_TABLE Start BC operation / Transfer execution with predefined BC Instruction Table (refer to ApiCmdBCInstrTblGen)
8 API_BC_START_CONTINUE_ON_BC_HALT Continue BC operation (only applicable with predefined BC Instruction Table, BC operation must be already started with API_BC_START_INSTR_TABLE) Note: Not available for type AMC1553-4
Note: Modes 1-6 are applicable only to Standard Framing Mode. Modes 7 - 8 are
applicable only to BC Instruction Table Mode.
Programmer's Guide for PCI 1553 Windows Applications 81
Section 4 – Programming Using the API Library Bus Controller Programming
Figure 4.2.6-1 Minor Frame Timing Control Diagram
Figure 4.2.6-2 Minor Frames within the Major Frame using Autoframing
Transfer Sequence within the Major Frame: i, j, k, ..., n, WAIT-
Minor Frame
MFT: Minor Frame
Transfer i Transfer j Transfer k Transfer n
BC Start / Re-Starts
WAIT-MFT Wait for Minor
Frame Time
BC Transfer Frame (Minor
BC starts / re-starts automatically
(Autoframing
BC Transfer Cycle (Major
Minor Frame i
Major Frame
Minor Frame Sequence within the Major Frame: i, j, k, ...,
Minor Frame j
Minor Frame
k
Minor Frame n
MFMFMFMF
MFT: Minor Frame
82 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
Figure 4.2.6-3 Minor Frames within the Major Frame using External Pulse
Figure 4.2.6-4 Minor Frames within the Major Frame using External Pulse and a
Wait Instruction
BC Trigger Input, minimum pulse width: >75ns
BC Transfer Cycle (Major Frame)
1553 messages
Minor Frame i
WAIT x-us
Major Frame (Cycle)
Minor Frame Sequence within the Major Frame: i , j, k, ..., n
Minor Frame j
WAIT x-us
Minor Frame k
WAIT x-us
Minor Frame n
WAIT x-us
BC Trigger Input, minimum pulse width: >75ns
BC Transfer Cycle (Major Frame)
1553 messages
Minor Frame i
Major Frame (Cycle)
Minor Frame Sequence within the Major Frame: i, j, k, ..., n
Minor Frame j Minor Frame k Minor Frame n
Programmer's Guide for PCI 1553 Windows Applications 83
Section 4 – Programming Using the API Library Bus Controller Programming
Following are three examples of starting the BC; one for Standard Framing mode, and the other
two for BC Instruction Table mode. In each example, the minor frame time will be set to last
10 milliseconds.
Define Minor Frame Timing and Start the Bus Controller (for Standard Framing Mode) frame_cnt = 0; /* 0 = cyclic 1 –255 = number of major frame executions */ frame_time = 10; /* Minor Frame Time in milliseconds */ ApiCmdBCStart(ApiModuleHandle,0, API_BC_START_IMMEDIATELY, frame_cnt /*0 = cyclic*/, frame_time /* frame time in ms */,0 /* start address n/a in this mode */, &ul_MajFrameAddr, aul_MinFrameAddr);
When using BC Instruction Table mode, only the API_BC_START_INST_TABLE or
API_BC_START_CONTINUE_ON_BC start modes are applicable. In the example below, the
execution of the BC Instruction Table will start at the beginning of the table.
Define Minor Frame Timing and Start the Bus Controller (for BC Instruction Table
Mode) frame_time = 10; /* Minor Frame Time in milliseconds */ frame_cnt = 0; /* (0 = cyclic is N/A value for BC Instruction Tbl mode. However, */ /* you can specify the major frame count for non-cyclic major */ /* frames: 1 –255 = number of major frame executions */ ApiCmdBCStart(ApiModuleHandle,0, API_BC_START_INSTR_TABLE, frame_cnt /*0 = cyclic*/, frame_time /* frame time in ms */, 0 /* BC Instr Tbl start address */ &ul_MajFrameAddr, aul_MinFrameAddr);
Note: To create cyclic execution in BC Instruction Table mode, the programmer must include
the API_BC_FWI_JUMP instruction at the end of the BC Instruction Table major
frame using the ApiCmdBCInstrTblGen function. When in this mode, the user can
specify a major frame count for non-cyclic BC Instruction Table lists.
To start execution from a different instruction in the BC Instruction, the instruction must have a
label defined. You would then need to get the address of the label (using
ApiCmdBCInstrTblGetAddrFromLabel), and use that address in the ApiCmdBCStart
function call as shown below. (This example uses the BC Instruction Table minor frame/major
frame definition example shown in section 4.2.5.2.)
Define Minor Frame Timing and Start the Bus Controller (for BC Instruction Table
Mode with execution start at a label other than the first label in the table.) frame_time = 10; /* Minor Frame Time in milliseconds */ frame_cnt = 0; /* (0 = cyclic is N/A value for BC Instruction Tbl mode. However, */ /* you can specify the major frame count for non-cyclic major */ /* frames: 1 –255 = number of major frame executions */ ApiCmdBCInstrTblGetAddrFromLabel(ApiModuleHandle, 0, 0x2222 /*label for 2nd minor frame*/, 8 /*# of entries*/,instr_tbl, &saddr, &line); ApiCmdBCStart(ApiModuleHandle,0, API_BC_START_INSTR_TABLE, frame_cnt /*0 = cyclic*/, frame_time /* frame time in ms */, saddr /* BCInstr Tbl start address*/, &ul_MajFrameAddr, aul_MinFrameAddr);
84 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
4.2.7 Acyclic 1553 Transfers
Acyclic 1553 transfers may be required in your application if there are certain conditions under
which you may want to insert a sequence of transfer(s) "on the fly" (or at a pre-defined time)
into the major frame. The new acyclic frame containing the sequence of transfers will be
inserted into the major frame by the BC one time upon the completion of the BC
transfer/instruction currently being executed. In order to prepare for the "on the fly" insertion,
you must first have the transfers defined as described in Section 4.2.2. The following
additional functions must be used including:
a. ApiCmdBCAcycPrep - Defines the properties of the acyclic "on-the-fly" BC
transfers/instructions to be inserted into the BC framing sequence. This
instruction is basically identical to the ApiCmdBCFrameDef without the
definition of a Minor Frame ID (since it will be sent "on the fly").
b. ApiCmdBCAcycSend - Starts the insertion of the acyclic "on-the-fly" transfers
using one of the following methods:
1. Insert immediately into the BC framing sequence upon transmission
completion of the current BC transfer/instruction
2. Insert at a user-specified-time
3. Insert after the current normal minor frame is completed and before the
next normal minor frame starts.
Examples of acyclic transfer programming using the BC functions described above can be
found in the LS_BC_Acyclic_Xfers_Sample.C program. The following sample code
demonstrates the insertion of two transfers immediately upon request using two previously
setup transfers with Transfer IDs of 1 and 2. Once normal BC operations have started, the
acyclic transfer can be sent.
Define the transfers that will be sent in the acyclic frame. A maximum of 127 Transfers
can be sent in one Acyclic Frame.
// Prepare Acyclic Transfer sequence api_bc_acyc.cnt = 2; api_bc_acyc.xid[0] = 1; // Transfer 1 api_bc_acyc.instr[0] = API_BC_INSTR_TRANSFER; api_bc_acyc.xid[1] = 2; // Transfer 2 api_bc_acyc.instr[1] = API_BC_INSTR_TRANSFER; ApiCmdBCAcycPrep(ApiModuleHandle,0, &api_bc_acyc);
Programmer's Guide for PCI 1553 Windows Applications 85
Section 4 – Programming Using the API Library Bus Controller Programming
Note: Acyclic transfers can be performed when using either the Standard Framing mode or
the BC Instruction Table mode for minor/major frame definition.
Note: The function returns before all acyclic data has been sent!
4.2.8 BC Interrupt Programming
As introduced in Section 4.1.7, the BC is capable of producing interrupts upon the occurrence
of certain events. Interrupt Handler(s) must be created to process the interrupts which occur
after the BC has been started and an interrupt occurs. Some possible BC Interrupt Handler
functions may include: (1) refilling the message buffer at the end-of-transfer interrupt, and/or
(2) reporting transfer errors on a transfer error interrupt. The functions required to setup BC
interrupts and interrupt handler execution include the Library Administration and Initialization
functions as defined in section 4.1.7, and one or more of the BC function calls (as your
application requires) defined as follows:
a. ApiCmdBCXferDef - Setup the BC to perform an interrupt on any of the
following conditions:
Interrupt on End of Transfer
Interrupt on Transfer Error
Interrupt on Status Word exception
b. ApiCmdBCFrameDef, ApiCmdBCAcycPrep, or ApiCmdBCInstrTblGen -
Within the sequence of transfer instructions defined within a minor frame, you
can setup an instruction to generate an interrupt.
Interrupt upon occurrence of a transfer instruction defined as BC Skip
instruction with interrupt enabled
c. ApiCmdBCStart – when setup for non-cyclic major frame transmission
Interrupt after the user-specified count of major frames have been
transmitted and BC is halted.
Once you have configured the BC to generate an interrupt and you have created an Interrupt
Handler function to handle the interrupt, then start the BC using the ApiCmdBCStart function
to start data flow. If the BC determines that an interrupt has occurred, the BC will initiate a
call to the Interrupt Handler function and provide information about the interrupt as defined in
the ApiInstIntHandler handler definition in the associated Software Library Reference
Manual for Windows Applications.
The following sub-sections describe how to setup the BC transfer to create an interrupt.
86 Programmer's Guide for PCI 1553 Windows Applications
Section 4 – Programming Using the API Library Bus Controller Programming
4.2.8.1 How to Setup the 1553 Transfer to Cause an Interrupt
As described above, the BC can be setup to interrupt during a transfer on one of the following
conditions as shown in Table 4.2.8.1-I.:
a. Interrupt on End of Transfer - an interrupt will be logged to the interrupt loglist
when the when the transfer is complete (including status word/frame)
b. Interrupt on Transfer Error - an interrupt will be logged to the interrupt loglist
when a transfer error is detected
c. Interrupt on Status Word exception - an interrupt will be logged to the interrupt
loglist when the Staus Word received by the BC AND'd with the Status Word
Exception Mask indicates a non-zero condition. When configuring your transfer
to interrupt on a Status Word Exception, you must set the Status Word
Exception Mask to indicate the Status Word Exception the BC is to look for. In
the Status Word Exception Interrupt Transfer defined in Table 4.2.8.1-I, the
Status Word Exception Mask is setup to look for a "Busy" condition in the
Status Word.
Table 4.2.8.1-I Setup for 1553 Transfers to Generate Interrupts
MIL-STD-1553 BC Transfer Definition Parameters defined using ApiCmdBCXferDef
Transfer Structure element in api_bc_xfer End of Transfer Interrupt Transfer Error Interrupt Status Word Exception Interrupt xid (1 - 511)* (1 - 511)* (1 - 511)*
See Section 5.2.2, LS_Interrupt_Sample.c for an example of how to program the BC to
"interrupt on end of transfer" and how to setup an interrupt handler service routine to handle
those interrupts.
Programmer's Guide for PCI 1553 Windows Applications 87
Section 4 – Programming Using the API Library Bus Controller Programming
4.2.8.2 How to Setup the Minor Frame Transfer Sequence to Cause an Interrupt
Although used less frequently, the BC can be setup to generate an interrupt between transfers in
a minor frame or acyclic frame. This can be accomplished using the functions
ApiCmdBCFrameDef (for minor frame transfer sequence definition in Standard Framing
mode), ApiCmdBCInstrTblGen (for minor frame transfer sequence definition in BC
Instruction Table mode), and ApiCmdBCAcycPrep (for acyclic frame transfer sequence
definition).
a. For ApiCmdBCFrameDef and ApiCmdBCAcycPrep, the two function
parameters associated with this setup include the transfer instruction, "inst",
and the transfer ID "xid". These two parameters should be setup as follows:
"inst" - set to the Skip Instruction (inst = API_BC_INSTR_SKIP)
"xid" - set the Skip Count to 1 (which basically is interpreted as a "No
operation" instruction) and enable the interrupt.
b. For ApiCmdBCInstrTblGen the two function parameters associated with this
setup include the transfer instruction, "op" and the instruction parameter
"par2". These two parameters should be setup as follows:
"op" - set to the Skip Instruction (inst = API_BC_FWI_SKIP)
"par2" - set INT = 1 to enable the interrupt.
4.2.9 Status Word Exception Handling
The BC can be programmed to monitor bits in the Status word received from an RT SA/Mode
code. If any of the Status word bits (programmed to be monitored) are set in the Status word
received from the RT SA/Mode code, the BC can also be programmed to halt the BC or
generate an interrupt such that a user-developed interrupt handler can provide further
processing.
There is one function associated with programming the BC to handle Status word Exceptions:
ApiCmdBCXferDef. (Handling of the Service Request in the RT Status word is a special case
and is discussed in Section 4.2.9.1.) As defined in section 4.2.2, the ApiCmdBCXferDef BC
function will utilize the api_bc_xfer structure to define the properties of a 1553 transfer.
Information contained in this structure is not only used to create the Command word, Data
word(s)/Mode Code, it is also used to define the process for handling the Status word generated
by the RT(s) SA/Mode code associated with the transfer. The api_bc_xfer structure
parameters associated with Status word exception handling are shown in Table 4.2.9-I.
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Table 4.2.9-I BC Transfer Definition Parameters for Status Word Exception Handling
MIL-STD-1553 BC Transfer Definition Parameters defined using ApiCmdBCXferDef
Transfer Structure element in api_bc_xfer Definition tic Interrupt control - setup for generation of a BC
interrupt upon end of transfer, transfer error or
status word exception (See Section 4.2.8)
hlt Halt control - setup to halt the BC upon end of
transfer, transfer error, status word exception or any interrupt
sxh Status word exception handling - defines the process
to execute upon occurrence of a Status word Service
Request
swxm Status Word Exception Mask - defines the bits in the status word received from the RT that will be checked by the BC
rsp Expected Response - defines the response the BC expects from the RT such as basic response as defined by ApiCmdDefMilbusProtocol, no status word 1 expected, or no status word 2 expected.
The Status Word Exception Mask (swxm) is used to mask (AND mask) the status word
response of the RT SA/Mode code. The Status Word Exception Mask is used for both
responses received by the BC for RT-to-RT transfers. If the result of the mask process is not
zero, an interrupt is asserted, if enabled via the tic parameter and/or the BC is halted, if
enabled via the hlt parameter. Unexpected responses (a non-zero result of the mask process)
are not counted as errors and cause no Error Interrupt or Retry.
Table 4.2.9-II provides some examples of how to setup the parameters for
ApiCmdBCXferDef for Status word exception handling. Note that in each case the Expected
Response control (rsp) is setup to check both Status Word 1 and Status Word 2 (RT-RT
transfers only). This parameter, however, can be modified to check only Status word 1 or only
Status word 2. In the following table, three examples are setup. The first example shows the
parameter setup for configuring the BC transfer such that the BC will check the Message Error
bit (bit 10) in the Status word and interrupt if that bit is set in the Status word received by the
BC. The second example configures the BC to halt the BC if the Instrumentation error bit (bit
9) is set in the Status word. The third example configures the BC transfer such that the BC will
interrupt if either the Message Error bit (bit 10) or the Busy bit (bit 3) is set in the Status word
Programmer's Guide for PCI 1553 Windows Applications 89
Section 4 – Programming Using the API Library Bus Controller Programming
Table 4.2.9-II Transfer Setup for Status Word Exception Handling Examples
1553 BC Transfer Definition Parameters
Interrupt on Message Error in RT Status Word
Halt the BC on Instrumentation Error in RT Status Word
Interrupt on Busy set or Message Error in RT Status Word
To implement the capability for your simulated RT to receive Broadcast messages you will
need to setup RT31 to receive/transmit application required Mode codes and/or Data Broadcast
messages using the functions discussed in Section 4.3.2.
As discussed in Section 4.3.2.2 above, the RT interface will provide automatic processing for
RT31 of the Mode codes listed in Section 4.3.2.2, items (a) - (e). All other Mode codes not
automatically handled by the RT interface will need to be processed by your application. The
application developer will need to configure the RT31 to receive these required Mode codes
and generate an interrupt upon transfer. This setup can be accomplished using the
ApiCmdRTSACon function as described in Section 4.3.2. See Section 4.3.4 for further
information regarding RT Interrupt Handling. The user-developed interrupt service routine can
106 Programmer's Guide for PCI 1553 Windows Applications
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be called to process the Broadcasted Mode code for the simulated RT(s). Broadcast Message
processing required by your application may include:
a. Updating the Next Status word for all other simulated RTs with the "Broadcast
Command Received" bit set such that when each of the simulated RTs receives
the next command, the status word sent in response to that command will
include the "Broadcast Command Received Bit" set. Setting of the Next Status
word for an individual RT can be accomplished using the ApiCmdRTNXW
function.
b. Updating the Last Command word for all other simulated RTs with the bits 4-
19 of the Command word received in the Broadcast Transfer such that if any of
the simulated RTs receive a Transmit Last Command Mode code, the Last
Command will be the Broadcast Command last received. Setting of the Last
Command word for an individual RT can be accomplished using the
ApiCmdRTLCW function.
c. Performing the functions necessary to simulate the Mode code command issued.
As shown in Table 4.3.2.2-I, not all Mode codes are allowed for Broadcast.
4.3.3 RT Transfers Error Injection
There are two methods that you can use to inject errors into an RT transmission:
a. Use the ApiCmdRTSAConErr function for error injection in any Status word
or Data word transmitted by an RT
b. Manipulate the Status word Busy or Message Error bits using the Status word
masking ability in either the ApiCmdRTIni function, the ApiCmdRTSACon
function or the ApiCmdRTNXW function.
These two methods are described in the following sections.
4.3.3.1 RT Transfers Error Injection into Status/Data Word
RT transmissions can be configured for error injection in any Status word or Data word
transmitted by an RT. The RT is capable of injecting one of the following errors for a defined
transfer:
a. Status Sync Error - changes the transmitted Status word sync pattern to one
specified by the user
b. Data Sync Error - changes the transmitted Data word sync pattern to one
specified by the user
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Section 4 - Programming Using the API Library Remote Terminal Programming
c. Parity Error - creates a parity error for the Status word or specified Data word
d. Manchester stuck at high error - creates a Manchester stuck at high error for a
specified Status word, or Data Word at a specified bit position
e. Manchester stuck at low error - creates a Manchester stuck at low error for a
specified Status word, or Data Word at a specified bit position
f. Gap error - inserts specified Gap after defined Status or Data word
g. Word Count High - transmits the number of Data words defined for the
original transfer plus one
h. Word Count Low - transmits the number of Data words defined for the original
transfer minus one
i. Bit Count High - transmits a specified number (1-3) additional bits for
specified Status word or Data word.
j. Bit Count Low - transmits a specified number (1-3) less bits for specified
Status word or Data word.
k. Alternate Bus Error - responds on the wrong bus
l. Zero Crossing Low Deviation Error - implements zero crossing low deviation
at a specified Status word or Data word position, bit position with four
predefined deviation values.
m. Zero Crossing High Deviation Error - implements zero crossing high
deviation at a specified Command word or Data word position, bit position with
four predefined deviation values.
To setup for error injection, the ApiCmdRTSAConErr function should be used after the RT
has been setup to transmit data using the ApiCmdRTBHDef and ApiCmdRTSACon
functions. The following error injection sample code will setup the transfer to inject a Data
Sync Error on the third data word. The transfer definition parameters and the values required
for error injection are shown in bold text.
Set RT-to-BC RT01 Transmit SA02 WC15 (Inject Data Sync Error in 3rd data word)
rt_hid = 1; // Defines the buffer header that will be assigned to this RT transfer buf_id = 13; // Defines the buffer ID that will be used by the RT Buffer Header ID. ApiCmdRTBHDef(ApiModuleHandle,0,rt_hid,buf_id,0,0,API_QUEUE_SIZE_1,0,0,0,0,0, &api_rt_bh_desc); ApiCmdRTSACon( ApiModuleHandle, 0, 1/*RT*/, 2/*SA*/, rt_hid/*HID*/, API_RT_TYPE_TRANSMIT_SA, API_RT_ENABLE_SA, 0/*rmod*/, API_RT_SWM_OR, 0/*swm*/);
type = API_ERR_TYPE_DATA_SYNC;
sync = 0x30; // set invalid data sync 110000
contig = 0; // not used
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wpos = 3; // Inject Error on the 3 data word
bpos = 0; // not used
bc_bits = 0; // not used
ty_api_rt_err.type = API_ERR_TYPE_DATA_SYNC; /* error injection type */
4.3.3.2 RT Transfer Error Emulation via Status Word Response
The Status word sent by an RT upon receipt of a BC Command/Data word can be manipulated
to indicate that the RT is Busy or that it detected a Message Error. If either of these bits (See
Figure 4.3.2-2, Status Word Bits) is set by the user, the RT SA/Mode code will only respond
with the Status word, and not the requested data transmission/receipt. This can be
accomplished using one of the following two methods:
a. When initializing the RT using the ApiCmdRTIni function, the Next RT
Status word parameter can be initialized with either of the bits set. However,
this will cause the bit(s) to be set for Subaddresses and Mode code initialized
for that RT. The following example initializes RT1 with the busy bit (4th bit)
set for the Next Status word
// Remote Terminal Initialization of RT1 with the busy bit set in Next Status word ApiCmdRTIni(ApiModuleHandle,0, 1/*RT*/,API_RT_ENABLE_SIMULATION, 0, 8, 0x0808);
b. When setting up the RT Subaddress/Mode code using the ApiCmdRTSACon
function, the Status Word Mask control (smod) and Status Word Mask (swm)
parameters can be setup to raise the Busy or Message Error bits of the Status
word. The following example shows RT1 Transmit SA2 setup such that the it's
Status Word response Message Error bit will be set (11th bit). The Status word
Mask Control (smod) is set to use logical "OR" function as the masking
mechanism.
// RT1 Transmit SA2 initialized with the Message Error bit set in Next Status word ApiCmdRTSACon( ApiModuleHandle, 0, 1/*RT*/, 2/*SA*/, rt_hid/*HID*/, API_RT_TYPE_TRANSMIT_SA, API_RT_ENABLE_SA, 0/*rmod*/, API_RT_SWM_OR/*smod*/, 0x0400/*swm*/);
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4.3.4 RT Interrupt Programming
As introduced in Section 4.1.7, the RT is capable of producing interrupts upon the occurrence
of certain events. Interrupt Handler(s) must be created to process the interrupts which occur
after the RT has been started and an interrupt occurs. Some possible RT Interrupt Handler
applications may include: (1) refilling a transmit buffer at the end of a transfer interrupt, (2)
gathering the data words received in the receive message buffer at the end of the transfer and/or
(3) reporting transfer errors on a transfer error interrupt. The functions required to setup RT
interrupts and interrupt handler execution include the Library Administration and Initialization
functions as defined in section 4.1.7, and the RT function call defined as follows:
a. ApiCmdRTSACon - Setup the RT Subaddress to perform an interrupt on any
of the following conditions:
Interrupt on End of Transfer
Interrupt on Transfer Error
Once you have configured the RT(s) to generate an interrupt and you have created an Interrupt
Handler function to handle the interrupt, then start the RT using the ApiCmdRTStart function
to start data flow. If the RT determines that an interrupt has occurred, the RT will initiate a call
to the Interrupt Handler function and provide information about the interrupt as defined in the
ApiInstIntHandler handler definition in the associated Software Library Reference Manual
for Windows Applications.
The following section describes how to setup an RT transfer to create an interrupt.
4.3.4.1 How to Setup the RT Transfer to Cause an Interrupt
As described above, using the ApiCmdRTSACon function, the RT can be setup to interrupt
during a transfer on one of the following conditions as shown in Table 4.3.4.1-I.:
a. Interrupt on End of Transfer
b. Interrupt on Transfer Error
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Table 4.3.4.1-I Setup for RT Transfers to Generate Interrupts
RT Transfer Definition Parameters
ApiCmdRTSACon parameters
End of Transfer Interrupt Transfer Error Interrupt
Remote Terminal 0 - 31 0 - 31
Subaddress/ Mode code
1 - 30 1 - 30
Header ID 1 – 511* 1 – 511*
Subaddress Type any any
Subaddress Control API_RT_ENABLE_SA_INT_XFER API_RT_ENABLE_SA_INT_ERR
* Board dependant, see table 3.2.6.1-I
See Section 5.2.2, LS_Interrupt_Sample.c for an example of how to program the RT to
"interrupt on end of transfer" and "interrupt on transfer error", and how to setup an interrupt
handler service routine to handle those interrupts.
4.3.5 RT Global Configuration
If your application consists of many non-complex RT simulations, you may choose to use the
RT Global Configuration function, ApiCmdRTGlobalCon to perform the setup of your RTs.
This function is a combination of both the ApiCmdRTIni and the ApiCmdRTSACon plus it
allows initialization of the buffers used for RT data transmission.
4.3.6 Tracking RT Receive Data using Track Multiplex Buffers
An RT can be programmed to store 1553 Data message "tracks" received by an RT SA/Mode
code into a Track Multiplex Buffer (accessible by the user-application), thus, providing a
means to analyze specific filtered 1553 data transferred over the MILbus. Tracks are defined as
1-32 data words of a 1553 Data message. The length of the Track, and the RT SA/Mode code
associated with the Track is specified using the function ApiCmdTrackDefEx. When the 1553
Data message is received at the user-specified RT SA/Mode code, the RT will store the Track
into a Track Multiplex Buffer at the Track Multiplex Buffer Index contained within the 1553
Data message. The Track Multiplex Buffer and location of the Track Multiplex Buffer Index
in the 1553 Data message are also specified using the function ApiCmdTrackDefEx. Figure
4.3.6-1 provides an example of the Track process.
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Section 4 - Programming Using the API Library Remote Terminal Programming
Figure 4.3.6-1 RT Track Process Example
In Figure 4.3.6-1 Example, RT1 SA1 is receiving is a 1553 Data message with 32 data words.
Using ApiCmdTrackDefEx the user specifies:
a. The RT SA/Mode code in which a "Track" is defined within a received 1553
Data message. In our example, the RT1 SA1 is used (The RT SA/Mode code
must be previously defined using ApiCmdRTSACon.)
b. The ID of the Track Multiplex Buffer (Ex. 0) used to store the multiplexed
tracks (Range is 0 - 31). The Track Multiplex Buffers are shared by the RT and
BC functions.
c. The Track Multiplex Buffer Index location in the 1553 Data Buffer. In this
example, word 5, bits 14-16 were used. This allows a three bit index which
limits the number of Tracks (item (d) below) in the Track Multiplex Buffer to 8.
The Track Multiplex Buffer Index will be located in the first word of the Track.
d. The number of multiplexed tracks (Ex. 8) to be located in the Track Multiplex
Buffer (Range is 1 - 1024). The number of multiplexed tracks allowed depends
on the bit size of the Track Multiplex Buffer Index (item (c) above). In our
example, 3 bits were used for the index, thus allowing 8 tracks in the Track
Mutiplex Buffer.
........ ..
....
..
Track Multiplex
Buffer ID 0
Track
(at Index 0)
Track
(at Index 1)
Track
(at Index 7)
RT1 SA1 RX
Data Buffer = 32 words
Track
21 words 00
Track
Multiplex
Buffer
Index
(at
location
word 5
bits 13-15)
RT1 SA1 RX
Data Buffer = 32 words
Track
21 words 01
RT1 SA1 RX
Data Buffer = 32 words
Track
21 words 07
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e. The Track start location (Ex. word 5) and Track Length (Ex. 21). The
Track can start at any word within the 1553 Data Buffer (0-31) and be up to 32
words long. The first word of the track will contain the Track Multiplex Buffer
Index.
f. Number of contiguous Track Buffers (Ex. 1) the number of continuous
Tracks located in the Data buffer. If more than one Track is located in the Data
Buffer, the BC will store the additional Tracks into the Track Multiplex Buffer
at the Track Multiplex Buffer Index specified in each Track.
Using ApiCmdTrackReadEx the entire Track Multiplex Buffer or specific tracks can be read
from a specific Track Multiplex Buffer.
Note: The ApiCmdTrackDefEx and ApiCmdTrackReadEx functions can also be used when the
RT
SA/Mode code is in mailbox mode.
Programmer's Guide for PCI 1553 Windows Applications 113
Section 4 - Programming Using the API Library Bus Monitor Programming
4.4 Bus Monitor Programming
The bus monitor (BM) listens to all messages on the bus and records selected activities. The
BM is a passive device that collects data for real-time or post capture analysis. The BM can
store all or portions of traffic on the bus, including electrical and protocol errors. BMs are
primarily used for instrumentation and data bus testing.
In monitor mode, the AIM Bus Analyzer module implements a chronological recording of all
MILbus traffic. The monitor data is stored in a cyclic Monitor buffer implemented in the
Global RAM Monitor Memory area on the Bus Analyzer module (size = 0x80000 bytes for
each BIU). The following sections will define the steps required to setup the BM for different
types of data capturing, data triggering, and filter definition using the Buffer and BM functions
as defined in Tables 3.2.4-V, and 3.2.4-VIII respectively. In general, the order in which you
will need to setup your Bus Monitor Configuration is as follows:
a. Initialization (ApiCmdBMIni)
b. Decide which capture mode you would like to use (ApiCmdBMCapMode):
Standard Data Capture Mode
Selective Data Capture Mode
Recording Mode
Message Filter Recording Mode
Recording Mode using Queues (ApiCmdQueueIni) is also a BM
Capture mode and does not require the ApiCmdBMCapMode function
c. Define the interrupt mode (ApiCmdBMIntrMode) defining what type of
interrupt, if any, you would like the BM to generate.
d. If triggers are required:
Define the triggers you want to use to begin the data capture process
(ApiCmdBMTCBIni). Two dynamic triggers are allowed.
Define the scheme for starting the trigger and stopping the trigger
(ApiCmdBMFTWIni)
1. For dynamic triggers, you may not want to start the data capture
after the first trigger has occurred - you may want to wait until
several layers of the dynamic trigger have occurred before you
start capturing the data. For instance, if you need to find out what
is happening when a command value equals a certain bit pattern,
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Section 4 - Programming Using the API Library Bus Monitor Programming
and a word in the data message equals a certain bit pattern, you
may not want to actually start capturing the data until the second
condition is met.
Arm the Trigger - setup the BM to evaluate the defined Trigger(s)
(ApiCmdBMTIWIni)
e. Determine if you want to exclude any RT Subaddresses or Mode codes from the
data capture (ApiCmdBMFilterIni)
f. After the Data Capture has been performed, you will need to know how to
examine the data recorded.
g. Additional monitor features:
Monitor 8-bit or 16-bit incrementing values within the Data words
received/transmitted by an RT SA or Modecode for good/bad/stale status
values
Each of the BM Data Capture modes provides the user with various ways to capture the
MILbus traffic, and methods of storing and generating output reports. The Bus Monitor
functions required in your application are based on the Capture mode which best suits your
application. Table 4.4-I provides a summary of the Capture Modes and the output formats that
can be generated based on how the data is stored in the Monitor Buffer.
Table 4.4-II provides a summary of the BM functions required for each of the BM Capture
Modes, whether triggers are applicable and the BM data read functions applicable to each
mode. These modes and applicable functions will be described in the following sections.
Once you have determines the mode which best suits your application, you can refer to the
applicable sub-sections within this section for guidance on programming your application.
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Section 4 - Programming Using the API Library Bus Monitor Programming
Table 4.4-I Bus Monitor Modes and Output Format Summary
a. ApiCmdBMCapMode - This BM function configures the Capture Mode. The
monitor operation provides three types of Data Buffer Capturing Modes.
Standard Data Capture Mode - data capturing is controlled by the
Start and Stop Trigger events. In this mode, the monitor begins to
store the MILbus traffic in the monitor buffer, immediately after the
monitor has been synchronized on the data stream. (Synchronization
occurs after a received word is detected with a "Command SYNC" and if
the word is preceded by a gap, which is greater than the System
Response Timeout value.) Afterwards, if the first Start Trigger Event
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occurs "Data Capture" begins. This means, that the Monitor Start
Trigger Pointer is set to the buffer entry location which released the first
Start Trigger Event and the Trace After Trigger Count is now
decremented for every buffer entry related to the transfer.
When data capturing is active, the monitor fills the Monitor buffer with
the MILbus data until the data capturing is stopped by a Stop Trigger
Event or if the Trace After Trigger Count is expired. In case of the
Stop Trigger Event, the data capturing can be restarted by the next Start
Trigger Event. This Start and Stop Trigger mechanism can be repeated
until the Trace After Trigger Count is expired. If the Trace After Trigger
Count is decremented to zero, the Trigger Control Block processing
facility and the Transfer and Error Counter are still working, but no
further data is stored in the buffer.
Selective Data Capture Mode - data capturing is controlled by the
Start Trigger events and the Monitor Message Capture Count. This
mode is used for selective data captures such as the following examples:
1. Capture a message only when the value of a specific Data Word
is within specified limits.
2. Capture only faulty transfers (or messages with a certain error
type).
3. Capture only messages with a certain Status Word response.
In this mode, the monitor begins to store the MILbus traffic in the
monitor buffer, immediately after the monitor has been synchronized on
the data stream. But if the Start Trigger Event does not occur during the
recorded transfer, the recorded monitor entries are discarded from the
monitor buffer.
If the Start Trigger Event occurs during the transfer, "Data Capture"
begins and the monitor stores the number of transfers in the buffer, as
defined by the Message Capture Count word and the Trace After
Trigger Count is now decremented for every buffer entry related to the
transfer. When the Message Capture Count is expired, the data
capturing is stopped until the next Start Trigger Event occurs, which
restarts the data capturing for the next transfer sequence.
This data capturing mechanism can be repeated, until the Trace After
Trigger Count is decremented to zero. After the Trace After Trigger
Count is expired, the Trigger Control Block processing facility and the
Transfer and Error Counter are still working, but no further data is stored
in the buffer.
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Note: If the data capturing is started (Start Trigger Event) during a transfer,
the whole message will be captured in the monitor.
Recording Mode - the data capturing is continuously active. This
mode is useful for recording large amounts of data which may be used
for replay or post-processing analysis. In this mode, the monitor begins
to store the MILbus traffic in the monitor buffer immediately after the
monitor has been synchronized on the data stream. An interrupt will be
asserted at every half buffer full condition, if enabled. The first Half
Buffer Interrupt is asserted if the buffer is filled by half, relative to the
first entry of the transfer. (At this point the data can be logged to the
host.) In this state of operation, the monitor goes on with continuous
data capturing (except the transfers which are not enabled at the
corresponding Monitor Activity Recording and Message Filtering
descriptors), until the Monitor operation is disabled.
In the Recording Mode, the Transfer and Error Counter are still working.
The Trace After Trigger Count is not processed with this Capture
Mode.
Message Filter Recording Mode - the data capturing is continuously
active. This mode is similar to the Recording mode with the following
differences:
1. Data recorded is filtered based on up to 255 user-specified
Command word values using the ApiCmdBMIniMsgFltRec
function.
If desire, the data recorded by the BM can be setup to begin upon
a Start Trigger Event.
2. This mode provides for one of four possible user-selectable
formatted Bus Monitor message output formats using the
ApiCmdBMReadMsgFltRec function.
b. ApiCmdBMIntrMode -configures the associated BM interrupt and output
strobe output related to the Bus Monitor. This function is dependent on the
ApiCmdBMCapMode function described above in that some interrupts or
strobes are not applicable to some of the capture modes defined above.
You can setup the BM to generate an interrupt on one of the following
conditions. Of course, an interrupt handler service routine will need to
be created to handle this interrupt. (See section 4.4.5 for further
information regarding BM Interrupt Handling.)
1. Interrupt when the Monitor Buffer is half full
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Section 4 - Programming Using the API Library Bus Monitor Programming
2. Interrupt on Capture Start (as defined for the Standard
Capture, Selective Capture and Message Filter Recording
modes above)
3. Interrupt on Capture Stop or End of Select Capture
You can setup the BM to generate an output strobe signal on the BM
Trigger output pin when one of the same conditions defined above is
met. (See the associated AIM Hardware Manual for pin location).
The following sample code sets up the BM to Standard Capture Mode which will record
MILBus traffic immediately upon synchronization, and start decrementing the Trace after
Trigger counter (set to 100) after the first Start Trigger Event, "Capture Start", occurs. (Which
still needs to be setup with the Trigger Control Block Function, ApiCmdBMTCBIni, defined
in the following section.) The Bus Monitor will stop recording after the Trace After Trigger
counter reaches 0 or a Stop Trigger Event occurs. An interrupt will occur when the Start
Trigger Event occurs.
//Set BM to Standard Capture Mode and define the number of messages to be stored in //the Monitor Buffer after the Trigger Start Event set to 100 api_bm_cap.cap_mode = API_BM_CAPMODE_ALL; api_bm_cap.cap_tat = 100; /* trace after trigger counter */ api_bm_cap.cap_mcc = 0; api_bm_cap.cap_fsize = 0; ApiCmdBMCapMode(ApiModuleHandle,0,&api_bm_cap); //Enable interrupt on Capture start, disable strobe output ApiCmdBMIntrMode(ApiModuleHandle,0,API_BM_MODE_START_EVENT_INT, API_BM_NO_STROBE,0);
4.4.3 Bus Monitor Triggers
If your Capture mode requires a Start Trigger Event or you want to tag the recorded monitor
data where the trigger occurs, you will need to setup at least one trigger. This section will
describe the following:
a. Trigger Definition (using ApiCmdBMTCBIni) - defines the types of triggers
that are available and how to setup a Trigger Control Block (TCB)
b. Starting/Stopping the "Data Capture" Process (using ApiCmdBMFTWIni)
- defines the software functions required to create a Start Trigger Event and a
Stop Trigger Event
c. Arming the Trigger (using ApiCmdBMTIWIni) - defines the functions
required to communicate to the Bus Monitor which triggers to evaluate.
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4.4.3.1 Bus Monitor Trigger Definition
The Bus Monitor is capable of monitoring bus traffic using up to two dynamic triggers in
parallel to determine the start/stop of data capture. Triggers provide the user with the
capability to monitor bus traffic for the occurrence of a specific error condition (such as parity
error) and/or a discrete external trigger received at the BM Trigger input pin (See the
corresponding Hardware Manual). Dynamic triggers provide the user with the capability to
monitor the bus traffic for a sequence of events. An example of a sequence of events could be:
SEQ1-a word received on the primary bus, SEQ2-the word is a status word, and SEQ3-the
word has bit 8 set.
Each trigger requires that the user first configure a Trigger Control Block (TCB) which
contains information about the conditions of the trigger. All triggers use the function
ApiCmdBMTCBIni to configure their TCB. The user has the capability of pre-defining up to
254 TCBs, then using them as the BM application requires. This section will describe how to
setup a TCB, however, to tell the BM the scheme to be used to start and stop the "Data
Capture" process and which TCBs to evaluate, you will need to issue two additional commands
to the BM as defined in Sections 4.4.3.2 and 4.4.3.3.
Table 4.4.3.1-I contains the list of parameters associated with the TCB. The values for each
parameter are dependent upon the Type of Trigger you are setting up. The following sections
will discuss the parameter setup for different Triggers.
As shown in Table 4.4.3.1-I, there are 4 parameters that apply to all two types of triggers.
These parameters will be described in this section as follows:
a. Generate External Strobe on Trigger - when set, if this TCB is active as one
of the two possible Triggers, and the condition specified in the TCB is met, the
BM will output a strobe signal on the external BM Trigger output pin.
b. Generate Interrupt on Trigger - when set, if this TCB is active as one of the
two possible Triggers, and the condition specified in the TCB is met, the BM
will generate a TCB Interrupt and pass the TCB number to the BM Interrupt
Handler Routine (user program)
c. Trigger Reset - This parameter tells the BM what bits to reset in the Monitor
Status Word if the trigger condition is met. See Section 4.4.3.2 for a more
detailed description of the Trigger Start/Stop processing performed by the BM.
d. Trigger Set - This parameter tells the BM what bits to set in the Monitor
Status Word if the trigger condition is met. See Section 4.4.3.2 for a more
detailed description of the Trigger Start/Stop processing performed by the BM.
Programmer's Guide for PCI 1553 Windows Applications 123
Section 4 - Programming Using the API Library Bus Monitor Programming
Table 4.4.3.1-I Trigger Control Block Structure
Trigger Control Block Parameter Definitions
Structure Parameter Description Type of Trigger it Applies to
api_bm_tcb.tt Trigger Type - Trigger on: 0 - Error Condition 1 - External Event 2 - Received Word 3 - Data Value
All
api_bm_tcb.sot Generate External Strobe on Trigger
All
api_bm_tcb.tri Generate Interrupt on Trigger
All
api_bm_tcb.inv Invert Result of Limit Check Data Value Trigger only
api_bm_tcb.tres Trigger Reset - the bits in the Monitor Status Trigger pattern to be reset when the trigger condition is met
All
api_bm_tcb.tset Trigger Set - the bits in the Monitor Status Trigger pattern to be set when the trigger condition is met
All
api_bm_tcb.tsp Trigger Specification - Data Value Trigger & Received Word Trigger
api_bm_tcb.next Next Trigger Control Block Data Value Trigger & Dynamic Word Trigger
api_bm_tcb.eom Next Trigger Control Block on End of Message
Data Value Trigger & Received Word Trigger
api_bm_tcb.tdw Trigger Data word Error Condition Trigger & Received Word Trigger
api_bm_tcb.tmw Trigger Mask - defines bits of word relevant to Received word or Data value trigger
Data Value Trigger & Received Word Trigger
api_bm_tcb.tuli Trigger Upper Limit - for range checks of Data Value Triggers
Data Value Trigger
api_bm_tcb.tlli Trigger Lower Limit - for range checks of Data Value Triggers
Data Value Trigger
4.4.3.1.1 Bus Monitor Static Trigger Definition
A Static Trigger is configured using the ApiCmdBMTCBIni function. A static trigger is a
dynamic trigger sequence with only one trigger:
a. Trigger on Error Condition
b. Trigger on External Event (strobe or pulse) detected on the BM input Trigger
pin.
The following two sections describe the parameters in the Trigger Control Block that are
associated with these triggers.
4.4.3.1.1.1 Trigger on Error Condition
You can setup the BM to trigger on any one or more error conditions. If you specify more than
one error condition for the Trigger Control Block, the trigger will be considered valid if any
124 Programmer's Guide for PCI 1553 Windows Applications
Section 4 - Programming Using the API Library Bus Monitor Programming
one of the error conditions is detected. The types of errors that can be setup to cause a Trigger
Start/Stop Event in the Bus Monitor are shown in Table 4.4.3.1.1.1-I.
Table 4.4.3.1.1.1-I Error Conditions for Triggering the Bus Monitor
Parameter
Bit ID BBiitt
## EErrrroorr DDeessccrriippttiioonn
ERR 15 Any Error (Logical OR of Bits 14 to 0). ALTER 14 Alternate Bus Response Error LCNT 13 Low Word count Error HCNT 12 High Word count Error STAT 11 Status Word Exception Error* TADDR 10 Terminal Address Error / RT-RT Protocol Error GAP 9 Early Response or Gap too short
ILLEGL 8 Illegal Command Word/ Reserved Mode Code Error TX 7 Transmission on both MILbus channels
IWGAP 6 Interword Gap Error ISYNC 5 Inverted Sync Error PAR 4 Parity Error LBIT 3 Low Bit Count Error HBIT 2 High Bit Count Error MANCH 1 Manchester Coding Error NRESP 0 Terminal No Response Error
*Note: The default Status word Exception mask is set to 0x07ff with the
ApiCmdBMIni function (all status bits are checked). If you want
the BM to trigger on only a subset of bits in the Status word, you
must setup the Status Word Exception Mask using the BM function
ApiCmdBMSWXMIni accordingly.
The subset of parameters in the Trigger Control Block Structure that define an Error Trigger
include the parameters shown in Table 4.4.3.1.1.1-II
Programmer's Guide for PCI 1553 Windows Applications 125
Section 4 - Programming Using the API Library Bus Monitor Programming
Table 4.4.3.1.1.1-II TCB Parameters for Error Condition Trigger
Trigger Control Block Parameter Definitions Applicable to Error Condition Trigger
api_bm_tcb.tt Trigger Type - Trigger on: 0 - Error Condition 1 - External Event 2 - Received Word 3 - Data Value
0
api_bm_tcb.sot Generate External Strobe on Trigger
If desired
api_bm_tcb.tri Generate Interrupt on Trigger
If desired
api_bm_tcb.tres Trigger Reset - the bits in the Monitor Status Trigger pattern to be reset when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tset Trigger Set - the bits in the Monitor Status Trigger pattern to be set when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tdw Trigger Data word Set the appropriate bit(s) in this
word for one or more of the error
conditions as defined in Table
4.4.3.1.1-I to trigger on
The following code sample sets up a Static Trigger Control Block with an Error Condition
trigger to trigger on a Parity error and a Low Word Count error. When the trigger condition is
met, the BM will not reset any bits in the Monitor Status Trigger pattern, but will set bits 0x0F
in the Monitor Status Trigger pattern. (The parameters applicable to this type of trigger are
bolded.)
// Setup Static Trigger - Error Condition // init TCB 3 for Trigger on Parity error and a Low Word Count error
api_bm_tcb.tt = API_BM_TRG_ERR_CONDITION; // Trigger Type
api_bm_tcb.sot = API_DIS; // External Trigger
api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check
api_bm_tcb.tres = 0x00; // Monitor Status Trigger pattern Reset Bits
api_bm_tcb.tset = 0x0F; // Monitor Status Trigger pattern Set Bits api_bm_tcb.tsp = 0x00; // Trigger spec api_bm_tcb.next = 0xFF; // next TCB (disabled for Static trigger) api_bm_tcb.eom = 0xFF; // next TCB End of Message control (disabled)
api_bm_tcb.tdw = 0x2010; // Trigger Data Word - indicating check for parity
CW2 3 Word is second Command Word for RT-RT transfer
ST 2 Word is Status Word
DW 1 Word is Data Word
CW 0 Word is Command Word
The subset of parameters in the Trigger Control Block Structure that define a Trigger on
Received word include the parameters shown in Table 4.4.3.1.2.1-II
The trigger condition is valid, if the following expression becomes valid:
[(The word is received on the Primary or Secondary Bus) AND (The word is Command word
2 OR Status word OR Data word OR Command word) AND ( Compare Value Check ==
True)]
Programmer's Guide for PCI 1553 Windows Applications 129
Section 4 - Programming Using the API Library Bus Monitor Programming
Table 4.4.3.1.2.1-II TCB Parameters for Dynamic Received Word Trigger
Trigger Control Block Parameter Definitions Applicable to Received Word Trigger
api_bm_tcb.tt Trigger Type - Trigger on: 0 - Error Condition 1 - External Event 2 - Received Word 3 - Data Value
3
api_bm_tcb.sot Generate External Strobe on Trigger
If desired
api_bm_tcb.tri Generate Interrupt on Trigger
If desired
api_bm_tcb.tres Trigger Reset - the bits in the Monitor Status Trigger pattern to be reset when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tset Trigger Set - the bits in the Monitor Status Trigger pattern to be set when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tsp Trigger Specification - Set the appropriate bit(s) in this
word the Received word conditions
as defined in Table 4.4.3.2.1-I to
trigger on
api_bm_tcb.next Next Trigger Control Block Next TCB to evaluate after this
trigger condition is met. (A value
of 0xFF indicates the same TCB will
be evaluated next.)
api_bm_tcb.eom Next Trigger Control Block on End of Message
Next TCB to evaluate if this
trigger control block condition is
not met for this transfer. (A value
of 0xFF indicates the same TCB will
be evaluated next.)
api_bm_tcb.tdw Trigger Data word The value of the received word the
BM is setup to trigger on
api_bm_tcb.tmw Trigger Mask - defines bits of word relevant to Received word or Data value trigger
Set the bits of this word to show
the bits of the received word that
are relevent to the word compare
The following code sample sets up a Dynamic Trigger Control Block (TCB 5) with an
Received Word Condition trigger to trigger on reception of a Command word received on the
Primary or Secondary Bus for RT1 Transmit SA1 with a 32 data word count. When the trigger
condition is met, the BM will not reset any bits in the Monitor Status Trigger pattern, but will
set bits 0x01 in the Monitor Status Trigger pattern. The BM will then begin to evaluate TCB 6
for the next word received by the BM which is indicated when you set the Next TCB (next)
to 0xFF. If the Trigger condition is not fully met by the end of the transfer, the BM will
continue to monitor TCB 5 which is indicated when you set the EOM TCB (eom) to 0xFF.
(The parameters applicable to this type of trigger are bolded.)
130 Programmer's Guide for PCI 1553 Windows Applications
Section 4 - Programming Using the API Library Bus Monitor Programming
// Setup Dynamic Trigger - Received Word - Command word received on primary or // secondary bus for RT1 SA1 with a 32-word data count // init TCB 5 for Trigger on Command from RT1 Transmit SA1 with Data word count = 32
api_bm_tcb.tt = API_BM_TRG_RECEIVED_WORD; // Trigger Type
api_bm_tcb.sot = API_DIS; // External Trigger
api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check
api_bm_tcb.tres = 0x00; // Monitor Status Trigger pattern Reset Bits
api_bm_tcb.tset = 0x01; // Monitor Status Trigger pattern Set Bits
api_bm_tcb.tsp = 0x31; // Trigger spec bits set for Pri or Sec Bus & CW
api_bm_tcb.next = 0x06; // next TCB
api_bm_tcb.eom = 0xFF; // next TCB End of Message control
api_bm_tcb.tdw = 0x0C20; // Cmd = RT1TSA1 with word count = 32
The Trigger on Data Value Trigger enables the user to setup the Bus Monitor to evaluate a
specific Data value in a word position value 1 to 32 which corresponds directly with Data
Word Location 1 to 32 of a MILbus transfer. This type of Dynamic Trigger is best used in
conjunction with a Received Word Trigger defined in the previous section in order to provide a
filtering of the transfer message prior to data word evaluation. The subset of parameters in the
Trigger Control Block Structure that define a Dynamic Data Value Trigger include the
parameters shown in Table 4.4.3.1.2.2-I
The received MILbus Word is masked (bitwise logical AND) with the Trigger Mask word
(tmw). The result is compared with the Upper limit (tuli) and Lower limit (tlli). Proper
setting of these values allow masking for certain bit fields as well as for dedicated values.
The trigger condition is valid, if the following expression becomes valid:
Note: If the Inversion of Limit Check (inv) is enabled the result of the Masked Word Limit
Check is inverted to get the result of an "Out of Limit" check.
[(Received Bus Word AND Trigger Mask word) >= Lower limit ] AND [(Received Bus
Word AND Trigger Mask word) <= Upper limit ]
Programmer's Guide for PCI 1553 Windows Applications 131
Section 4 - Programming Using the API Library Bus Monitor Programming
Table 4.4.3.1.2.2-I TCB Parameters for Dynamic Data Value Trigger
Trigger Control Block Parameter Definitions Applicable to Data Value Trigger
api_bm_tcb.tt Trigger Type - Trigger on: 0 - Error Condition 1 - External Event 2 - Received Word 3 - Data Value
3
api_bm_tcb.sot Generate External Strobe on Trigger
If desired
api_bm_tcb.tri Generate Interrupt on Trigger
If desired
api_bm_tcb.inv Invert Result of Limit Check If required
api_bm_tcb.tres Trigger Reset - the bits in the Monitor Status Trigger pattern to be reset when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tset Trigger Set - the bits in the Monitor Status Trigger pattern to be set when the trigger condition is met
See Section 4.4.3.2 for description
on how to setup
api_bm_tcb.tsp Trigger Specification - Position of the Data word to
evaluate (1-32)
api_bm_tcb.next Next Trigger Control Block TCB to evaluate after this trigger
condition is met. (A value of 0xFF
indicates the same TCB will be
evaluated next.)
api_bm_tcb.eom Next Trigger Control Block on End of Message
TCB to evaluate if this trigger
control block condition is not met
for this transfer. (A value of 0xFF
indicates the same TCB will be
evaluated next.)
api_bm_tcb.tdw Trigger Data word The value of the data word the BM
is setup to compare to
api_bm_tcb.tmw Trigger Mask - defines bits of word relevant to Received word or Data value trigger
Set the bits of this word to show
the bits of the data word that are
relevent to the word compare
api_bm_tcb.tuli Trigger Upper Limit - for range checks of Data Value Triggers
Upper limit of the data value to
check
api_bm_tcb.tlli Trigger Lower Limit - for range checks of Data Value Triggers
Lower limit of the data value to
check
The following code sample sets up a Dynamic Trigger Control Block (TCB 6) with a Data
Value Condition trigger to trigger on reception of a 4th Data word equal to 0x0033. It is
designed to be used in sequence with the TCB 5 which was setup in the previous section If the
BM determines that the 4th word does equal 0x0033, the BM will not reset any bits in the
Monitor Status Trigger pattern, but will set bits 0x0E in the Monitor Status Trigger pattern. It
will then be re-armed with TCB5 which is indicated when you set the Next TCB (next) to
0x05. If the 4th word does not equal 0x0033, no action is taken with the Monitor Stats Trigger
word bits and the BM will be re-armed using TCB 5 which is indicated when you set the EOM
TCB (eom) to 0x05. (The parameters applicable to this type of trigger are bolded.)
132 Programmer's Guide for PCI 1553 Windows Applications
Section 4 - Programming Using the API Library Bus Monitor Programming
// Setup Dynamic Trigger - Data Value - 4th Data word equal to 0x0033. // init TCB 6 for Trigger on Command from RT1 Transmit SA1 with Data word count = 32
api_bm_tcb.tt = API_BM_TRG_DATA_VALUE; // Trigger Type
api_bm_tcb.sot = API_DIS; // External Trigger
api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check
api_bm_tcb.tres = 0x00; // Monitor Status Trigger pattern Reset Bits
api_bm_tcb.tset = 0x0E; // Monitor Status Trigger pattern Set Bits
api_bm_tcb.tsp = 0x04; // Check the 4th Data word for value in .tdw
api_bm_tcb.next = 0x05; // next TCB
api_bm_tcb.eom = 0x05; // next TCB End of Message control
api_bm_tcb.tdw = 0x0033; // Compare value = 0x0033
api_bm_tcb.tmw = 0xFFFF; // Trigger mask word - all bits applicable
The Start Trigger Event condition is met if the state of the Monitor Status Trigger pattern
masked (logical "AND") with the Start Trigger Mask is equal to the Start Trigger Compare
pattern.
The Stop Trigger Event condition is met if the state of the Monitor Status Trigger pattern
masked (logical "AND") with the Stop Trigger Mask is equal to the Stop Trigger Compare
pattern.
Note: The Stop Trigger Mask and Compare field are only used during Standard Data
Capture Mode
This feature is most useful for Dynamic triggers containing more than one sequence of TCBs
or a combination of a single trigger and Dynamic Triggers. For instance, you may not want the
"Data Capture" to start when the first TCB condition is met. You may want the "Data Capture"
Start Trigger Event to occur after two or more TCB conditions have been met. In addition,
you may want the Stop Trigger Event condition to occur with the last TCB or upon the
occurrence of a trigger such as an external pulse or error condition.
There may be some cases where you would require the use of the Stop Trigger Event, but in
most cases, you would most likely use the Trace After Trigger Counter (TATC) to stop the
bus monitor processing. Table 4.4.3.2-I shows some examples of how you would set the
"tset" bits in the TCB and the Function Trigger Word, to create a Start Trigger Event and
a Stop Trigger Event and how the Capture Mode relates to the entire Bus Monitor process.
Table 4.4.3.2-I Bus Monitor Capture Scenarios
Sta
rt T
rig
ger
Mask
Sta
rt T
rig
ger
Co
mp
are
Sto
p T
rig
ger
Mask
Sto
p T
rig
ger
Co
mp
are
Capture 1000 entries upon the
occurance of an External Pulse. 0x0F N/A Start Trigger Event TATC = 0 Standard 1000 N/A 0x0F 0x0F 0x00 0xFFCapture 1000 entries upon the
occurance of an Error Condition. 0x0F N/A Start Trigger Event TATC = 0 Standard 1000 N/A 0x0F 0x0F 0x00 0xFF
Capture only the first 10 messages after
the occurance of an Error Condition. 0x0F N/A Start Trigger Event TATC = 0 Selective 1000 10 0x0F 0x0F 0x00 0xFFCapture 1000 entries after the last TCB
condition in the Dynamic Sequence of 4
TCBs is met. 0x00 0x0F Start Trigger Event TATC = 0 Standard 1000 N/A 0x0F 0x0F 0x00 0xFFCapture all entries between the
occurance of the first TCB and the last
TCB in a dynamic sequence of 10
TCBs. 0x0F 0xFF Start Trigger Event
Stop Trigger Event or
TATC = 0 Standard 100000 N/A 0x0F 0x0F 0xFF 0xFFCapture all entries on the bus
134 Programmer's Guide for PCI 1553 Windows Applications
Section 4 - Programming Using the API Library Bus Monitor Programming
In the previous section (Section 4.4.3.1), we have example code for an External Event trigger
(TCB 4), and an Error Condition trigger (TCB3). There are also two TCBs (TCB 5 and 6)
which are linked together to form one Dynamic Sequence Trigger. The first two TCBs are
defined with parameters "tset" = 0x0F. The Dynamic TCBs set the "tset" sequentially
(TCB5 sets "tset" = 0x01, TCB6 sets "tset" = "0x0E") such that when both conditions are
met the Monitor Status Trigger pattern equals 0x0F. In each trigger condition, the final
trigger pattern to create a Start Event Trigger is 0x0F, therefore, the following code shows
how to configure the Function Trigger Word in the BM to start "Data Capture" when the
Monitor Status Trigger pattern equals 0x0F:
// Set the Function Trigger Word with Mask and compare Values the Stop Trigger Mask and Compare is not used in this example. ApiCmdBMFTWIni(ApiModuleHandle, 0, API_BM_WRITE_ALL, 0x00 /*Stop Trigger Mask*/, 0xFF /*Stop Trigger Compare*/, 0x0F /*Start Trigger Mask*/, 0x0F /*Start Trigger Compare*/);
4.4.3.3 Arming the Trigger
As stated earlier in this section, the Bus Monitor is capable of monitoring bus traffic using up
to two trigger sequences in parallel. To enable the Bus Monitor to evaluate the Trigger(s) you
have defined in your Trigger Control Blocks, you must setup the Trigger Index Word using
the ApiCmdBMTIWIni function.
Issuing the ApiCmdBMTIWIni function command tells the BM which TCB(s) to evaluate for
each the two triggers allowed to be evaluated simultaneously.
a. Dynamic Trigger sequences
Sequence 0 - the start of the first trigger sequence
Sequence 1 - the start of the second trigger sequence
The BM Trigger Index Word which is setup for the BM when this command is issued is
shown in Figure 4.4.3.3-1.
Programmer's Guide for PCI 1553 Windows Applications 135
Section 4 - Programming Using the API Library Bus Monitor Programming
In the previous section (Section 4.4.3.1), we have example code for an single External Event
trigger (TCB 4), an single Error Condition Trigger (TCB3). In addition, two TCBs (TCB 5
and 6) are linked together to form one Dynamic Sequence Trigger. If we want to enable the
BM to evaluate two of these TCBs simultaneously we should issue the ApiCmdBMTIWIni
function as follows:
// Set the Trigger Index Word with the indexes of the TCBs ApiCmdBMTIWIni(ApiModuleHandle, 0, API_BM_WRITE_ALL, 0 /*reserved*/, 0 /*reserved*/, 3 /*sequence 0 TCB single error trigger */, 5 /*sequence 1 TCB dynamic trigger sequence */);
4.4.4 Bus Monitor Interrupts
As introduced in Section 4.1.7, the BM is capable of producing interrupts upon the occurrence
of certain events. Interrupt Handler(s) must be created to process the interrupts which occur
after the BM has been started and an interrupt occurs. (Polling the interrupt status is also a
method of handling interrupts.) Some possible BM Interrupt Handler applications may
include: (1) extracting Monitored Data for evaluation or display, (2) archiving Monitored Data
and/or (3) searching for error conditions tagged by the BM in the Monitored Data. The
functions required to setup BM interrupts and interrupt handler execution include the Library
Administration and Initialization functions as defined in section 4.1.7, and one or more of the
BM function calls (as your application requires) defined as follows:
a. Setup the BM to perform an interrupt on any of the following conditions (See
Table 4.4.5-I) using the associated function to perform the setup:
ApiCmdBMIntrMode - this function is described in section 4.4.2
1. Monitor Buffer Full or Half Buffer Full
2. Interrupt on Capture Start
3. Interrupt on Capture Stop or End of Selective Capture Event
136 Programmer's Guide for PCI 1553 Windows Applications
Section 4 - Programming Using the API Library Bus Monitor Programming
ApiCmdBMTCBIni - this function is described in Section 4.4.3. The
parameter in the Trigger Control Block structure (Table 4.4.3.1-I) which
can be enabled to configure the trigger to generate an interrupt is
api_bm_tcb.tri. An interrupt can be generated for all four types of
triggers.
1. Interrupts if the trigger condition becomes true
Table 4.4.4-I BM Interrupts Relative to Capture Mode
Mode Ca
ptu
re S
tart
Ca
ptu
re S
top
Bu
ffer
F
ull
/
Ha
lf F
ull
Tri
gg
er
Standard Data Capture X X X X
Selective Data Capture X X X X
Recording X
Recording with Queues X
Message Filter Recording X X
Note: To enable Half Buffer Full Interrupt for Standard and
Selective Data Capture modes, the Trace After
Trigger Counter must equal 0)
Once you have configured the BM to generate an interrupt and you have created an Interrupt
Handler function to handle the interrupt, then start the BM using the ApiCmdBMStart
function (or, if using Queues, use the ApiCmdQueueStart function) to start data flow. If the
BM determines that an interrupt has occurred, the BM will initiate a call to the Interrupt
Handler function and provide information about the interrupt as defined in the
ApiInstIntHandler handler definition in the Software Library Reference Manual for PCI
1553 Windows Applications.
The sample program, LS_Interrupt_Sample.c is included in Section 4.2.2 and provides an
example of BC and RT Interrupt Handling programming.
Programmer's Guide for PCI 1553 Windows Applications 137
Section 4 - Programming Using the API Library Bus Monitor Programming
4.4.5 Format of Data Stored in the Monitor Buffer
The Monitor stores all received words from the bus together with Time Tag information and
possible error entries, as 32 bit entries in the cyclic monitor buffer. The monitor buffer is
located in the Global RAM Monitor Memory area on the Bus Analyzer module (size =
0x80000 for each BIU).
The Monitor stores the received MILbus words and additional tags as a Monitor Bus Word
Entry as shown in Figure 4.4.5-1. Figures 4.4.5-2 through 4.4.5-5 show the possible values for
148 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples
// Open previously recorded file "sam_rec.prc" rep_fp = fopen(replay_fname,"rb"); if ( rep_fp != NULL) file_size = filelength( fileno ( rep_fp ) ); // Initialize the Replay to replay only Low Time Tag, and to assert // a half buffer transmitted interrupt // replay full file size of "sam_rec.prc" ApiCmdReplayIni( ApiModuleHandle, 0, 1/*cet*/, 0/*nct*/, 0 /*cyc*/, 0/*nimg*/, 0/*alt*/, 0/*rlt*/, 1 /*rint*/, 0L/*min*/, 0/*msec*/, 1/*sign*/, file_size ); // Read one halfbuffer from the file. bytes_read = fread( rep_buf, sizeof(AiUInt8), HALF_BUFF_SIZE, rep_fp ); if( bytes_read > 0 ) // Get the number of entries to be replayed. ApiCmdReplayStatus( ApiModuleHandle, 0, &api_rep_stat ); // Calculate the number of required half buffer reloads. reload = api_rep_stat.entry_cnt * 4 / HALF_BUFF_SIZE; // Check if we need one more reaload in the end which is smaller than 0x10000. if( api_rep_stat.entry_cnt * 4 % HALF_BUFF_SIZE ) reload++; printf("Status: rpi_cnt:%3ld entry_cnt:%7ld (Required reloads:%3ld)\r\n", api_rep_stat.rpi_cnt, api_rep_stat.entry_cnt, reload ); // Pre-fill the replay buffer. // Set the number of bytes to copy to the replay buffer. // This is normally 0x10000, only the last buffer may be of a smaller size. api_rep_stat.size = bytes_read; // Copy the data read from the file to the 1st half of the Replay Buffer ApiWriteRepData( ApiModuleHandle, 0, &api_rep_stat, rep_buf, &bytes_written ); reload--; // Read the next data block from the file. bytes_read = fread( rep_buf, sizeof(AiUInt8), HALF_BUFF_SIZE, rep_fp ); if( bytes_read > 0) // Pre-Fill the second half of the replay buffer. api_rep_stat.size = bytes_read; ApiWriteRepData( ApiModuleHandle, 0, &api_rep_stat, rep_buf, &bytes_written ); reload--; // Start the replay of data to the 1553 MILbus ApiCmdReplayStart(ApiModuleHandle,0); prev_rpi_cnt = 0; while(1) ApiCmdReplayStatus( ApiModuleHandle, 0, &api_rep_stat ); printf("Status : rpi_cnt:%3ld entry_cnt:%7ld (Required reloads:%3ld)\r", api_rep_stat.rpi_cnt, api_rep_stat.entry_cnt, reload );
Programmer's Guide for PCI 1553 Windows Applications 149
Section 5 - Program Samples
if ( api_rep_stat.entry_cnt == 0) printf("\r\nReplay finished.\r\n"); break; // check for replay overflow diff = api_rep_stat.rpi_cnt - prev_rpi_cnt; if(diff > 1) /* We reloaded the buffer to slow. A overflow occurred. */ printf("Overflow\r\n"); break; if(diff == 1) if(reload > 0) // read data from file bytes_read = fread( rep_buf, sizeof(AiUInt8), HALF_BUFF_SIZE, rep_fp ); if ( bytes_read < 1) printf("\r\n End of file reached:""%s""\r\n", replay_fname); break; api_rep_stat.size = bytes_read; // refill inactive half replay buffer ApiWriteRepData( ApiModuleHandle, 0, &api_rep_stat, rep_buf, &bytes_written ); reload--; prev_rpi_cnt++; AIM_WAIT(2000); else printf("\r\n End of file found:""%s""\r\n", replay_fname ); else printf("\r\n End of file found:""%s"" \r\n", replay_fname ); ApiCmdReplayStop( ApiModuleHandle, 0 ); printf("\r\nApiCmdReplayStop() done.\r\n"); fclose(rep_fp); else printf("\r\n Open File:""%s"" failed !!\r\n", replay_fname);
150 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples
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Programmer's Guide for PCI 1553 Windows Applications 151
Section 5 - Program Samples
5 PROGRAM SAMPLES
Within the API/ACI1553 software package exists several sample programs which can be used
by program developers as examples for learning and developing their code. This section will
discuss the following:
a. Overview of Sample Programs
b. Description of Each Sample Program
c. Program listing for two samples:
LS_BC_RT_BM_Sample.c
LS_Interrupt_Sample.c
d. Matrix of all API S/W Library Calls vs. Sample Programs
All sample C/C++ source files are located in the spg program folder:
// use the ApiModuleHandle for all further ApiXXX.... calls if (retVal == API_OK)
printf("\r\n ApiOpened\r\n");
/* At this point the communication to the Hardware can start */ /* Now do some Setups */ PerformeSomeSystemCommands(); Setup1553BusControllerWithSomeTransfers(); Setup1553RemoteTerminals(); Setup1553BusMonitor(); /* Now start simulation */ printf(" Now Start BM, RT and BC \r\n"); ApiCmdBMStart( ApiModuleHandle, 0 ); ApiCmdRTStart( ApiModuleHandle, 0 ); ApiCmdBCStart( ApiModuleHandle, 0, API_BC_START_IMMEDIATELY, 0 /*cyclic*/, 10/*frame time*/,0, &ul_MajFrameAddr, aul_MinFrameAddr );
Open the board if it is remote.
Open the Application interface to
the target module and get the
handle for the module.
These are the four main
functions within this sample
program. These functions will
perform setup of the system,
BC, RTs, and BM.
Open the board if it is local.
Start BM, RT, BC.
The BC start function defines the minor frame time with 10 ms and
starts the simulation in cyclic mode.
Programmer's Guide for PCI 1553 Windows Applications 169
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
while( ! isKeyboardPressed() ) // ... allow some time here ... printf(" Wait a while \r\n\n"); ApiCmdBMStatusRead (ApiModuleHandle,0, &api_bm_status_dsp); printf(" BM Status: enabled:%d, in sync:%d, trigger:%d, MSG:%08lx ERR:%08lx\r\n",
printf("\r\n"); /* Now stop communication */ printf("\r\n Now Stop RT and BC, and show some Results \r\n"); ApiCmdBCHalt( ApiModuleHandle, 0 ); ApiCmdRTHalt( ApiModuleHandle, 0 ); ApiCmdBMHalt( ApiModuleHandle, 0 ); /* And read some Status Results */ ReadSomeStatusReports(); // Do Reset ApiCmdReset(ApiModuleHandle, 0, API_RESET_ALL, &api_res_info); // Close Device retVal = ApiClose(ApiModuleHandle); printf("ApiClose.\r\n"); if (retVal != API_OK) printf("ApiClosefailed !!\r\n"); else printf("\r\n ApiOpen failed !!\r\n"); if (stricmp(ServerName, "local") != 0 ) // Disconnect from server retVal = ApiDisconnectFromServer( ServerName); if (retVal != API_OK) printf("ApiDisconnectFromServer failed !!\r\n"); return;
Status can be read and
printed to console.
Then BC, RTs and BM
are halted.
Finally, the data
structures and variables
are re-initialized to a
default state, and the
module is closed thus
allowing no further
communication, except
ApiOpen.
Status is printed to the
console in this function.
170 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
/***************************************************************************** * function: PerformeSomeSystemCommands * * - Initalizes the board * - Resets the Communication to the board * - Reads all version information * - Set and read the IRIG time * - Set the coupling * * *****************************************************************************/ void PerformeSomeSystemCommands(void) TY_API_INI_INFO api_ini_info; TY_API_RESET_INFO api_res_info; TY_API_IRIG_TIME api_irig_time; AiUInt8 bite_status[2]; AiUInt16 fw_id, sw_id, lca_id; AiUInt32 lca_chks; AiUInt32 ul_FirmwareVer, ul_targetver, ul_targetBuild, ul_LcaVer1, ul_LcaVer2, ul_LcaCheckSum, ul_SysDrvVer, ul_SysDrvBuild, ul_DllVer, ul_DllBuild, ul_BoardSerialNr; AiUInt8 uc_BspCompatibility; printf("\r\n Now do ApiCmdIni\r\n"); ApiCmdIni(ApiModuleHandle, API_INIT_MODE_READ, &api_ini_info); printf(" ApiCmdIni Result: bt 1 %81x \r\n",(AiInt32)api_ini_info.bt[0]); printf(" bt 2 %81x \r\n",(AiInt32)api_ini_info.bt[1]); printf(" chns %81x \r\n",(AiInt32)api_ini_info.chns); printf(" prot %81x \r\n",(AiInt32)api_ini_info.prot); printf(" emod %81x \r\n",(AiInt32)api_ini_info.emod); printf(" irg %81x \r\n",(AiInt32)api_ini_info.irg); printf(" res1 %81x \r\n",(AiInt32)api_ini_info.res1); printf(" pbi_id_biu1 %81x \r\n",(AiInt32)api_ini_info.pbi_id_biu1); printf(" asp_mon_id %81x \r\n",(AiInt32)api_ini_info.asp_mon_id); printf(" asp_bite_id %81x \r\n",(AiInt32)api_ini_info.asp_bite_id); printf(" pbi_id_biu2 %81x \r\n",(AiInt32)api_ini_info.pbi_id_biu2); printf(" res2 %81x \r\n",(AiInt32)api_ini_info.res2); printf(" glb_mem_size %81x \r\n",(AiInt32)api_ini_info.glb_mem_size); printf(" glb_mem_addr %81x \r\n",(AiInt32)api_ini_info.glb_mem_addr); printf(" loc_dram_size %81x \r\n",(AiInt32)api_ini_info.loc_dram_size); printf(" loc_dram_addr %81x \r\n",(AiInt32)api_ini_info.loc_dram_addr); printf(" shared_dram_size %81x \r\n",(AiInt32)api_ini_info.shared_dram_size); printf(" shared_dram_addr %81x \r\n",(AiInt32)api_ini_info.shared_dram_addr); printf(" flash_ram_size %81x \r\n",(AiInt32)api_ini_info.flash_ram_size); printf(" flash_ram_addr %81x \r\n",(AiInt32)api_ini_info.flash_ram_addr); printf("\r\n Now do ApiCmdReset\r\n"); ApiCmdReset(ApiModuleHandle, 0, API_RESET_ALL, &api_res_info); printf(" ApiCmdReset Result: mbufs %81x \r\n", (AiInt32)api_res_info.mbufs); printf(" sbufs %81x \r\n", (AiInt32)api_res_info.sbufs); printf(" mon_addr %81x \r\n", (AiInt32)api_res_info.mon_addr); printf(" sim_addr %81x \r\n", (AiInt32)api_res_info.sim_addr); /* Now the board is ready for work */
Initialize the module to
receive module
properties. Those
properties are then
printed to console.
The data structures and variables
are initialized to a default state
Programmer's Guide for PCI 1553 Windows Applications 171
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
// Read all versions of the board ApiReadBSPVersion(ApiModuleHandle, &ul_FirmwareVer, &ul_targetver, &ul_targetBuild, &ul_LcaVer1, &ul_LcaVer2, &ul_LcaCheckSum, &ul_SysDrvVer, &ul_SysDrvBuild, &ul_DllVer, &ul_DllBuild, &ul_BoardSerialNr, &uc_BspCompatibility ); printf(" ApiReadBSPVersion Result: \r\n\n" ); printf(" | Fw Biu1 | Fw Biu2 | Target | LCA1 | LCA2 |\r\n"); printf(" +----------+----------+----------+----------+----------+\r\n"); printf(" | V%05lX | V%05lX | V%05lX | V%05lX | %05lX |\r\n", (ul_FirmwareVer & 0x0000ffff), ((ul_FirmwareVer >> 16) & 0x0000ffff), (ul_targetver & 0x0000ffff), (ul_LcaVer1 & 0x0000ffff), ul_LcaVer2); printf(" | | | B%05lX | | |\r\n\n", ul_targetBuild ); printf(" | SysDRV | DLL | SN |\r\n"); printf(" +----------+----------+----------+\r\n"); printf(" | V%05lX | V%05lX | %08ld |\r\n", (ul_SysDrvVer & 0x0000ffff), (ul_DllVer & 0x0000ffff), ul_BoardSerialNr); printf(" | B%05lX | B%05ld |\r\n\n", ul_SysDrvBuild, ul_DllBuild); /* Now perform Selftest */ printf("\r\n Now do ApiCmdBite (This will take some seconds...)\r\n"); ApiCmdBite(ApiModuleHandle, 0, API_BITE_ALL, bite_status); printf(" ApiCmdBite Result: major %21d \r\n", (AiInt32)bite_status[0]); printf(" minor %21d \r\n", (AiInt32)bite_status[1]); if (bite_status[0] != 0) printf(" >>> Selftest ERROR! <<<\r\n"); else printf(" >>> Selftest PASSED! <<<\r\n"); printf("\r\n Now do ApiCmdReset again Note: This is necessary after Selftest!\r\n"); printf("\r\n ---------------------------------------\r\n"); ApiCmdReset (ApiModuleHandle, 0, API_RESET_ALL, &api_res_info); /* Now we can go on */ printf("\r\n Now do ApiCmdDefRespTout\r\n"); ApiCmdDefRespTout (ApiModuleHandle, 0, 14/*BC+BM Timeout*/); printf("\r\n Now do ApiCmdReadSWVersion \r\n"); ApiCmdReadSWVersion(ApiModuleHandle, 0, &fw_id, &sw_id, &lca_id, &lca_chks); printf(" ApiCmdReadSWVersion Result: biu %8x\r\n",biu ); printf(" fw_id %8x\r\n",fw_id ); printf(" sw_id %8x\r\n",sw_id ); printf(" lca_id %8x\r\n",lca_id ); printf(" lca_chks %81x\r\n",(AiInt32)lca_chks);
This command retrieves the s/w
version for each s/w component.
The version information is then
printed.
Note: This cmd cannot be used
for modules with one biu.
Perform a self-test
of all components
on the module.
Note: ApiCmdReset is
now called
automatically after
ApiCmdBite - no need to
perform again in your
program.
Example of response
timeout being set to 14
µsec. (Default is 14
µsec)
Retrieves the version
of the firmware, driver
software and LCA
software.
172 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
printf(" Now do ApiCmdSetIrigTime \r\n"); // Set onboard IRIG time api_irig_time.day_hi = 0; api_irig_time.day_lo = 0; api_irig_time.hour = 0; api_irig_time.min = 0; api_irig_time.sec = 0; api_irig_time.sec = 0; api_irig_time.mode = API_IRIG_SET; ApiCmdSetIrigTime (ApiModuleHandle, &api_irig_time); // ... wait some seconds here .. AIM_WAIT(2000); printf(" Read the IrigTime \r\n"); ApiCmdGetIrigTime (ApiModuleHandle, &api_irig_time); printf(" IrigTime is Day:%d, Time %02d:%02d:%02d, ms:%04d\r\n",
A Buffer ID and RT Header ID for the transfer to RT1 SA1 is assigned. The
receive message buffer is cleared.
A Buffer ID and RT Header ID for the transfer from RT2 SA2 is assigned. The
transmit message buffer is initialized with 2222h.
A Buffer ID and RT Header ID for the transfer to RT31 SA1 is assigned. The
receive message is cleared. This RT is setup to be able to monitor the broadcast.
Programmer's Guide for PCI 1553 Windows Applications 177
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
/***************************************************************************** * function: Setup1553BusMonitor * * - Init Bus Monitor * - Setup in standard capture mode * *****************************************************************************/ void Setup1553BusMonitor(void) TY_API_BM_CAP_SETUP api_bm_cap; TY_API_BM_TCB api_bm_tcb; printf(" Now do Setup API1553 Bus Monitor \r\n"); // Bus Monitor Commands ApiCmdBMIni(ApiModuleHandle,0); ApiCmdBMIntrMode(ApiModuleHandle,0,API_BM_MODE_NO_INT,API_BM_NO_STROBE,0); api_bm_cap.cap_mode = API_BM_CAPMODE_ALL; api_bm_cap.cap_tat = 100; /* trace after trigger counter */ api_bm_cap.cap_mcc = 0; api_bm_cap.cap_fsize = 0; ApiCmdBMCapMode(ApiModuleHandle,0,&api_bm_cap); // Setup Trigger // init TCB 3 for Trigger on any error api_bm_tcb.tt = API_BM_TRG_ERR_CONDITION; // Trigger Type api_bm_tcb.sot = API_DIS; // External Trigger api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check api_bm_tcb.tres = 0x00; // Trigger Reset Bits api_bm_tcb.tset = 0x3F; /*only F is valid see FTW */ // Trigger Set Bits api_bm_tcb.tsp = 0x00; // Trigger spec api_bm_tcb.next = 0xFF; // next TCB api_bm_tcb.eom = 0xFF; // next TCB End of Message control api_bm_tcb.tdw = 0xFFFF; // Trigger data word api_bm_tcb.tmw = 0xFFFF; // Trigger mask word api_bm_tcb.tuli = 0x0000; // Trigger upper limit api_bm_tcb.tlli = 0x0000; // Trigger lower limit ApiCmdBMTCBIni(ApiModuleHandle, 0, 3 /*tid*/, API_ENA, &api_bm_tcb); // init TCB 7 for Sequence Trigger First Step // Trigger on a special command word api_bm_tcb.tt = API_BM_TRG_RECEIVED_WORD; // Trigger Type api_bm_tcb.sot = API_DIS; // External Trigger api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check api_bm_tcb.tres = 0x00; // Trigger Reset Bits api_bm_tcb.tset = 0x70; /* only 0 is valid see FTW */ // Trigger Set Bits api_bm_tcb.tsp = 0x31; /* Trigger on Command Word */ // Trigger spec api_bm_tcb.next = 0x09; /* next TCB in sequence */ // next TCB api_bm_tcb.eom = 0xFF; // next TCB End of Message control api_bm_tcb.tdw = 0x1445; /* Command word */ // Trigger data word api_bm_tcb.tmw = 0xFFFF; // Trigger mask word api_bm_tcb.tuli = 0xFFFF; // Trigger upper limit api_bm_tcb.tlli = 0x0000; // Trigger lower limit ApiCmdBMTCBIni(ApiModuleHandle, 0, 7 /*tid*/, API_ENA, &api_bm_tcb);
Initialize the BM. Disable the
BM interrupts and output strobes.
BM is setup to capture BM traffic
prior to and 100 entries after the
following triggers occur .
static trigger - Setup a trigger control block (TCB) to trigger on any
error condition (all bits in the trigger data word (tdw) are set). The
TCB still needs to be activated by the ApiCmdBMTIWIni function.
dynamic trigger (TCB3) - Setup a trigger control block (TCB7) to trigger on a sequence. First trigger -set TCB to
trigger if word is cmd word and = 1445h (which is RT2, T/R = T, SA = 2, Word count = 5). The TCB is setup to set the
Trigger Set Bits (70h) of the Monitor Status Trigger then process TCB 9 next. The ApiCmdBMTCBIni only sets up the
trigger control blocks - the function call to start the trigger and the trace after trigger counter, ApiCmdBMFTWIni,
and the function to tell BM to start looking at this TCB, ApiCmdBMTIWIni, has yet to be performed.
178 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
// init TCB 9 for Sequence Trigger First Step // Trigger on a special data word. If it does not occur in that Message go back to command word
Trigger api_bm_tcb.tt = API_BM_TRG_DATA_VALUE; // Trigger Type api_bm_tcb.sot = API_DIS; // External Trigger api_bm_tcb.tri = API_DIS; // Interrupt on Trigger api_bm_tcb.inv = API_DIS; // Inversion of Limit Check api_bm_tcb.tres = 0x00; // Trigger Reset Bits api_bm_tcb.tset = 0x9F; /* only F is valid see FTW */ // Trigger Set Bits api_bm_tcb.tsp = 0x04; /* Data Word position */ // Trigger spec api_bm_tcb.next = 0xFF; // next TCB api_bm_tcb.eom = 0x07; /* previous TCB in sequence */// next TCB End of Message control api_bm_tcb.tdw = 0x2222; // Trigger data word api_bm_tcb.tmw = 0xFFFF; // Trigger mask word api_bm_tcb.tuli = 0x222F; // Trigger upper limit api_bm_tcb.tlli = 0x2220; // Trigger lower limit ApiCmdBMTCBIni(ApiModuleHandle, 0, 9 /*tid*/, API_ENA, &api_bm_tcb); // Set the Function Trigger Word with Mask and compare Values ApiCmdBMFTWIni(ApiModuleHandle, 0, API_BM_WRITE_ALL, 0x00 /*htm*/, 0xFF /*htc*/,
0x0F /*stm*/, 0x0F /*stc*/); // Set the Trigger Index Word with the indexes of the TCBs ApiCmdBMTIWIni(ApiModuleHandle, 0, API_BM_WRITE_ALL, API_DIS /*eti*/, 3/*aei*/,
7/*ti0*/, API_DIS/*ti1*/);
dynamic trigger (TCB9) - Second trigger - trigger if word is a data word and = 2222h and is the fourth
word in the message. The TCB is setup to set the Trigger Set Bits (9Fh) of the Monitor Status Trigger then
process TCB7 next. The ApiCmdBMTCBIni only sets up the trigger control blocks - the function call to
start the trigger and the trace after trigger counter, ApiCmdBMFTWIni, and the function to tell BM to
start looking at this TCB, ApiCmdBMTIWIni, has yet to be performed.
Setup the Function Trigger Word (FTW) to tell the BM when to begin monitoring and incrementing the
trace after trigger counter. The start trigger mask (stm) is set to 0Fh, so only the right-most nibble of the
Monitor Status Trigger word needs to be set (set by TCB9) for the BM to start. Basically in this example,
both conditions as specified by TCB7 and TCB9 must be met before the start trigger condition is met and
the trace after trigger counter is incremented. The halt trigger mask (htm) is 00h indicating it will not be
used to stop the BM trigger condition.
Setup the Trigger Index Word (TIW) to indicate which Trigger Control Blocks the BM will monitor. You
can setup 2 static and two dynamic triggers at one time.
external trigger index(eti) and any error index (aei) are static triggers
trigger index 0 (ti0) and trigger index 1 (ti1) are dynamic triggers meaning they may contain a sequence of
triggers
In this example, the external trigger index (eti) is disabled (no triggers based on external stimuli), the any
error index (aei) is set to 3, therefore, TCB3 is the only static trigger being used in this example.
One dynamic trigger is enabled, TCB7, (tio=7) which is a sequence trigger as shown above that starts with
TCB7,, then goes to TCB9 after the conditions of TCB7 have been met.
Programmer's Guide for PCI 1553 Windows Applications 179
Section 5 - Program Samples LS_BC_RT_BM_Sample.c
/***************************************************************************** * function: ReadSomeStatusReports * * - Read BC Status and Transfer informations * - Read RT STatus * - Read BM Activity * * *****************************************************************************/ void ReadSomeStatusReports(void) TY_API_BM_RT_ACT api_rt_cnt; TY_API_BC_XFER_DSP api_bc_xfer_dsp; TY_API_BC_STATUS_DSP api_bc_status_dsp; TY_API_RT_STATUS_DSP api_rt_status_dsp; // BC Gobal Status printf("\r\n Now Read BC Status \r\n"); ApiCmdBCStatusRead(ApiModuleHandle,0,&api_bc_status_dsp); printf(" Results: status = %81x\r\n", (AiInt32)api_bc_status_dsp.status); printf(" hxfer = %81x\r\n", (AiInt32)api_bc_status_dsp.hxfer); printf(" glb_msg_cnt = %81x\r\n",
182 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_Interrupt_Sample.c
/***************************************************************************** * function: main * * - Initalizes the communication to the board * - shows the programming sequence * *****************************************************************************/ void __cdecl main(void) TY_API_RESET_INFO api_res_info; AiUInt16 boardCount, retVal; AiInt32 i; AiUInt32 maj_frame_addr, min_frame_addr[MAX_API_BC_MFRAME]; TY_API_OPEN x_ApiOpen; printf("\r\n >>>>> AIM Gmbh Programming Sample for the API1553 Board <<<<<\r\n"); printf("\r\n Interrupt_Sample.c 1553 Bus Simulator BC, RT \r\n"); // Basic Initialization boardCount = ApiInit(); if (boardCount != 0) printf("\r\n Bus Controller is running on Board %d, BIU %d\r\n" ,ApiModuleHandle , 0 ); printf("\r\n Remote Terminals are running on Board %d, BIU %d\r\n" ,ApiModuleHandle, 0 ); printf("\r\n"); printf("\r\n Now do ApiOpen\r\n"); // Open Device x_ApiOpen.ul_Module = API_MODULE_1; x_ApiOpen.ul_Stream = API_STREAM_1; sprintf(x_ApiOpen.ac_SrvName, "local"); retVal = ApiOpenEx(&x_ApiOpen, &ApiModuleHandle); // use the ApiModuleHandle for all further ApiXXX.... calls if (retVal != API_OK) printf("\r\n ApiOpen failed !!\r\n"); return; printf("\r\n ApiOpened\r\n"); /* At this point the communication to the Hardware can start */ /* Now do some Setups */ PerformeSomeSystemCommands(); /* Now init the interrupt system*/ printf("\r\n Now install the Interrupt Handler Funcitons \r\n"); ApiInstIntHandler( ApiModuleHandle, API_INT_LS, API_INT_BC, userInterruptFunctionBCBiu ); ApiInstIntHandler( ApiModuleHandle, API_INT_LS, API_INT_RT, userInterruptFunctionRTBiu ); /* Now setup the communication */ Setup1553BusControllerWithSomeTransfers(); Setup1553RemoteTerminals(); /* Now start communication */
Initialize the application interface to the
target and get the number of boards in
the system. Print information indicating
which BIU is selected for the BC and
RT.
Open the Application interface to
the target module and get the
handle for the module.
There are the three main setup functions within this sample
program.. The first one, PerformeSomeSystemCommands(); will
perform setup of the system.
There are two interrupt handlers within this sample, one for the BC
and one for the RT will handle the interrupts. The pointers to the
interrupt handler are setup with the ApiInstIntHandler function
The other two main functions
will perform setup of the
BC,and RTs.
After the systems are setup, the RTs and
BC can be started.
Programmer's Guide for PCI 1553 Windows Applications 183
Section 5 - Program Samples LS_Interrupt_Sample.c
printf(" Now Start RT and BC \r\n"); ApiCmdRTStart(ApiModuleHandle,0); ApiCmdBCStart(ApiModuleHandle,0, API_BC_START_IMMEDIATELY,0 /*0=cyclic*/,10 /*ftime in ms*/ ,0 ,&maj_frame_addr,min_frame_addr); // ... allow some time here ... printf(" Wait a while \r\n"); for (i=0; i< 10; i++) AIM_WAIT(1000); printf(" Interrupt Counter BC-BIU %6d RT-BIU %6d", (AiInt32)interruptCountBc,
(AiInt32)interruptCountRt );
printf(" IrigTime is Day:%d, Time %02d:%02d:%02d, ms:%04d\r",(((AiUInt16)api_irig_time.day_hi << 8) + api_irig_time.day_lo), api_irig_time.hour,api_irig_time.min, api_irig_time.sec, (((AiUInt16)api_irig_time.ms_hi << 8) + api_irig_time.ms_lo));
if (errFlag == TRUE) printf("\n\r ERROR occurred ! \n\r"); break; AIM_WAIT(3000); /* Now stop communication */ printf("\r\n Now Stop RT and BC, and show some Results \r\n"); ApiCmdBCHalt(ApiModuleHandle,0); ApiCmdRTHalt(ApiModuleHandle,0); /* And read some Status Results */ ReadSomeStatusReports(); // Do Reset ApiCmdReset(ApiModuleHandle, 0, API_RESET_ALL, &api_res_info); printf("\r\n Now uninstall the Interrupt Handler Functions \r\n"); ApiDelIntHandler( ApiModuleHandle, API_INT_LS, API_INT_BC ); ApiDelIntHandler( ApiModuleHandle, API_INT_LS, API_INT_RT ); // Close Device retVal = ApiClose(ApiModuleHandle); printf("ApiClose\r\n"); if (retVal != API_OK) printf("ApiClose failed !!\r\n"); return; /* end: main */
Print the interrupt counter and the time
to show interrupts are working.
Then BC, RTs and BM
are halted.
Status is printed to the
console in this function.
Finally, the data
structures and variables
are re-initialized to a
default state. TheBC and RT interrupt
handlers must be
uninstalled (pointers
removed) prior to
module close. The module is closed
thus allowing no further
communication, except
ApiOpen.
184 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_Interrupt_Sample.c
/***************************************************************************** * function: PerformeSomeSystemCommands * * - Initalizes the board * - Resets the Commnunication to the board * - Reads all version informations * - Set the coupling * * *****************************************************************************/ void PerformeSomeSystemCommands(void) TY_API_INI_INFO api_ini_info; TY_API_RESET_INFO api_res_info; ApiCmdIni(ApiModuleHandle, API_INIT_MODE_READ, &api_ini_info); ApiCmdReset(ApiModuleHandle, 0, API_RESET_ALL, &api_res_info); // Set Coupling mode for BC BIU to onboard MILbus Network simulation printf(" ApiCmdCalCplCon set to onboard MILbus Network simulation for BIU %d \r\n", 0); ApiCmdCalCplCon(ApiModuleHandle,0,API_CAL_BUS_PRIMARY, API_CAL_CPL_EXTERNAL); ApiCmdCalCplCon(ApiModuleHandle,0,API_CAL_BUS_SECONDARY,API API_CAL_CPL_EXTERNAL);
Initialize the modul to
receive module
properties.
The data structures and variables
are initialized to a default state.
The coupling mode for the
primary and secondary
buses are set to "externally
coupled".
Programmer's Guide for PCI 1553 Windows Applications 185
Section 5 - Program Samples LS_Interrupt_Sample.c
/***************************************************************************** * function: Setup1553BusControllerWithSomeTransfers * * - Init Bus Controler * - Setup tree different transfers with data buffer and buffer header * - Setup minor frame * - Setup major frame * * *****************************************************************************/ void Setup1553BusControllerWithSomeTransfers(void) TY_API_BC_BH_INFO api_bc_bh_desc; TY_API_BC_XFER api_bc_xfer; TY_API_BC_FRAME api_bc_frame; TY_API_BC_MFRAME api_bc_mframe; AiUInt16 out_dataw[32], rid, xfer_id, buf_id, bc_hid; AiUInt32 addr; AiInt32 i; printf(" Now do Setup API1553 Bus Controller \r\n"); // Bus Controller Commands ApiCmdBCIni(ApiModuleHandle,0,0,0,0,0); // BC Broadcast Transfer XF1: C31_R_01_02 (RT31,RCV,SA01,WC2) xfer_id = 1; buf_id = 1; bc_hid = 1; api_bc_xfer.xid = xfer_id; /* Transfer ID */ api_bc_xfer.hid = bc_hid; /* BID Buffer Header ID */ api_bc_xfer.type = API_BC_TYPE_BCRT; /* Transfer Type */ api_bc_xfer.chn = API_BC_XFER_BUS_PRIMARY; /* MILbus */ api_bc_xfer.xmt_rt = 0; /* XMT-RT */ api_bc_xfer.rcv_rt = 31; /* RCV-RT */ api_bc_xfer.xmt_sa = 0; /* XMT-SA */ api_bc_xfer.rcv_sa = 1; /* RCV-SA */ api_bc_xfer.wcnt = 2; /* Word Count field */ api_bc_xfer.tic = API_BC_TIC_INT_ON_XFER_END; /* Interrupt control */ // api_bc_xfer.tic = API_BC_TIC_NO_INT; /* Interrupt control */ api_bc_xfer.hlt = API_BC_HLT_NO_HALT; /* Halt control */ api_bc_xfer.rsp = API_BC_RSP_AUTOMATIC; /* Response control */ api_bc_xfer.sxh = API_BC_SRVW_DIS; /* Service Request Handling */ api_bc_xfer.rte = 0; /* Reserved */ api_bc_xfer.res = 0; /* Reserved */ api_bc_xfer.swxm = 0; /* Status Word Exception Mask */ api_bc_xfer.gap_mode = API_BC_GAP_MODE_DELAY; /* Gap Mode */ api_bc_xfer.gap = 0; /* use default gap */ api_bc_xfer.err.type = API_ERR_TYPE_NO_INJECTION; /* error injection type */ api_bc_xfer.err.sync = 0; api_bc_xfer.err.contig = 0; api_bc_xfer.err.err_spec = 0; api_bc_xfer.err.err_spec |= (0 << 16); /* wpos */ api_bc_xfer.err.err_spec |= (0 << 8); /* bpos */ api_bc_xfer.err.err_spec |= (0 << 0); /* bc_bits */ ApiCmdBCXferDef(ApiModuleHandle,0, &api_bc_xfer, &addr); ApiCmdBCBHDef(ApiModuleHandle,0,bc_hid,buf_id,0,0,API_QUEUE_SIZE_1,0,0,0,0,0,&api_bc_bh_desc); for(i=0;i<32;i++) out_dataw[i] = 0x3131; ApiCmdBufDef(ApiModuleHandle,0,API_BUF_BC_MSG,0,buf_id,32, out_dataw,
&rid,&bufferAddress[buf_id]);
Initializes the BC defining #
of retries and bus to be used
(primary or seconday). (0
indicates default which is no
retry and primary enabled)
First assign a transfer ID, Buffer ID
and a BC Header ID. Then the
structure containing the information
about the BC transfer is defined.
This information is the input to the
ApiCmdBCXferDef function below.
BC-to-RT xfer
RT31 SA1
word count = 2
Sets interrupt to
occur on end of
transfer.
Associate the BC Buffer Header
with the message buffer and set
message buffer queue size to 1.
The message buffer is then
initialized with data 3131h.
186 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_Interrupt_Sample.c
// BC-RT Transfer XF2: C01_R_01_04 (RT01,RCV,SA01,WC4) xfer_id = 2; buf_id = 2; bc_hid = 2; api_bc_xfer.xid = xfer_id; /* Transfer ID */ api_bc_xfer.hid = bc_hid; /* BID Buffer Header ID */ api_bc_xfer.type = API_BC_TYPE_BCRT; /* Transfer Type */ api_bc_xfer.chn = API_BC_XFER_BUS_SECONDARY; /* MILbus */ api_bc_xfer.xmt_rt = 0; /* XMT-RT */ api_bc_xfer.rcv_rt = 1; /* RCV-RT */ api_bc_xfer.xmt_sa = 0; /* XMT-SA */ api_bc_xfer.rcv_sa = 1; /* RCV-SA */ api_bc_xfer.wcnt = 4; /* Word Count field */ api_bc_xfer.tic = API_BC_TIC_INT_ON_XFER_END; /* Interrupt control */ // api_bc_xfer.tic = API_BC_TIC_NO_INT; /* Interrupt control */ api_bc_xfer.hlt = API_BC_HLT_NO_HALT; /* Halt control */ api_bc_xfer.rsp = API_BC_RSP_AUTOMATIC; /* Response control */ api_bc_xfer.sxh = API_BC_SRVW_DIS; /* Service Request Handling */ api_bc_xfer.rte = 0; /* Reserved */ api_bc_xfer.res = 0; /* Reserved */ api_bc_xfer.swxm = 0; /* Status Word Exception Mask */ api_bc_xfer.gap_mode = API_BC_GAP_MODE_DELAY; /* Gap Mode */ api_bc_xfer.gap = 0; /* use default gap */ api_bc_xfer.err.type = API_ERR_TYPE_NO_INJECTION; /* error injection type */ api_bc_xfer.err.sync = 0; api_bc_xfer.err.contig = 0; api_bc_xfer.err.err_spec = 0; api_bc_xfer.err.err_spec |= (0 << 16); /* wpos */ api_bc_xfer.err.err_spec |= (0 << 8); /* bpos */ api_bc_xfer.err.err_spec |= (0 << 0); /* bc_bits */ ApiCmdBCXferDef(ApiModuleHandle,0, &api_bc_xfer, &addr); ApiCmdBCBHDef(ApiModuleHandle,0,bc_hid,buf_id,0,0,API_QUEUE_SIZE_1,0,0,0,0,0,
190 Programmer's Guide for PCI 1553 Windows Applications
Section 5 - Program Samples LS_Interrupt_Sample.c
/******************************************************************************* * Function : userInterruptFunctionBCBiu Author : Rolf Heitzmann *------------------------------------------------------------------------------ * Create : 18.01.00 last Update : 28.12.00 Status: [i][t][ ] *------------------------------------------------------------------------------ * Descriptions * ------------ * User Interrupt Function to do some Buffer modifications from interrupt. * This Function is used for BC-BIU Interrupt * * Inputs : ul_Module - board which has produced the interrupt * uc_LsHs - On 1553 always Api_INT_LS * uc_Type - interrupt Type (BC/RT/BM...) * x_Info - Information in structure TY_API_INTR_LOGLIST_ENTRY * * Outputs : - * * Return : - * ******************************************************************************/ void userInterruptFunctionBCBiu(AiUInt32 ul_Module, AiUInt8 uc_LsHs, AiUInt8 uc_Type,
TY_API_INTR_LOGLIST_ENTRY x_Info ) AiUInt32 buffAddr; AiUInt32 tempVar; AiUInt16 out_dataw[32]; AiUInt16 i; AiUInt32 bytesWritten; /* ATTENTION! printf outputs in a Interrupt routine may result in problems on high interrupt load. So this is only for Test */ /* printf("\n\n User Interrupt occured!"); printf("\n Board %d, BIU %d, Type %d !", uc_Module, uc_Biu, uc_Type); printf("\n LoLi: lla = %08x, llb = %08x, llc = %08x, lld = %08x\n\n", x_Info.ul_Lla, x_Info.ul_Llb, x_Info.ul_Llc, x_Info.ul_Lld); */ interruptCountBC++; if (x_Info.ul_Lld == 1) buffAddr = bufferAddress[x_Info.ul_Lld]; ApiReadMemData(ul_Module, API_MEMTYPE_GLOBAL, buffAddr, sizeof(AiUInt32),
put back into the code, they would print everytime
the BC XFR1 and XF2 were completed and
everytime an error occurred with XFR3.
The global interrupt counter is incremented.
If BC XFR 1, then read the first 2 data words in
the buffer into tempVar, then increment tempVar.
The incremented data word will be put back
into the buffer to show that the end-of-XFR
caused an interrupt.
If BC XFR3, then the interrupt was due to error -
so write the word FFAAh back into the buffer to
show that this buffer created a Xfer error interrupt.
If the error bit was set, then indicate any xfr error
occurred by setting the global error flag to true.
This interrupt handler is needed to process the BC interupts setup in structure element
api_bc_ xfer.tic which is used in the ApiCmdBCXfrDef function.
Programmer's Guide for PCI 1553 Windows Applications 191
Section 5 - Program Samples LS_Interrupt_Sample.c
/******************************************************************************* * Function : userInterruptFunctionRTBiu Author : Rolf Heitzmann *------------------------------------------------------------------------------ * Create : 18.01.00 last Update : 28.12.00 Status: [i][t][ ] *------------------------------------------------------------------------------ * Descriptions * ------------ * User Interrupt Function to do some Buffer modifications from interrupt. * This Function is used for RT-BIU Interrupt * * Inputs : uc_Module - board which has produced the interrupt * uc_LsHs - On 1553 always Api_INT_LS * uc_Type - interrupt Type (BC/RT/BM...) * x_Info - Information in structure TY_API_INTR_LOGLIST_ENTRY * * Outputs : - * * Return : - * ******************************************************************************/ void userInterruptFunctionRTBiu(AiUInt32 ul_Module, AiUInt8 uc_LsHs, AiUInt8 uc_Type,
AiUInt16 out_dataw[32]; AiUInt16 i; AiUInt32 bytesWritten; /* ATTENTION! printf outputs in a Interrupt routine may result in problems on high interrupt load. So this is only for Test */ /* printf("\n\n User Interrupt occured!"); printf("\n Board %d, BIU %d, Type %d !", uc_Module, uc_Biu, uc_Type); printf("\n LoLi: lla = %08x, llb = %08x, llc = %08x, lld = %08x\n\n", x_Info.ul_Lla,