A MAPS-based readout of an A MAPS-based readout of an electromagnetic calorimeter electromagnetic calorimeter for the ILC for the ILC Nigel Watson (Birmingham Univ.) •Motivation •Physics simulations •Sensor simulations •Testing •Summary For the CALICE MAPS group J.P.Crooks, M.M.Stanitzki, K.D.Stefanov, R.Turchetta, M.Tyndel, E.G.Villani (STFC-RAL) Y.Mikami, O.D.Miller, V.Rajovic, NKW, J.A.Wilson (Birmingham)
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A MAPS-based readout of an electromagnetic calorimeter for the ILC Nigel Watson (Birmingham Univ.) Motivation Physics simulations Sensor simulations Testing.
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A MAPS-based readout of an A MAPS-based readout of an electromagnetic calorimeter electromagnetic calorimeter
for the ILCfor the ILC
A MAPS-based readout of an A MAPS-based readout of an electromagnetic calorimeter electromagnetic calorimeter
Essential to reconstruct jet-jet invariant masses in hadronic
final states, e.g. separation of W+W, Z0Z0, tth, Zhh, H
ILC: high performance ILC: high performance
calorimetrycalorimetry
ILC: high performance ILC: high performance
calorimetrycalorimetry
LEP/SLD: optimal jet reconstruction by energy flow Explicit association of tracks/clusters Replace poor calorimeter measurements with tracker
measurements – no “double counting”
Little benefit from beam energy constraint, cf. LEP
EPS'07, 19-Jul-2007Nigel Watson / Birmingham
Shower containment in ECAL, X0 large
Small Rmoliere and X0 – compact and narrow showers
int/X0 large, EM showers early, hadronic showers late
ECAL, HCAL inside coil
Lateral separation of neutral/charged particles/’particle flow’
Strong B field to suppresses large beam-related background in detector
Compact ECAL (cost of coil)
Tungsten passive absorber
Silicon pixel readout, minimal interlayer gaps, stability “Swap-in” alternative to Si diode detector designs, e.g. in LDC, SiD CMOS process, more mainstream:
Industry standard, multiple vendors (schedule, cost) (At least) as performant – ongoing studies Simpler assembly Power consumption larger – but better thermal properties
The sensor test setupThe sensor test setupThe sensor test setupThe sensor test setup5 dead pixelsfor logic :-hits buffering (SRAM)- time stamp = BX(13 bits)- only part with clock lines.
84
pix
els
42 pixels
Data format 3 + 6 + 13 + 9 = 31 bits per hit
7 * 6 bits patternper row
Row index
1*1 cm² in total2 capacitor arrangements
2 architectures6 million transistors, 28224 pixels
EPS'07, 19-Jul-2007Nigel Watson / Birmingham
•Neighbouring hit:•hit ? Neighbour’s contribution•no hit ? Creation of hit from charge spread only
•All contributions added per pixel
•+ noise σ = 100 eV
Impact of digitisationImpact of digitisationImpact of digitisationImpact of digitisation
E initial : geant4 deposit
•What remains in the cell after charge spread assuming perfect P-well
•+ noise σ = 100 eV, minus dead areas : 5 pixels every 42 pixels in one direction
EPS'07, 19-Jul-2007Nigel Watson / Birmingham
Physics data rate low – noise dominates
Optimised diode for Signal over noise ratio Worst case scenario