A Family of PWM Control Strategies for Single-Phase Quasi-Switched-Boost Inverter · 2018-06-21 · simultaneously, Z-source/quasi-Z-source inverters (ZS/qZSIs) have been proposed

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2831674, IEEETransactions on Power Electronics

IEEE TRANSACTIONS ON POWER ELECTRONICS

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Abstract— This paper proposed a novel family of PWM

strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through mode in the inverter’s switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low shoot-through duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3.

Index Terms— Quasi-Z-source inverter, PWM strategy, voltage gain, quasi-switched-boost inverter.

I. INTRODUCTION

n the design process of power inverter for renewable energy systems applications, the reliability, efficiency, and volume

are major factors. The two-stage voltage source inverter (VSI) with a boost converter [1] is the conventional solution for renewable energy systems. To solve a shoot-through (ST) problem of VSIs where both upper and lower switches in the same branch of H-bridge circuit cannot switch on simultaneously, Z-source/quasi-Z-source inverters (ZS/qZSIs) have been proposed in [2]-[7]. Because ZS/qZSIs present a high reliability with ST immunity and buck-boost voltage ability, they are suitable for applications of the renewable energy sources. However, voltage gain in ZS/qZSIs is not high. It depends on the modulation index of H-bridge circuit. To get a desired boost voltage demand, a large ST duty cycle is utilized. As a result, the modulation index is small. When a low

Manuscript received Nov 13, 2017; accepted Apr 23, 2018. Recommended

for publication by Associate Editor xxx. M.-K. Nguyen is with the Department of Electrical Engineering, Chosun

University, Gwangju, 61452, Korea (e-mail: [email protected]). T.-T. Tran and Y.-C. Lim are with the Department of Electrical Engineering,

Chonnam National University, Gwangju 500-757, Korea (e-mail: [email protected] and [email protected]).

modulation index is used in ZS/qZSIs, total harmonic distortion (THD) value and voltage gain at the output are increased and decreased, respectively. The boost factor in the conventional qZSI is given as:

1 / 1/ 1 2 , PN gB V V D (1)

where D and VPN are ST duty cycle and DC-bus voltage across the H-bridge, respectively.

For applications where the high voltage gain is required, the capacitor, inductor, transformer, and diode have been inserted into the power circuit of qZSIs, resulting in led switched-inductor qZSI [4], enhanced-boost ZSI [5], trans-ZSI [6], asymmetrical Γ-source inverter [7], and improved trans-ZSI [8]. Nevertheless, topologies of these qZSIs increase the cost, volume, and weight of the power circuit because a large number of passive elements are used [4]-[8]. To decrease the cost, weight, and volume of the power circuit, a family of quasi-switched-boost inverters (qSBIs) have been introduced [9]–[14]. These qSBIs uses one less LC pair with the same characteristics as qZSI. However, qSBI has the following merits over qZSI [11]: lower passive elements, smaller current stress on semiconductor devices, lower power loss, and higher efficiency. Fig. 1 presents a single-phase qSBI [9] using five switches (S0–S4), two diodes (Dx and Dy), one capacitor (C), one inductor (L), and an inductive load (R and Ll). The boost factor in qSBI is the same as that in qZSI as expressed in (1). Similar to qZSI, passive elements are also added to qSBI to increase the boost factor. For instance, switched-inductor qSBI with increasing cost and volume has been proposed in [13]. Transformer-based qSBI with a spike on DC-bus voltage due to leakage inductance in the transformer has also been introduced in [14] and [15].

Recently, different pulse width modulation (PWM) techniques [16]–[27] have applied to the qZS/qSBIs to improve the inverter’s performance. Maximum boost (MB) control [16] and maximum constant boost (MCB) control [17] strategies have been used to optimize the voltage gain of the three-phase

A Family of PWM Control Strategies for Single-Phase Quasi-Switched-Boost Inverter

Minh-Khai Nguyen, Member, IEEE, Tan-Tai Tran, and Young-Cheol Lim, Member, IEEE

I

DxVg

C vC

Dy

S0

LiL

ioLl

R

S3

S4

S1

S2

P

N

a

b

Fig. 1. Single-phase single-stage qSBI.




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ZS/qZSI. A third-harmonic injection PWM strategy [17] has been applied to the three-phase ZS/qZSI to extend the operation range of the modulation index. Nevertheless, capacitor voltage and inductor current ripples are very high when MB and MCB control strategies are used. A PWM strategy for the three-phase ZSIs with minimum inductor current ripple has been discussed [19]. It can rearrange ST time intervals according to active state and zero state time intervals. To maximize boost capability, an improved PWM method for the three-phase ZSI has been presented in [20] with generating six-time-line-frequency ripple at the DC side. The space vector modulation (SVM) techniques for the three-phase qZSI have been also introduced in [21] based on inserting the ST state number of two, four, or six into the conventional SVM. To enhance the performance of the three-phase ZSIs, a simple-boost modified SVM method was proposed in [22] with a single switch commutation at a time. The SVM was extended to the single-phase ZSI as presented in [23]. To decrease power loss without increasing voltage gain, a hybrid PWM strategy for single-phase qZS grid-tie photovoltaic system has been presented [24]. To reduce the switching losses of the qZSI, a dual switching frequency modulation has been introduced in [25] with unchanged voltage gain. In [26], a maximum control boost method was used to improve qSBI by modifying the ST control signal. In addition, [27] introduced a PWM strategy to get better modulation index of the qSBI.

In practice, the qZSI has a high performance than the traditional two-stage inverter with the boost converter when the voltage gain in the range of (1 – 1.5) [28]. In the case of higher voltage gain, the qSBI is a better solution than the qZSI as presented in [11]. Because the qSBI has the same operating principle as the qZSI, all PWM strategies [16]-[27] for qZSI can be used for qSBI. For instance, a simple boost control method is usually applied to qSBI topologies [9]–[12] to control five switches where a constant ST control signal is used. Nevertheless, the ST state in conventional PWM control methods [9]–[12] was generated by turning on all five switches at the same time. As a result, the operating frequency of the input inductor in the qSBI is the same as that of switch S0. Moreover, the voltage gain of the qSBI under the conventional PWM strategies is unchanged when compared to that of qZSI. In fact, the voltage gain of qSBI can be improved by controlling the additional switch S0 that is not used in qZSI.

In this paper, a family of PWM strategies is introduced to reduce the high-frequency (HF) inductor current ripple of the single-phase qSBI without adding any passive components while improving voltage gain. In comparison with the conventional PWM strategy for qSBI, the introduced PWM strategy uses a greater modulation index to generate the same voltage gain. Therefore, voltage stress on semiconductors and capacitor and THD value of the load current under the proposed PWM methods are decreased significantly. Section II reviews the conventional PWM control strategy for single-phase qZSI and qSBI. The proposed PWM control strategies are presented in Sections III. Section IV presents a comprehensive comparison between the introduced PWM strategy and the traditional PWM strategy for single-phase qSBI. In Section V, simulation and experimental verifications are presented to verify the analysis.

S4

0

vtri1vref

-VSH

S1

S2

S3

1Vm

-vref

VSH

Shoot-through signal (SH)DT/2(a)

T

(b)

0

1VSH

∆iL

T

vtri1

SH

S0

vtri2

DT/2

iL

TL=T/2

Fig. 2. Conventional PWM1 control method for single-phase qZSI and qSBI. (a) H-bridge signal generation, (b) S0 signal generation.

II. CONVENTIONAL PWM CONTROL METHOD FOR QZSI/QSBI Fig. 2 illustrates the conventional PWM strategy for

single-phase qZSI and qSBI [9]. As indicated in Fig. 2(a), two reference signals, vref and -vref, are used to compare to a HF carrier waveform, vtri1, to create control signals for H-bridge switches (S1 – S4). To produce a ST control signal, a fixed signal (VSH) is used to compare to another carrier waveform (vtri2) with a double frequency of vtri1 as shown in Fig. 2(b). This constant ST control signal is used to control both S0 and H-bridge switches. As a result, the number of ST states per a half of the switching period (T/2) of vtri1 is one, where T is the switching period of vtri1. The number of storage/delivery time of the inductor current during T/2 is also one. Therefore, the conventional control method is also called PWM1 method.

Because the modulation index (M) cannot be over (1 – D), M is low when a large D is used to achieve a great boost voltage. Using a low M will enhance the THD value and decrease the overall inverter voltage gain. The boost factor in the PWM1 control strategy used for qZSI/qSBI is given in (1). In the conventional PWM1 method for qZSI/qSBI, the HF inductor current ripple is fixed. It depends on the switching frequency. To limit the inductor current ripple to reduce the cost and volume of the inductor in the qZS/qSB network, the switching frequency of the H-bridge inverter should be increased. Using a high switching frequency will increase the switching loss in the H-bridge switches of qZSI/qSBI. Note that a low-frequency (LF) inductor current ripple of the impedance source network can be eliminated by using an active filter method as described




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previously [29]. Unlike qZSI, qSBI uses one more switch to reduce passive

elements in the impedance-source network. In the conventional PWM1 control method for qSBI, the switch S0 is simultaneously turned on with H-bridge switches in the ST state as shown in Fig. 2. Because all switches are switched on simultaneously, the conduction loss in the ST state is high. In qSBI, H-bridge switches are used to produce sinusoidal voltage at the output while switch S0 is used to boost the voltage at the DC-bus. Therefore, switch S0 and H-bridge switches in qSBI can be controlled individually. In addition, operating frequency of the inductor can be increased by controlling switch S0.

III. PROPOSED PWM CONTROL METHODS FOR QSBI

A. Proposed PWM2 Method

Fig. 3 shows the proposed PWM2 control strategy for single-phase qSBI. A fixed signal, VSH, is used to compare to vtri2 with a twofold frequency of vtri1 to produce ST control signal (SH) for H-bridge switches. Another fixed signal with a value of (1 – VSH) is used to compare to vtri2 to produce the control signal for switch S0. In comparison with the conventional PWM1 method, switch S0 control signal in the proposed PWM2 method is shifted to the time interval of T/4 while control signals of H-bridge switches are unchanged as shown in Fig. 2(a). As a result, the number of storage/delivery time of the inductor current during T/2 is two. Therefore, the HF inductor current ripple in the introduced PWM2 strategy is half of that of the PWM1 strategy. In addition, the period of the input inductor current, TL, is one fourth of the switching period, T, as shown in Fig. 3.

Fig. 4 illustrates operating states of the single-phase qSBI under the introduced PWM2 strategy. In comparison with the conventional PWM1 control strategy, the qSBI with the introduced PWM2 strategy has an additional state as indicated in Fig. 4(a). In the non-shoot-through (NST) state 1 [t0 – t1 and t4 – t5; see Fig. 3], the switch S0 is turned on and operating states of the H-bridge circuit are active and zero as shown in Fig. 4(a). The diode Dx is conducting while Dy is blocking. The capacitor C is discharged while the inductor L stores energy from the input voltage source. Time interval in the NST state 1 is 2D0·TL, where 2D0 is the duty cycle of switch S0. The following is obtained:

and .CLg PN

dvdiL V C I

dt dt= = - (2)

In NST state 2 [t1 – t2 and t3 – t4; see Fig. 3], the switch S0 is turned off while both diodes Dx and Dy are conducting as shown in Fig. 4(b). The capacitor C is charged from Vg while the inductor L delivers energy to the load. The inverter bridge circuit is tantamount to a current source, iPN. In NST state 2, the time interval is (1 – D0 – D)·T/2, where D represents the ST duty cycle in the H-bridge circuit. The following is obtained:

and .CLg C L PN

dvdiL V V C I I

dt dt= - = - (3)

During the ST state [t2 – t3; see Fig. 3], all switches in the H-bridge circuit are switched on while S0 is switched off as shown in Fig. 4(c). The diode Dx is blocking while Dy is

conducting. The capacitor C is disconnected to the circuit. In this state, the inductor L stores energy and the time interval is D·T/2. The following is obtained:

and 0.CLg

dvdiL V C

dt dt= = (4)

Using principles of capacitor amp-second balance and inductor volt-second balance, from (2) to (4), the following is obtained:

0 0

1and .

1 1g

PN C L PN

V DV V I I

D D D D

-= = =

- - - - (5)

The boost factor of the qSBI with the proposed PWM2 strategy can be expressed as (6):

2 0/ 1/ 1 . PN gB V V D D (6)

Comparing (6) to (1), the proposed PWM2 method has the same boost factor as the PWM1 method when D0 = D.

B. Proposed PWM3 Method

Fig. 5(a) shows the proposed PWM3 control strategy for single-phase qSBI. Similar to PWM1 and PWM2 methods, two fixed signals, VSH and -VSH, are used to compare to vtri1 to generate the ST control signal for H-bridge switches. To produce control signal for switch S0, two fixed voltages, VSH and (4/3 – VSH), are compared to vtri2. Note that the frequency of vtri2 is three times of vtri1 and the peak-to-peak value of vtri2 is 2/3. The compared signal from vtri2 and the ST control signal (SH) are then integrated through XOR logic gate to control switch S0. The number of storage/delivery time of the inductor current during T/2 with the proposed PWM3 method is three. Therefore, the HF inductor current ripple in the proposed PWM3 method is decreased three times compared to that of the

0

1VSH

∆iL

T

SH

S0

vtri2

1–VSH

vtri1

t1 t2 t3 t4 t5t0

iL

Vg

Vg–VCvL

0

0

TL=T/4

2D0TL DT/2

Fig. 3. Proposed PWM2 method for single-phase qSBI.

(a)

Dy

C

DX

L

vPNiC

vL1

(b) (c)

Dy

C

Dx

L

Dy

Vg

C vC

Dx

L

vPN

iPN

iL

iC

vL

iL

iC

vL iPN

S0S0

vPN

iL

vC

VgVg

vCS0

Fig. 4. Operating states of qSBI with introduced PWM strategies. (a) NST state1, (b) NST state 2, and (c) ST state.




4

PWM1 method. Similar to the proposed PWM2 control strategy, the qSBI under the proposed PWM3 control strategy also has three operating states as indicated in Fig. 4. In the half-switching period (T/2), the total time interval in NST state 1 is 2D0·T/2. The time interval in the NST state 2 is (1 – 2D0 – D)·T/2 while that in the ST state is D·T/2. Using the inductor volt-second balance theory in steady state, the boost factor is obtained as:

3 01/ 1 2 . B D D (7)

Comparing (7) to (1) and (6), the boost factor of the qSBI with the introduced PWM3 strategy is improved.

C. Extending to PWMn Control Method for qSBI

By changing the peak-to-peak value and frequency of vtri2, various PWM control methods can be obtained. From Figs. 2, 3 and 5, the triangle waveform, vtri1 is

1

4 / 1, 0 0.5( )

4 / 3, 0.5 .tri

t T t Tv t

t T T t T

ì - £ <ïï= íï- + £ <ïî (8)

In the proposed PWMn (n = 2, 3, 4, …) method, the PWM generation depends on vtri2. The peak-to-peak value of vtri2 is 2/n, and the frequency of vtri2 is n-times that of vtri1. The function of vtri2 is expressed as below:

2

41, 0

2, when : even

4 4,

2( )

4 2, 0

2, when : odd

4 2,

2

n

n

nn

n

tri

n

n

nn

n

Tt t

nTn

Tnt t T

nT nv t

Tnt t

nT nn

Tnt t T

nT n

éì -ïïê + £ <ïêïïïêíêï -êï + £ <ïêïïêïî= êìê -ïïê + £ <ïêïïïêíêï- +ïê + £ <ïêïïêïîë

(9)

where Tn is the time period of vtri2 in the PWMn method. In the half-switching period (T/2), the number of turning

on/off time of the switch S0 is (n – 1) while that of ST states in the H-bridge switches is always one. Therefore, the HF ripple of the inductor current in the proposed PWMn method is reduced n-times to that in the conventional method. Moreover, the operating frequency of the input inductor is 2n-times the operating frequency of H-bridge switches. The sum of time interval in NST state 1 is (n – 1)·D0·T/2. In NST state 2, the time interval is [1 – (n – 1)D0 – D]·T/2. In ST state, the time interval is D·T/2. Using the inductor volt-second balance theory, the

boost factor of the proposed PWMn method is:

0/ 1/ (1 1 ),n PN gB V V n D D (10)

where n = 2, 3, 4,… As an example, the proposed PWM5 control method is used

to prove the effectiveness of the introduced PWM strategies for qSBI in this paper. Fig. 5(b) shows the proposed PWM5 control strategy for single-phase qSBI. It can be seen from Fig. 5(b) that the peak-to-peak inductor current is remarkably decreased in comparison with that of the PWM1 strategy.

Similar to the proposed PWM2 and PWM3 control strategies, the qSBI with the proposed PWM5 strategy also has three operating states as presented in Fig. 4. The sum of time interval in NST state 1 is 4D0·T/2. The time interval in NST state 2 is (1 – 4D0 – D)·T/2. The time interval in ST state is D·T/2. Applying balance principles to the capacitor and inductor in steady state, the following is obtained:

0 0

1and .

1 4 1 4g

C L PN

V DV I I

D D D D

-= =

- - - - (11)

The DC-bus voltage equals either the capacitor voltage in NST states or zero in ST state. Thus, the peak voltage at the DC-bus of qSBI with the proposed PWM5 method is expressed as

( )0/ 1 4 .PN C gV V V D D= = - - (12)

The boost factor of the qSBI with the introduced PWM5 strategy is expressed as

( )5 0/ / 1 / 1 4 .PN g C gB V V V V D D= = = - - (13)

To minimize the inductor current ripple as shown in Fig. 5(b), D0 should be equal to D. Thus, the boost factor of qSBI with the introduced PWM5 strategy is 1/(1 – 5D).

The amplitude of the AC output voltage is expanded as

.1 5

go PN

M Vv M V

D

⋅= ⋅ =

- (14)

The inverter voltage gain can be expressed as

/ V ,o gG M B v= ⋅ = (15)

where B represents the boost factor as shown in (1) or (10). Similar to the conventional PWM1 strategy, ST interval

must be inserted into the zero state to guarantee a high-quality output. Thus, the amplitude of vref must be less than VSH. Therefore, the maximum value of D is (1 − M). The voltage gain (M·B) of the conventional PWM1 control strategy and the proposed PWMn control strategy are defined by G1 and Gn, respectively:

1

1 1and .

1 2 2 1 1 ( 1) 1n

M MG M G M

D M nD n M= ⋅ = = ⋅ =

- - - - + (16)

Fig. 6(a) shows boost factor comparison of qSBI with different PWM strategies. The boost factor of the qSBI with the introduced PWM2 strategy is the same as that of the conventional PWM1 method. For the similar ST duty ratio D, the proposed PWMn strategy (with n = 3, 4, 5,...) achieved a higher voltage gain than the PWM1 control method.

Fig. 6(b) shows voltage gain comparison of qSBI with PWM1 strategy and the proposed PWM strategies. The PWM1 method has the lowest voltage gain at the same modulation

0

1VSH

∆iL

T

SH

S0

vtri2

iL

4/3–VSH1/3

T/3 vtri1

-VSH

0

1VSH

∆iL

T

SH

S0

vtri2

3/5

-VSH

T/5 8/5–VSH

vtri1

iL

(a) (b)

3D0TL

TL=T/6

5D0TL

TL=T/10

DT/2

DT/2

Fig. 5. Proposed PWM methods for qSBI. (a) PWM3 and (b) PWM5.




5

index. Based on (16), in case of similar voltage gain, if the modulation index in the PWM1 strategy is guaranteed to be M1, the corresponding modulation index (Mn) in the PWMn strategy is expressed as

11

1

( 1).

( 2) 1n

n MM M

n M

-= >

- + (17)

For the proposed PWM5 method, (17) is rewritten as

15 1

1

4.

3 1

MM M

M= >

+ (18)

As shown in (18), the proposed PWMn strategy uses a large modulation index to get better output voltage quality.

Note that the proposed PWM methods cannot be applied to traditional ZS/qZSI because ZS/qZSI does not use an additional switch S0. The proposed PWM methods can be extended to three-phase qSBI. Similar to single-phase qSBI, the three-phase qSBI uses an extra switch S0 to reduce passive components in the impedance-source network. In the introduced PWM methods for three-phase qSBI, the switch S0 and H-bridge switches are controlled individually. By triggering switch S0 control signal in the NST state, the operating frequency of the inductor is increased significantly. Because switches in the H-bridge circuit and switch S0 are individually controlled, the proposed strategies require two carriers to generate control signals for H-bridge circuit switches and switch S0. Consequently, the proposed PWM strategies are more complex than the conventional strategy.

IV. COMPARISON ANALYSIS

For the same input and output case, a comprehensive comparison between the introduced PWM5 strategy and the traditional PWM1 strategy for single-phase qSBI is illustrated in this section. From Fig. 6(b), the modulation index with the introduced PWM5 strategy is larger than that with the PWM1 strategy. The single-stage qSBI with the proposed PWM5 strategy is also compared with a two-stage VSI with the boost converter. The two-stage VSI is created by shorting the diode Dx of qSBI in Fig. 1. In the two-stage VSI with the boost converter, the modulation index at inverter side can be set at the maximum value of one. Thus, the voltage stress of the switch, capacitor, and diode in the two-stage VSI is lower than that in the single-stage qSBI. However, the two-stage VSI with the boost converter cannot immunize with ST phenomenon. Therefore, a dead time between two switches in a phase leg must be required to keep the two-stage VSI from short circuit. Consequently, the distortion of output current in the two-stage

VSI is increased even though the maximum modulation index is used [28].

A. Ripple Comparison

The HF peak-to-peak capacitor voltage and inductor current ripples in the conventional PWM1 strategy [11] are:

( )( )1 1 1

_ PWM1 _ PWM11

1and .

1 2 2g L

L C

V D D T I DTI V

L D C

-D = D =

- (19)

From (2), the HF capacitor voltage and inductor current ripples in the proposed PWM5 strategy in NST state 1 are

( )( )_ PWM5 _ PWM5

1 5and .

2 2 1g L

L C

DV T D D I TI V

L D C

-D = D =

- (20)

From (18), the relationship between ST duty ratio (D1) in the conventional PWM1 method and the ST duty ratio (D) in the introduced PWM5 method for the same voltage gain is

( )1 1/ 4 3 ,D D D= - (21)

Substituting D of (21) into (20), and comparing ΔIL_PWM1 and ΔVC_PWM1 to those in (19), the HF peak-to-peak capacitor voltage and inductor current ripples in the introduced PWM5 strategy are smaller than those in the PWM1 strategy.

Peak values of the LF capacitor voltage and the LF inductor current under the conventional PWM1 strategy indicated in [11] are:

_ PWM1 2 2

_ PWM 1 2 2

(1 2 )ˆ2 4 (1 2 )

ˆ .4 (1 2 )

mL

mC

D MIi

LC D

LMIv

LC D

(22)

Applying the analysis method in [11], the LF capacitor voltage and the LF inductor current with the introduced PWM5 strategy are obtained with the following:

_ PWM5 2 2 2 2

_ PWM5 2 2

( 1)(1 5 ) (1 5 ) cos(2 )

4 (1 5 ) 2 4 (1 5 )

sin(2 ).

4 (1 5 )

PN mL

mC

D D i D M I ti

LC D LC D

LM I tv

LC D

(23)

Peak values of the LF capacitor voltage and the LF inductor current in the PWM5 strategy are calculated as

_ PWM 5 2 2

_ PWM 5 2 2

(1 5 )ˆ2 4 (1 5 )

ˆ .4 (1 5 )

mL

mC

D MIi

LC D

LMIv

LC D

(24)

Substituting (18) and (21) into (24), and comparing _ PWM1Li

and _ PWM1Cv to those in (22), peak values of the LF capacitor voltage and the LF inductor current in the introduced PWM5 strategy are larger than those in the PWM1 strategy. The LF oscillation of the capacitor voltage and the inductor current can be efficiently eliminated by using an active filter method as described previously [29]. Total peak-to-peak ripples on the inductor current and the capacitor voltage are defined as:

ˆ ˆ2 and 2 .

P P P PL L L C C Ci i I v v V (25)

Fig. 6. (a) Boost ratio and (b) voltage gain with different PWM methods.




6

TABLE I

VOLTAGE AND CURRENT STRESSES OF QSBI AND QZSI WITH DIFFERENT PWM

CONTROL STRATEGIES qZSI qSBI

Conventional

PWM1 Conventional

PWM1 Proposed PWM5

VC/Vg

11 / (1 2 ) D

11 / (1 2 ) D 1/ (1 5 ) D

G 1 1/ (2 1)M M 1 1/ (2 1)M M / (5 4)M M

VDS0-4, VDx, VDy 11 2

gV

D

11 2gV

D

1 5gV

D

VPN 1/ (1 2 )gV D

1/ (1 2 )gV D

/ (1 5 )gV D

IL /o gP V

/o gP V

/o gP V

IPN 1

1

1 2

1o

g

PD

D V

1

1

1 2

1o

g

PD

D V

1 5

1

o

g

PD

D V

Li 1 1

2 21

0.5(1 2 )

4 (1 2 )mD M I

LC D

1 12 2

1

0.5(1 2 )

4 (1 2 )mD M I

LC D

2 2

0.5(1 5 )

4 (1 5 )

mD MI

LC D

Cv

12 2

14 (1 2 )mLM I

LC D

12 2

14 (1 2 )mLM I

LC D

2 24 (1 5 )

mLMI

LC D

ΔIL ( )( )1 1

1

1

2 1 2gV D D T

L D

-

- ( )

( )1 1

1

1

1 2gV D D T

L D

-

-

2gDV T

L

ΔVC 1LI DT

C 1

2LI DT

C ( )1 5

2(1 )LD D I T

D C

-

-

P PLi

1 12 2

1

1 1

1

(1 2 )

4 (1 2 )

1

2 1 2

m

g

D M I

LC D

V D D T

L D

1 12 2

1

1 1

1

(1 2 )

4 (1 2 )

1

1 2

m

g

D M I

LC D

V D D T

L D

2 2

(1 5 )

4 (1 5 )

2

m

g

D MI

LC D

DV T

L

P PCv

12 2

1

1

2

4 (1 2 )m

L

LM I

LC D

I D T

C

12 2

1

1

2

4 (1 2 )

2

m

L

LM I

LC D

I DT

C

2 2

2

4 (1 5 )

1 5

2(1 )

m

L

LMI

LC D

D D I T

D C

TDR 1

1 1

(9 8 D ) V

(1 D ) 1 2

g LI

D

1 g

1 1

(6 5 D ) V

(1 D ) 1 2LI

D

g(6 2 D ) V

(1 D ) 1 5LI

D

Here, VDx, VDy, VDS0-4, VPN, IPN, IL, and Po are voltage stress on Dx and Dy, drain-source voltage stress on S0-4, DC-Bus voltage, average DC-Bus current in the NST states, inductor current, and output power, respectively.

B. Comparison of Voltage and Current Stresses

Table I shows major equations of single-phase qZSI/qSBI with the traditional PWM1 strategy and the introduced PWM5 strategy. In Table I, the sum of the individual device rating of all semiconductor devices is called total device rating (TDR). Substituting D of (21) into equations of the proposed PWM5 strategy and comparing stresses between these two PWM strategies, voltage stresses on the diodes, switches, capacitor and DC-bus in the introduced PWM5 strategy are lower than those in the PWM1 method for qZSI/qSBI. As a result, the TDR under the proposed PWM5 strategy is significantly limited. Fig. 7 shows the comparative curves of the introduced PWM5 and PWM1 methods in terms of component voltage stresses and TDR. It is worth noting that the voltage stress on diodes, capacitor, and switches of the qSBI is the same. As shown in Fig. 7(a), the voltage stress on capacitor, diodes, and switches of the qSBI under the proposed PWM5 strategy is lower than that under the traditional PWM1 strategy. Furthermore, from Fig. 7(b), the TDR of the qSBI under the introduced PWM5 strategy is also lower than that under the conventional PWM1 method.

C. Power Loss Comparison

Using the PWM1 control method, if the switching frequency of H-bridge switches is fsw, the switching frequency of switch S0, fS0 is 2·fsw. When the proposed PWMn (n = 2, 3, 4…) control method is applied to qSBI, fS0 is 2·(n – 1)·fsw. Therefore, the switching frequency of switch S0 in PWMn method is increased by (n – 1) times.

The switching power loss of switch S0 is determined based on the overlap area of the drain-source voltage and the drain current as shown below

w_s0 0 ( ) / 2,s C L ru f ri fus it t t tP V I f + +⋅ += ⋅ ⋅ (26)

where Vc, IL, tri, tfi, tru and tfu are capacitor voltage, average input current, current rising time, current falling time, voltage rising time and voltage falling time, respectively.

The conduction power loss of switch S0 is 2

_s0 0 _( ) ,cond ds s rmsP R I= ⋅ (27)

where Rds is the on state drain-source resistance of switch S0 and Is0_rms is the RMS current of switch S0. It is calculated as

0 _

_ for PWM1

_ ( 1) for PWMn.

L rmss rms

L rms

I DI

I n D

é ⋅ê= ê⋅ -êë

(28)

The power loss of H-bridge switches includes the switching and conduction power losses. The switching power loss of H-bridge switches is a sum of the switching power losses in NST state (Psw_NST) and ST state (Psw_ST) as

_ _ _sw H sw ST sw NSTP P P= + (29)

with

_

_ o0

4 ( / 2) (2 ) ( ) / 2

2[ i ( ) / 2]d t

2 ,

sw ST C L sw

sw

ru fi ri fu

ru fi ri fuNST C sw

rr C sw

P V I f

P V

t t t t

t t t tf

Q V f

where Qrr and io are the reverse recovery charge and the output current, respectively.

The conduction power loss of H-bridge switches includes conduction power losses in NST state (Pcond_NST) and ST state (Pcond_ST). Thus, the conduction power loss of H-bridge switches is calculated as

_ _ _cond H cond ST cond NSTP P P= + (30)

Fig. 7. Comparison curves of the proposed PWM5 and PWM1 in terms of (a) component voltage stresses/input DC voltage (VC/Vg, VDx,Dy/Vg and VDS0-4/Vg ) and (b) TDR/output power.




7

with

2_

2_ o0

4 ( / 2)

2[ (i ) (1 )]d t ,

cond ST ds L

cond NST ds

P R I D

P R Dp

wp

ìï = ⋅ ⋅ ⋅ïïïíï = ⋅ ⋅ -ïïïîò

where Rds is the on state drain-source resistance of the switch. The inductor copper loss is calculated based on the RMS

current through inductor as 2

_,Cu L rmsLP r I= ⋅ (31)

where rL is the inductor’s resistance, and IL_rms is the RMS value of current through the inductor and calculated as [30]

2 2_ ( ) / 12L rms L LI I I= + D (32)

where ΔIL is the HF peak-to-peak inductor current. The inductor core loss for an MPP of 125µ [31] is expressed

as 1.98 1.640.33 , fe L c mP B f A l (33)

where B is the peak AC flux density; fL = 1/TL is the operating frequency of inductor; Ac is the core cross-sectional area; and lm is the core mean magnetic path length. The peak AC flux density is given by the following equation:

,2

pkL

e

VB D T

A N= ⋅

⋅ (34)

where Vpk and N are the peak voltage across the coil and the turn number, respectively.

The power loss of capacitor is calculated as 2

_ , C C C rmsP r I (35)

where rc represents the equivalent series resistance (ESR) of the capacitor; and Ic_rms is the RMS capacitor current and calculated based on Fig. 9(b) for the proposed PWM5 method as

2 2_

0 0

1 1(4 ) ( ) (1 5 ) .C rms o L oI i D d t i i D d t

p p

w wp p

= ⋅ ⋅ + - ⋅ - ⋅ò ò (36)

The power loss of diode contains the conduction loss and the reverse recovery loss. The conduction loss of Dx, Dy and the free-wheeling body diode under the PWM5 method is calculated as

2_ L o L o

0

2L L

0

2o

0

1[ ( i ) ( i ) ](1 D)d t

1[ ( ) ( ) ].(1 4 D)d t

2[ ( ) ( ) ].( / 2)d t .

con D D D

D Do

D o Do

P U i R i

U i R i

U i R i D

p

p

p

wp

wp

wp

= ⋅ - + ⋅ - -

+ ⋅ + ⋅ -

+ ⋅ + ⋅

ò

ò

ò

(37)

where UD is the forward voltage drop of the diode, RD is the equivalent resistance of the diode, RDo is the equivalent resistance of the body diode.

The reverse recovery loss of Dx and Dy is calculated as

( ) ( )r _P 2 8

10 .

r D rr d C sw rr d C sw

rr d C sw

Q V f Q V f

Q V f

- -

-

= ⋅ ⋅ + ⋅ ⋅

= ⋅ ⋅ ⋅ (38)

where Qrr-d is the reverse recovery charge of the diodes Dx and Dy.

Table II shows parameters for power loss calculation. Using (26)-(38), the power losses of the qSBI and the two-stage VSI with the boost converter are determined. Fig. 8 shows loss distribution of the two-stage VSI with the boost converter and the qSBI under the PWM1 method and the proposed PWM5

strategy when Vg is at 60 V and Po is at 400 W. Although the proposed PWM5 strategy increases the conduction and switching losses of S0, total power loss of all switches in the qSBI under the proposed PWM5 method is still lower than that under the PWM1 method. This is because the voltage stress on switches and the ST time interval with the proposed PWM5 method are significantly reduced. Thus, conduction and switching losses of switches on the H-bridge under the proposed strategy are lower than those under the PWM1 strategy. Fig. 9 shows the capacitor current waveform of the qSBI with the PWM1 strategy and the proposed PWM5 method. As shown in Fig. 9, the RMS current of the capacitor under the proposed PWM5 method is lower than that under the PWM1 method. Thus, the capacitor loss of the qSBI under the introduced PWM5 strategy is dropped. Furthermore, because the HF peak-to-peak inductor current with the introduced PWM5 strategy is lower than that with the PWM1 strategy, the RMS current of the inductor under the proposed PWM5 method is lower than that under the PWM1 method at the same average inductor current. Consequently, the inductor copper loss under the proposed method is lower than that under the PWM1 method. Because both peak inductor voltage and ST time interval with the proposed PWM5 are reduced, peak AC flux density with the proposed PWM5 is also decreased. Thus, the

TABLE II PARAMETERS FOR POWER LOSS CALCULATION

Parameters Values MOSFETs (IRFP460) 20 A, 500 V, rs=0.27 Ω Diodes (FF60UP30DN) 60A, 300 V, rD = 15 mΩ ESR of C capacitor at 450 VDC 50 mΩ (1360 µF) Parasitic resistance of inductors 0.12 Ω Inductor core CM778125 (178 nH/N2) Output voltage 110 VRMS

Fig. 8. Power loss comparison between two-stage VSI and the single-stage qSBI with PWM1 and PWM5 methods at output power of 400 W.

iC T

(a)

-IL

IL - io

iC

T

-io

IL - io

ST state

NST state 1

ST state

(b)

0 0

Fig. 9. Capacitor current waveform of the qSBI with (a) the traditional PWM1 strategy and (b) the proposed PWM5 strategy.




8

core loss with PWM5 method is reduced even though the operating frequency of the inductor is increased. Therefore, the efficiency of the qSBI under the introduced PWM5 strategy is higher than that under the PWM1 method under the same operating condition.

Fig. 8 also compares the power loss between qSBI with the proposed PWM5 strategy and the two-stage VSI with the boost converter. The same parameters as qSBI were used in the two-stage VSI. The switching frequency of boost converter is 100 kHz, while the switching frequency of H-bridge inverter is 10 kHz. The duty cycle of boost converter and the modulation index of inverter are 0.616 and 1, respectively. As shown in Fig. 8, the inductor and capacitor losses in qSBI under the PWM5 strategy are the same as those in the two-stage VSI with the boost converter. Because qSBI uses an additional diode Dx, the total diode loss in qSBI with PWM5 strategy is higher than that in the two-stage VSI. Meanwhile, the conduction and switching losses of switch S0 in qSBI with PWM5 strategy are lower than those in the two-stage VSI. The main reason is because the number of turning on/off time of switch S0 in boost converter of the two-stage VSI in the half-switching period of H-bridge circuit is five, while it is four in qSBI with PWM5 strategy. On the other hand, the conduction and switching losses of H-bridge switches in qSBI with PWM5 strategy are higher than those in the two-stage VSI because the ST state is inserted into H-bridge circuit in qSBI. It is worth noting that the dead-time effect in H-bridge circuit of the two-stage VSI is ignored in the power loss calculation. In summary, the total power loss of qSBI with PWM5 strategy is higher that of the two-stage VSI with the boost converter.

V. SIMULATION AND EXPERIMENT RESULTS

A. Simulation Results

In order to validate the operating principle of the single-phase qSBI with the proposed PWM strategy, PSIM simulation is performed. Table III lists simulation parameters for the single-phase qSBI. Fig. 10 shows simulation results with a passive load of 30 Ω and 6 mH for qSBI at Vg = 60 V and Po = 400 W. To generate the same output voltage of 110 V in RMS from input voltage of 60 V, ST duty cycle and modulation index in the proposed PWM5 strategy are 0.133 and 0.867, respectively. ST duty cycle and modulation index are 0.38 and 0.62, respectively, for the conventional PWM1 and proposed PWM2 methods.

Table IV shows calculated and simulation results of the current and voltage stresses of qSBI and qZSI with different PWM control methods. As shown in Table IV, the qSBI under the introduced PWM5 strategy has many merits over that under the conventional PWM1 method: lower voltage stress, improved modulation index, and lower HF peak-to-peak capacitor voltage and inductor current ripples. The demerit of the introduced PWM5 strategy is that the LF capacitor voltage and inductor current ripples are greater than those in the PWM1 method. However, total peak-to-peak inductor current ripple of the qSBI with the introduced PWM5 strategy is lower than that with the PWM1 method. With the proposed PWM5 method, the TDR is dramatically decreased as shown in Table IV.

Table IV also compares the proposed PWM2 method to the

conventional PWM1 method. As shown in Table IV, the qSBI under both PWM1 and PWM2 methods has the same value of the voltage gain, voltage stress across the capacitor, switch and diodes, LF ripple on capacitor voltage and inductor current, and TDR. Furthermore, the proposed PWM2 method is easy to implement because it uses the two carrier waveforms as the conventional PWM1 strategy (see Fig. 2 and Fig. 3). Because the switching frequency of S0 under both PWM1 and PWM2 methods is the same, the switching loss for S0 under the proposed PWM2 method is also the same as that under the conventional PWM1 strategy. Because the operating frequency

TABLE III SIMULATION AND EXPERIMENT PARAMETERS Parameters Values

Power rating 500 W Inverter output voltage 110 Vrms / 50 Hz Input voltage 60 – 80 V Inductor (L) and capacitor (C) 2 mH and 1360 µF/ 450 V

Switching frequency S0

80 kHz with PWM5 20 kHz with PWM1

S1-4 10 kHz

(a) (c)

(b) (d) Fig. 10. Simulation results for qSBI under (a)(b) PWM1 method and (c)(d) PWM5 method. From top to bottom: (a)(c) DC-bus voltage, capacitor voltage, inductor current and load current; and (b)(d) DC-bus voltage, control gate signal of S0, input current and diode Dy voltage.




9

of the input inductor in the proposed PWM2 method is double of that of the conventional PWM1 method, the HF inductor current ripple in the proposed PWM2 strategy is less than that of the conventional PWM1 strategy as shown Table IV. As a result, the size and cost of the inductor and capacitor are decreased when the proposed PWM2 method is used.

B. Experiment Results

A 500-W prototype was set up in the laboratory to verify the effectiveness of the introduced PWM5 technique. Insulated TLP250 amplifiers were used to control five IRFP460 MOSFETs. Two FF60UP30DN diodes were used in the single-phase qSBI. The inductance of L was 2 mH. Two 450-V/680-µF capacitors were connected in parallel to get 1360-µF capacitance of capacitor C. Note that the capacitor C with voltage rating of 200 V could be used to reduce the size of the qSBI under the proposed PWM5 method. The filter inductor was 6 mH and the resistor load was 30 Ω. Using the proposed PWM5 control method, the operating frequency of switches on H-bridge circuit was 10 kHz, while the switching frequency of the switch S0 was 80 kHz. Fig. 11 illustrates the gating signal generation for the introduced PWM5 strategy.

Fig. 12 presents experimental results of qSBI under the traditional PWM1 strategy and the proposed PWM5 strategy at Vg = 60 V, Vo = 110 Vrms, Po = 400 W, R = 30 Ω, and Ll = 6 mH. In the same input/output voltage cas, with the PWM1 strategy, the peak value of the DC-bus voltage and the capacitor voltage were stepped-up to 270 V as shown in Fig. 12(a). The measured RMS value of output current was 3.57 A while the measured RMS value of output voltage was 110 V. As shown in Fig. 12, inductor current was continuous. The measured THD load current was 1.4%. As shown in Fig. 12(b), the HF peak-to-peak ripple value of inductor current was 3 A while the total inductor ripple current was 5 A as shown in Fig. 12(a). The operating frequency of the input inductor was 20 kHz. With the proposed PWM5 strategy, capacitor voltage and the peak value of the DC-bus voltage were stepped-up to 190 V as shown in Fig. 12(f). Measured RMS values of output current and output voltage were 3.55 A and 110 V, respectively. The input current

was continuous. The measured THD value of output current was 0.8%. The HF peak-to-peak ripple value of inductor current was 0.2 A as shown in Fig. 12(g), while the total inductor ripple current was 3 A as shown in Fig. 12(f). The operating frequency of the input inductor was 100 kHz. These experimental results of the inductor current ripple were higher that the calculation and simulation results (Table IV). This is due to the appearance of parasitic components in the experimental setup.

Fig. 13 shows measured efficiency comparison at different power levels between the two-stage VSI with the boost converter and qSBI with the existing PWM1 and the proposed PWM5 strategies. Because qSBI uses an additional diode Dx, its efficiency is lower than that of the two-stage VSI with the boost converter. A sacrifice on efficiency of 0.5% was found at load power of 480 W to gain ST immunity in qSBI with the introduced PWM5 strategy. The efficiency of qSBI with the introduced PWM5 strategy is greater than that of qSBI with the PWM1 strategy. This is due to the proposed PWM5 strategy

TABLE IV VOLTAGE AND CURRENT STRESSES UNDER TWO PWM METHODS WITH VG = 60 V, VO(RMS) = 110 V AND PO = 400 W

qZSI qSBI with PWM1 with PWM1 with PWM2 with PWM5

Sim. Cal. Sim. Cal. Sim. Cal. Sim. Cal.

D 0.38 0.38 0.38 0.38 0.38 0.38 0.133 0.133 M 0.62 0.62 0.62 0.62 0.62 0.62 0.867 0.867

VDS0-4, VDx, VDy 250 V 250 V 250 V 250 V 250 V 250 V 179 V 179 V

VC 95 V for C2

155V for C1 95 V for C2

155V for C1 250V 250 V 250V 250 V 179 V 179 V

IL 6.8 A 6.67 A 6.9 A 6.67 A 6.9 A 6.67 A 6.72 A 6.67 A ∆IL 2.9 A 2.95 A 2.8 A 2.95 A 0.55 A 0.57 A 0.18 A 0.2 A

∆VC 0.14 V 0.09 V 0.14 V 0.09 V 0.03 V 0.03 V 15 mV 13 mV

Li 0.37 A 0.4 A 0.35 A 0.4 A 0.35 A 0.4 A 0.77 A 0.78 A

Cv 2.2 V 2 V 2 V 1.98 V 2 V 1.98 V 2.86 V 2.93 V

P PLi 3.64 A 3.75 A 3.5 A 3.75 A 1.25 1.37 1.72 A 1.76 A

P PCv 4.54 V 4.1 V 4.14 V 4.05 V 4.03 3.99 5.73 V 5.97

IPN 2. 68 A 2.58 A 2.86 A 2.58 A 2.86 A 2.58 A 2.69 A 2.58 A TDR 16 kVA 11 kVA 11 kVA 1.9 kVA

01

-1 T

0Mi

-Mi180° delay

+Vsh

‐Vsh

OR

+Vsh

‐Vsh

OR

Card DSP TMS28F335

NOT

NOT

OR

OR

OR

OR

S4

S2

S3

S1

X-ORS0

01

-1T

‐Vsh

1.6

Vsh

1.6

OR

Fig. 11. Gating signal generation for proposed PWM5 control method.




10

uses a lower ST interval to produce the same voltage gain. Moreover, voltage stresses on semiconductor devices in the introduced PWM5 strategy are lower than those in the PWM1 strategy. Therefore, conduction loss in the proposed PWM5 strategy is significantly decreased.

Fig. 13. Measured efficiency comparison between the two-stage VSI with the boost converter and the qSBI with PWM1 and PWM5 schemes. (a) Vg = 60 V and (b) Vg = 80V.

VI. CONCLUSIONS

This paper proposed a new family of PWM strategies for qSBI. In comparison with the conventional PWM strategy, the proposed PWM strategies have higher efficiency. Under the same operating conditions, comparison results illustrated that voltage stress on semiconductor devices and capacitor of the single phase qSBI with the introduced PWM strategy was lower than that with the conventional PWM strategy. Furthermore, HF ripple of the current through the inductor was significantly reduced. Demerits of the proposed PWMn (n = 3, 4, 5…) strategies over the conventional PWM strategy are: 1) the LF ripple on capacitor voltage and inductor current is increased, 2) the switching loss of the switch S0 is higher, and 3) PWM generation is more complex. When the proposed PWM2 method is compared to the existing PWM1 method, three obvious issues of the proposed PWM methods do not appear. Because the proposed PWM2 strategy has a low HF ripple on inductor current and capacitor voltage, it can be used to replace the conventional PWM1 method. Circuit analysis, operating principles, and simulation results for qSBI with the introduced PWM strategy are shown. A prototype was built and the effectiveness of the proposed PWM5 scheme was validated.

Because qSBI with the proposed PWM strategies has a high reliability, it can be used to replace the two-stage VSI with the boost converter for applications where the required voltage gain is in the range of 2 to 3. Therefore, qSBI should have a performance that lies between qZSI and two-stage VSI with the high boost converter.

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(a) (f)

(b) (g)

(c) (h)

(d) (i)

(e) (j) Fig. 12. Experimental results for qSBI under (a)–(e) PWM1 method and (f)–(j)the proposed PWM5 method. From top to bottom: (a)(f) DC-bus voltage,capacitor C1 voltage, source current and output current; (b)(g) Input current,DC-bus voltage, capacitor C1 voltage and load current; (c)(h) Control gatesignals of S0 – S3; (d)(i) Output voltage and its harmonic spectrum; and (e)(j)Output current and its harmonic spectrum.




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[30] R. W. Erickson, and D. Maksimovic, Fundamentals of Power Electronics. Norwell, Mass.: Kluwer Academic Publishers, 2001.

[31] ChangSung CSC Catalog 2011, Magnetic Powder Cores. http://www.mhw-intl.com/wp-content/uploads/2011/10/CSC-Catalog-2011.pdf (page 14).

Minh-Khai Nguyen (S’09–M’12) received the B.S. degree in electrical engineering from the Ho Chi Minh City University of Technology, Ho Chi Minh City, Vietnam, in 2005, and the M.S. and Ph.D. degrees in electrical engineering from Chonnam National University, Gwangju, Korea, in 2007 and 2010, respectively. He was a lecturer with Ho Chi Minh City University of Technology and Education, Ho Chi Minh city, Viet Nam. He is currently an Assistant Professor with Chosun University,

Gwangju, Korea. His current research interests include impedance source inverters and power converters for renewable energy systems.

Dr. Nguyen served as a Guest Associate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS special issue on the impedance source converter topologies and applications.

Tan-Tai Tran received the B.S. degree in electrical and electronic engineering technology and the M.S. degree in electronic engineering in 2012 and 2016, respectively, all from Ho Chi Minh City University of Technology and Education, Ho Chi Minh city, Viet Nam. He has been working toward the Ph.D. degree in Electrical Engineering at the Department of Electrical Engineering, Chonnam National University, Gwangju, Korea. His current research interests include renewable energy systems, automation systems, dc–dc converters, and dc–ac inverters.

Young-Cheol Lim (M’85) was born in Chonnam, Korea, in 1953. He received the B.S. degree in electrical engineering from Chonnam National University, Gwangju, Korea, in 1975, and the M.S. and Ph.D. degrees in electrical engineering from the Korea University, Seoul, Korea, in 1977 and 1990, respectively. Since 1981, he has been a Professor with Chonnam National University, where he was the Director of the Research Center for High-Quality Electric Components and Systems from 1998 to 2007. He has coauthored three books. He has authored or

coauthored more than 200 published technical papers. His current research interests include power electronics, control instruments, and neurofuzzy control.

Prof. Lim was the President of the Korea Institute of Power Electronics (KIPE) in 2009. He is involved with various academic societies, such as the KIPE, the Korean Institute of Electrical Engineers, and the Institute of Control, Automation, and Systems Engineers, South Korea. He has received a number of awards, including the 2000 KIPE Best Paper Award, and 2001 KIPE Academic Award.

A Family of PWM Control Strategies for Single-Phase Quasi-Switched-Boost Inverter · 2018-06-21 · simultaneously, Z-source/quasi-Z-source inverters (ZS/qZSIs) have been proposed

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