A FAST AND ACCURATE MULTI-CYCLE SOFT ERROR RATE ESTIMATION APPROACH TO RESILIENT EMBEDDED SYSTEMS DESIGN Department of Computer Engineering Sharif University of Technology Tehran, IRAN Mahdi Fazeli, Seyed Ghassem Miremadi, Hossein Asadi, Seyed Nematollah Ahmadian Presenter: Saman Aliari University of Illinois at Urbana Chamapign
21
Embed
A F AST AND A CCURATE M ULTI -C YCLE S OFT E RROR R ATE E STIMATION A PPROACH TO R ESILIENT E MBEDDED S YSTEMS D ESIGN Department of Computer Engineering.
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
A FAST AND ACCURATE MULTI-CYCLE SOFT ERROR RATE ESTIMATION
APPROACH TO RESILIENT EMBEDDED SYSTEMS DESIGN
Department of Computer EngineeringSharif University of Technology
TIMING DERATING MODELING Find all possible propagated waveforms
Enhanced static timing analysis Record all possible transitions at each reachable gate
Due to glitch at error site How?
Create glitch of width w Represented by two events: (a,t), (ā,t+w)
For both positive and negative glitches Inject two events (a,t), (ā,t+w) at error site Find all events at the outputs of all on-path gates Calculate the error propagation probabilities Pa, Pā for each event The propagation is done until reaching a PO or FF. Error propagation probabilities for all possible waveforms are computed For each waveform, Latching Probability is computed as follows:
S: Setup Time, H: Hold Time, W: Glitch Width, T:Clock Period
T
WHSLP
at t+w
a
11
TIMING LOGIC DERATING
Different Glitches may propagate to the POs or FFs due to re-convergent fan-out
12
ELECTRICAL DERATING MODELING
1. Algorithm: Computing electrical masking while propagating events
2. Vomin(Gj , inputk): Minimum voltage of input k of Gj
3. Vomax(Gj , inputk): Maximum voltage of input k of Gj
4. Vomin(Gj ): Minimum voltage of Gj output
5. Vomax(Gj ): Maximum voltage of Gj output
6. PWo: Output pulse width
7. For each gate Gj in List(Gi) do
8. For each valid waveform (Wl) in Event List(Gj) do
9. Vomin(inputs) = Max(V omin of gate inputs on waveform Wl);
10. Vomax(inputs) = Min(V omax of gate inputs on waveform Wl);
11. Compute Vomin(Gj )
12. Compute Vomax(Gj )
13. Compute Pwo using computed Vomin(Gj ) and Vomax(Gj )
14. end
15. end
A CASE STUDY: ERROR PROPAGATION FOR TWO CLOCK CYCLES
Compute failure probabilities for all FFs, increment the Clock (CLK)
Compute overall design SER
CLK=1
Yes
No
End
Yes No
End of List_Gi?
End of Gate_list?
Compute SFPCi(Gi)
15
EXPERIMENTAL RESULTS: RUN TIME
Execution times for MC simulation approach, SP computation, and MLET approach
• On average, 4 orders of magnitude faster than MC based simulation• Time required to compute SPs is also 5 orders of magnitude less than MC
based simulation
16
EXPERIMENTAL RESULTS: ACCURACY
Difference of derating factors obtained by MLET using various SP variances compared to MC simulations (for an injected pulse width of 50 ps)
• The MLET have an accuracy of about 97% as compared to the MC fault injection approach
17
MULTI-CYCLE SERS
Multi-cycle SER estimation of s820 and s832 ISCAS’89 circuits using MLET
18
CONCLUSIONS & FUTURE WORK SER Estimation is very challenging as it requires dynamic
analysis of transients. The existing SER estimation approaches rely on investigation of
error propagation probabilities for only single cycle resulting in inaccurate system failure rate.
We have proposed a very fast and accurate analytical approach so called MLET which has four main features:
1. It runs very fast.
2. All three masking factors are considered.
3. The effects of error propagation in re-convergent fan-outs are modeled.
4. The effect of multi-cycle error propagation on overall circuit SER is considered.
19
CONCLUSIONS & FUTURE WORK CONT’D
Experimental results extracted for some ISCAS89 circuit benchmark show that MLET is:
4 orders of magnitude faster than the MC simulation based fault injection method
It has an accuracy of about 97%.
Future work: we are going to estimate the SER of a circuit in the presence of Multiple Event Transients (METs) as a reliability concern in ultra deep sub-micron technologies
20
THANK YOU FOR YOUR ATTENTION
21
RELATED WORK: SER MODELING Circuit/Logic-Level Approach