A DVANCED D OWNCONVERSION MIXERS FOR CMOS R ADIO F REQUENCY I NTEGRATED C IRCUITS by HAO L I A thesis submitted to the Department of Electrical and Computer Engineering in conformity with the requirements for the degree of Doctor of Philosophy Queen’s University Kingston, Ontario, Canada December 2017 Copyright c Hao Li, 2017
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A D M FOR CMOS RADIO FREQUENCY INTEGRATED CIRCUITS
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of RC network that determines the bandwidth. As can be seen in Fig. 2.21(b), [88] has the
RF signal fed into the directly through a transmission line and an ac coupled capacitor. In
this way, Ctail is now a part of matching network, instead of a load of the node. Combined
with a cross-coupled pair that provided at negative impedance at the mixer output, 20.7 dB
gain can be achieved over a frequency range of 10 to 67 GHz with a power consumption of
only 1.44 mW. This is the highest gain ever achieved over this range of frequency. What is
more, by controlling the bias current of the negative impedance, a wide gain tuning range
of 40 dB is also achieved.
Besides the bandwidth enhancement techniques proposed for Gilbert mixer, the wide-
band matching network is also desired in two situations. First, it is desired when the operat-
ing frequency rises to microwave range for the chip dimensions. Second, it is desired when
the mixer chip is used as a stand alone device. Many wideband matching techniques for
the Gilbert mixers have been proposed too. A common-gate-based, noise-canceling circuit
is used in [48] to realize a wideband matching from 1 to 7 GHz; A common-gate RF stage
with the cross-coupled complementary transistors is adopted in [86] to realize the input
matching for 1 to 10 GHz with a conversion of 3-8 dB; And an LC ladder at the gate of the
common-source transconductor stage is employed in [89] to realize a 25-75-GHz Gilbert
mixer in 90 nm CMOS process.
2.7 Summary
This chapter provides a general review of CMOS downconversion mixers. The current
commutating mixer is thoroughly analyzed first, followed by a summary of performance
enhancing techniques that bring improvements on mixers’ bandwidth, noise and linearity
specifications. With the broader context demonstrated by this chapter, three novel mixer
2.7. SUMMARY 48
topologies with significant performance upgrading are readily presented in the next chap-
ters.
49
Chapter 3
A Low-Power, Low-Noise, Decade-Bandwidth Mixer
3.1 Introduction
In this chapter, modeling and measurement of a modified switched transconductor mixer
(MSTM) with low power, low noise and ultra-broad band are presented. This mixer was
first designed by Ahmed El-Gabaly, a former lab member, but never got measured and an-
alyzed. In this chapter, bandwidth analysis of the proposed mixer is first carried out, which
is followed by a discussion on parameters selection and the performance comparison with
the traditional switched transconductor mixer (STM). Additionally, a NF analysis provides
necessary insight into the main noise contributors and verifies the effectiveness of series in-
ductive peaking in the design. These analyses disclose the main advantage of the proposed
mixer: MSTM can work with much less power than STM to achieve same bandwidth and
noise figure, which makes it a preferred choice in low-power ultra-wideband applications.
Ultra broadband low-noise mixers are needed in the multi-band wireless hand held de-
vices and infrastructure. As the number of communication bands increases to provide more
functionality, to handle more users and to enable higher speeds, the bandwidth, NF and lin-
earity specifications of wideband receivers are becoming more stringent. Ultra broadband
3.1. INTRODUCTION 50
active down-conversion mixers are attractive for multi-band RF receivers because they have
the known benefits of high gain and low LO power, yet their moderate to high NF levels,
in the absence of noise mitigation strategies, places strict gain and NF requirements on
the preceding LNA. Therefore, further advances are needed in ultra broadband low-noise
mixers to relax such requirements on the LNA without compromising interdependent per-
formance metrics, including power dissipation.
Several different topologies exist for wideband low-noise down-conversion [90–94].
Among them the most recent and effective approaches are based on current-commutating
mixers with noise-cancelling transconductors [90–92]. The noise cancellation can be real-
ized in various forms. A cross-coupled transistor pair is used in [90] to realize partial noise
cancellation of the common-gate input transistors. A parallel common-source transistor is
employed in [91, 92] to cancel the noise of the common-gate input transistors.
Often, the mixer LO switches are implemented at the current mirror nodes of an am-
plifier in [93] to achieve wideband low-noise down-conversion. While this technique com-
bines the advantages of passive and active mixers, such as low noise and high gain, its
noise bandwidth is limited due to the use of a resonating tank to suppress the major noise
contributors. In [94], the bulk-injection technique is adopted to realize a mixer that covers
the span 3.1−10.6 GHz at a low power consumption of 0.88 mW but a NF of 11.7 dB.
In addition to the efforts in wideband low-noise down-conversion described above,
STM proposed in [95] shows superior noise performance with low power consumption and
low voltage supply. With the transconductors turned on and off by the switches connected
to the supply rails, this mixer’s NF is lower compared to its current-commutating counter-
part for high LO frequencies due to the absence of LO noise at the output. One method to
expand the bandwidth of the STM topology is by adding a push-pull LO driver [96], yet
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 51
this approach increases the power dissipation of the circuit.
The mixer structure presented in this chapter is based on the STM topology. Modifica-
tions are made to inherit superior noise performance of STM while less power is needed to
realize ultra broadband operation. Besides the modification on the mixing core, inductive
peaking is adopted at the RF port to eliminate the capacitive loading effect from the input
transistors. An IF buffer is also integrated on-chip to facilitate experimental testing of the
mixer by providing the drivability of the output 50-Ω load. The buffer incorporates a deriva-
tive superposition distortion canceling subcircuit [61,63–65] to reduce the intermodulation
distortion it produces to better characterize the mixer’s IP3 performance.
3.2 Proposed Method to Increase the Bandwidth of the STM
A qualitative description of the factors that impact the frequency response of the baseline
STM is first provided followed by the proposed method to improve the bandwidth of the
STM using a modified STM (MSTM). A detailed one-to-one comparison between the base-
line STM and the MSTM is carried out in simulation to show the effectiveness of the new
approach.
3.2.1 Bandwidth considerations in the baseline STM
The circuit diagram of the baseline STM topology is given in Fig. 3.1(a). It uses a differ-
ential pair (M1, M2) as the transconductor and a switching block [95]. The switch is driven
by the LO signal and turns the transconductor pair on and off by chopping its tail current,
thus producing the mixing action. The topology is very well-suited for low-voltage appli-
cations and demonstrates potential for significant reductions in NF, because the noise from
the LO stage appears in common mode at the mixer output and thus does not deteriorate
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 52
Figure 3.1: Bandwidth study of the baseline STM: (a) schematic of the baseline STM [95];(b) schematic of the inverter-based LO buffer [95]; (c) waveform of VA with the increase ofLO frequency; (d) schematic of the “push-pull” LO buffer [96].
the differential output signal.
Similar to the current-commutating mixer, the STM transconductor needs to be turned
completely on and off with little transition time to achieve best performance. This is
achieved by the switching stage, which is typically built with CMOS inverters. In a fully-
integrated radio chip, the LO power produced by the frequency synthesizer requires an ad-
ditional boost to produce a suitable waveform to drive the mixer such as the inverter chain
depicted in Fig. 3.1(b). At low LO frequencies, with proper transistor dimensions chosen
for the LO buffers and the switch, VA can be switched between supply rail and ground
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 53
completely and symmetrically. As a result, the conversion gain of the STM is verified [95]
to be the same as that of the current-commutating mixer.
A salient factor that impacts the bandwidth of the STM is the ability of the LO switches
and the inverter-based buffers to produce a rail-to-rail output as the frequency increases.
As illustrated in Fig. 3.1(c), as the LO frequency increases, the time that can be used for
the high/low transitions of VA decreases while the time constants of the inverters remain
unchanged. Eventually when the frequency is larger than a certain value, VA cannot fully
transition from rail to rail. Transients will make the sawtooth waveform VA drift up and
down from the center, which compromises the on/off switching response of the transcon-
ductor and, hence, the mixer.
Efforts have been made to expand the bandwidth of the STM by adding a wideband LO
driver. One such driver used in [96] is drawn in Fig. 3.1(d), which is a “push-pull” structure
to increase the output current-driving behavior. Furthermore, the common-mode voltage of
the driver’s output is fixed by the common-mode feedback circuit. In this way, even if the
magnitude of the driver output voltage cannot reach the supply rail at high frequency, the
transient drift of the signal at VA is much reduced. With VA more consistently centered at
the middle of the supply voltage, the transconductor’s switching is sustained up to a higher
frequency than before. The cost of increasing the frequency response with the push-pull
driver in Fig. 3.1(d) is a noticeable increase in the power consumption. For instance, to
obtain an STM with 8 GHz bandwidth, the buffer design in [96] draws 5 mA per LO+/LO-
buffer from a 1.2 V supply.
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 54
3.2.2 The proposed MSTM concept
Based on the above analysis, STM is power-consuming when operating in wideband be-
cause the switches require wideband LO drivers, which dissipate large amount of power.
Addressing this issue, an MSTM is proposed, in which transconductors can be turned on
and off without rail-to-rail-operating switches, and the power-hungry LO drivers of the
switches can be eliminated while an ultra-wide band can still be achieved. In this way, the
power consumption can be decreased with the same LO power as STM.
The proposed MSTM is depicted in Fig. 3.2(a). The transconductor stage consists of
the differential pair (M1-2) and a resistor RB. The LO signal is fed-in through the coupling
capacitor CB to turn the transconductor on and off and an LO buffer amplifier provides the
driving ability. In the following, the working principle of the MSTM is described to show
how a nearly-constant conversion gain over an ultrabroad bandwidth is achieved when the
LO signal power exceeds a small threshold while keep the buffer circuit power consumption
at a low level.
If the LO signal reaching node A in Fig. 3.2(a) is small, the circuit forms a multiplier be-
cause RF and LO signals together modulate the transconductance (gm) of M1,2. In this case,
the conversion gain exhibits a quite linear dependence on the strength of the LO signal.
As the LO power increases, M1,2 will turn off for part of the LO period. As the LO keeps
rising, M1,2 can eventually turn off for approximately half of the period. Consequently, the
transconductor is turned on and off alternately by the LO and a mixer with similar behavior
of STM is realized.
Next, two key points related to the working principle of the MSTM will be discussed:
(i) the minimum voltage swing of VA needed to fully turn the transconductor off and (ii) the
effective gm of the MSTM. To assist the explanation, refer to Fig. 3.2(b) which shows the
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 55
Figure 3.2: Bandwidth analysis of the modified STM (MSTM) (a) schematic of the MSTM;(b) waveforms of VA, current through the transconductors I1,2 and their transconductancegm1,2.
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 56
waveform at node A, the currents I1,2 through M1,2, and the instantaneous transconductance
of the transistors gm1,2.
The transconductor has to be biased at a point where M1,2 can provide substantial
transconductance. As seen in Fig. 3.2(b), the bias voltage of the gates and the sources
of M1,2 are denoted as VRF,CM and VA,DC, respectively. In this way, the overdrive voltage of
M1,2, VOD, is
VOD = VRF,CM − VA,DC − VTH (3.1)
in which VTH represents the threshold voltage of M1,2. Under this condition, the transcon-
ductance of M1,2 is denoted as gm,0, and the impedance looking into the node A from the
buffer output is (1/2gm,0)//RB. Second, in the MSTM, the load of the LO buffer varies as
a function of the transconductance of M1-2, which impacts VA. For the trivial case when
the LO buffer drives a fixed impedance equal to the impedance of node A under DC bias,
i.e.(1/2gm,0)//RB, let the amplitude of the buffer output be denoted as va, as illustrated
with the dashed curve in Fig. 3.2(b). Now, the solid curve in Fig. 3.2(b), VA is in fact
asymmetrical to VA,DC. As VA increases, the output impedance of the buffer increases from
(1/2gm,0)//RB towards RB, which reinforces the rise of VA. As a result, the upper half
increment of VA from VA,DC is somewhat larger than va. For simplicity, let it be equal to va.
The smallest value of VA that turns M1,2 off, denoted as VOFF, is
VOFF = VRF,CM − VTH, (3.2)
the corresponding minimum amplitude of the buffer output needed to turn off M1,2 can be
written as
va,min = VOD. (3.3)
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 57
When va increases beyond va,min, the transconductor will remain off.
On the other hand, with the same amplitude fed into the LO buffer, the low voltage
appearing at the buffer output, denoted as VON, is much closer to VA,DC due to the negative
feedback in the system. As VA decreases, the transconductance of M1,2 increases, which
decreases the load impedance and thus the gain of the buffer. Therefore, the drop in VA is
diminished and VA still remains close to VA,DC. Thus with a large range of va, the effective
transconductance of the MSTM is approximately gm,0, which is the transconductance under
the DC bias as described above.
To summarize, va must exceed va,min given by (3.3) to make the MSTM work prop-
erly. When va is small, the conversion gain increases linearly to va. As va exceeds va,min,
the effective transconductance remains close to gm,0 and thus the conversion gain stays as
a constant as va increases. The relation between the conversion gain and va is further il-
lustrated by the curve in Fig. 3.3(a). As can be seen, when va is smaller than va,min, the
conversion gain increases linearly. As va exceeds va,min, the conversion gain tends to stay
stable. This character is used here to make the MSTM operate in a wide band without
having a power-consuming wideband LO driver, as explained below.
For the low-pass LO buffer with a certain bandwidth, its output power rolls off quickly
at high frequencies, as illustrated in Fig. 3.3(a). With the increase of LO frequency from
f1 to f3, the amplitude at the buffer output drops considerably from va,1 to va,3. How-
ever, as va,1, va,2 and va,3 are all larger than va,min, the conversion gain realized by MSTM,
ACG,1−ACG,3, are close to one another. Consequently, a nearly flat conversion gain of the
MSTM over a wide frequency from f1 to f3 is achieved, which is illustrated in Fig. 3.3(b).
Therefore, with this feature, a very low-power LO buffer can be used to realize wide-band
down-conversion.
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 58
Figure 3.3: Frequency response of the modified STM (a) with VA as an intermediate vari-able; (b) direct relation between conversion gain and frequency.
3.2. PROPOSED METHOD TO INCREASE THE BANDWIDTH OF THE STM 59
This Work 130 nm 0.2 8.3+145 15.5–17.5 1–10 4–5.2 16.5 116
1 Includes on-chip active wideband baluns.2 Estimated as single-sideband (SSB) NF minus 3 dB.3 With pads.4 Calculated as IIP3[dBm] + gain[dB].5 Power consumed by the mixer and the buffer, respectively.6 Mixer core + IF buffer. De-embedding simulated IF buffer data, the mixer core’s FOMis estimated at 26.6.
amplifiers and mixers [101, 102] has been applied:
FOM[GHz] =BW[GHz]×Gain[1]×IIP3[mW]
(NF[1]−1)×PDC[mW]
=BW[GHz]×OIP3[mW]
(NF[1]−1)×PDC[mW](3.8)
where BW [GHz] is the bandwidth in GHz, Gain [1] is the gain in magnitude, IIP3 [mW] is
the input third-order intercept point in mW, OIP3 [mW] is the OIP3 in mW, (NF [1]− 1)
is the excess NF in magnitude, and PDC [mW] is the dc power consumption in mW. FOMs
calculated with the power of mixer core and the whole chip are both provided. As can
3.5. SUMMARY 83
be seen from Table 3.5, the proposed mixer offers competitive performance over a broad
bandwidth while consuming a small amount of power, thus featuring a high FOM compared
to other work calculated in either way.
3.5 Summary
A low-power, low-noise, wideband mixer in 0.13 µm CMOS is presented in this chapter.
Based on STM structure, a transconductor stage with fixed DC operating point is switched
by the ac-coupled LO signal. In this way, only a small LO signal is required to turn the
transconductor on and off and thus a low-power LO buffer can be used to achieve 15.5 –
17.5 dB gain in 1 – 10 GHz bandwidth. As the noise power from LO stage appears in
common mode at the mixer output, low NF of 4 – 5.2 dB is realized, too. The mixer core
consumes a low power of 8.3 mW from 1.5-V supply, and the whole chip consumes 22.3
mW including the IF buffer. The active chip area is less than 0.2 mm2.
84
Chapter 4
A Highly Linear Gilbert Cell Mixer
4.1 Introduction
This chapter presents a feedforward linearization scheme to improve IIP3 of the active
downconversion mixers. In this scheme, IM2 is created and multiplied by the mixer’s out-
put to generate the low-frequency IM3 for the cancellation. Compared to the traditional
method in which IM3 is generated in RF frequency first and then down-converted for the
cancellation, the proposed method is mostly implemented in IF band and thus robust against
parasitic parameters and less power-consuming. What is more, the realization of the pro-
posed technique is largely independent on the mixer configuration, so that it can be applied
to any downconversion mixer configurations.
Ever-more stringent linearity performance is expected of single-chip mobile receivers
as the spectrum is increasingly crowded with interferers. For example in Wideband Code
Division Multiple Access (WCDMA) system, the receiver needs to support multiple bands
simultaneously [103, 104]. If adopting the popular frequency division duplexing (FDD)
and direct-conversion architecture (DCR), the WCDMA receiver also suffers from large
leakage from TX path. Without having the external pre-select or inter-stage filters, the
4.1. INTRODUCTION 85
single-chip receiver must have high linearity to handle the in/out-of-band blockers, i.e. to
prevent the self-generated intermodulations from interfering with the signal of interest. For
the similar reason, in the emerging multi-mode single-chip receiver, rigorous linearity is
also required to deal with the coexistence of multiple radios like cellular and Wireless Local
Area Network (WLAN), where the blockers come from intra-device coupling [103–105].
Since the mixer is the last building block in the receiver front-end before the interferers
can be filtered off, its linearity requirement is the most stringent. Thus, plenty of efforts
have been made to improve the linearity of the mixers, as introduced in Chap. 2. While
they can bring significant improvement to the IIP3 of the mixer, they have drawbacks that
limit the applications under a lot of circumstances.
One method uses IM2 injection into the current source of the differential transconduc-
tance [66, 78]. The IM2 product mixes with the fundamental input signals to generate an
IM3, which cancels the intrinsic IM3 signal in the main path. This cancellation technique
introduces negligible extra NF and very low extra DC power. However, it can be only used
in the circuit where there is a differential pair with tail current source.
Another method uses the concept of derivative superposition (DS). Originally used
primarily for amplifier linearization, DS has also been applied to mixer linearization as
well [60–62, 64, 65, 79–81]. In this method, multiple input transistors with different bias
are designed in parallel. Under different biases, their third-order derivatives cancel with
each other so that a linear transconductance with less third-order distortions is acquired.
However, it is hard to apply this method at frequencies higher than around 1 GHz, because
at high frequencies, the second-order term of the devices will generate new third-order dis-
tortions with the help of the intrinsic feedback of the circuit. This issue is being actively
studied and inspiring results have been reported recently [65, 81].
4.2. PROPOSED LINEARIZATION TECHNIQUE 86
The feedforward technique in [83] is superior because of its use does not rely on the
mixer topology in the main path. In this method, a whole receiver is employed as the auxil-
iary path, in which the IM3 products are generated, down-converted to baseband, digitized,
and processed by an adaptive equalizer for canceling the IF band IM3 of the main path.
Although the dynamic range of the auxiliary path is much smaller compared to the main
path, the adoption of it still increases the power dissipation as well as the complexity of the
system drastically.
Compared to former state-of-art, the proposed method provides robust IIP3 improve-
ment against the parasitics with lower power dissipation and less dependence on mixer
configuration. To testify the proposed method, a 2 GHz current commutating mixer lin-
earized by the proposed technique is designed and demonstrated in this chapter. The lin-
earization technique achieves 12 dB IIP3 improvement to the mixer at the cost of an extra
current of 4.2 mA and 0.2 dB of noise penalty. In the following, the technique is first in-
troduced from the systematic perspective. Then, circuit implementations of key building
blocks are introduced. Furthermore, its application on the mixer are described with design
details, simulation and measurement results.
4.2 Proposed Linearization Technique
Feedforward scheme is capable of suppressing the nonlinearities without affecting the cir-
cuit topology, since it employs an additional parallel auxiliary path to cancel out the non-
linearities of the main path. As illustrated in Fig. 4.1(a), the nonlinear coefficients that
have same values and opposite signs to that of the main path are generated in the auxiliary
path. Through a linear combination, the nonlinear signal components of the two paths are
canceled out and the linear signal is obtained at the output.
4.2. PROPOSED LINEARIZATION TECHNIQUE 87
A = a1vin + a3vin3
( a )
( b )
vin
A’ = a1’vin_ a3vin
3
vo = (a1 + a1’)vinA
A’
LO
Mixer Combiner
Main Path(Receiver)
Auxiliary Path (Linearization)
IM3
Generator
LO
Main Path(Receiver)
Auxiliary Path (Linearization)
IM3,L = 1- 2
IM3,H = 2- 1
Mixer
1+ LO 2+ LO
RF Band IF Band
IM3,L 1 2 IM3,H
IF Band
1 2
IM3,L IM3,H
IF BandIM3,L+ LO IM3,H+ LO
RF Band
Figure 4.1: Feedforward nonlinearity cancellation technique used (a) in the general case(b) in the case of down-converters
4.2. PROPOSED LINEARIZATION TECHNIQUE 88
The feedfoward linearization technique can be applied to the downconversion mixer to
suppress its the third-order intermodulation terms, as illustrated in Fig. 4.1(b) [83]. In the
auxiliary path, IM3 around fundamental tones need to be generated for the compensation
first. And then, since the IM3 tones to be canceled at the mixer output are at IF frequencies,
the generated IM3 tones need to be down-converted by a mixer before the cancellation.
The method described above is typically power-inefficient and susceptible to the para-
sitics of the analog circuit. Aiming to solve these two problems, a novel scheme is proposed
in this work, in which the IM3 for the compensation is generated directly in the IF band,
which leads to an robust method against the parasitic parameters.
4.2.1 Proposed Feedforward Linearization
A block diagram of the proposed feedforward scheme is given in Fig. 4.2. As can be seen,
an auxiliary path for linearization is added in parallel to the original receiver. In the aux-
iliary path, a low-frequency IM2 product is generated from fundamental input signal first,
and then mixed with mixer output signal to generate an IF IM3 required for the cancellation
with the intrinsic IF IM3 signal in the main path. The combining of the mixer output and
the canceling IM3 can be achieved through reusing the stage appearing after the mixer in a
typical receiver architecture, for example, an op-amp-based IF amplifier or filter. From the
systematic perspective, the combiner used in the proposed technique does not add an extra
stage in the main path. The detailed operation principle and the spectrum at each node are
described assuming two-tone signal applied at the input.
Node A: Two RF signals are applied to the input of the mixer. For simplicity, the initial
amplitude and phase of the signal are assumed to be A0 and 0. The signal appearing at
4.2. PROPOSED LINEARIZATION TECHNIQUE 89
Figure 4.2: The diagram of the proposed feedforward technique
node A can be expressed as
vA = A0cos(ω1 + ωLO)t+ A0cos(ω2 + ωLO)t (4.1)
in which the RF frequencies are expressed as the sum of IF and LO signals for the simpli-
fication of the notation.
Node B: The mixer converts the input RF signal to the IF band by an amount of the LO
frequency. Simultaneously, due to the third-order nonlinearities of the mixer, IM3 tones are
produced near the fundamental ones in the IF frequencies at the output of the mixer. The
4.2. PROPOSED LINEARIZATION TECHNIQUE 90
signals within the band of interest at node B can be expressed as
vB = ACGA0cos(ω1t+ Φ1) + ACGA0cos(ω2t+ Φ2)
+3
4a3A0
3cos(ωIM3,Lt+ Φ3) +3
4a3A0
3cos(ωIM3,Ht+ Φ4)(4.2)
where
ωIM3,L = 2ω1−ω2 (4.3a)
ωIM3,H = 2ω2−ω1 (4.3b)
and ACG and a3 represent the conversion gain and the third-order nonlinear coefficient of
the mixer, respectively; Φ1∼4 represents the additional phase introduced to each tone by the
mixer.
Node C: In the auxiliary path, a low-frequency IM2 tone of the input signal is generated
first at node C, noted as
vC = a2A02cos(ω2 − ω1)t (4.4)
where a2 represents the second-order coefficient of the IM2 generator. As the IM2 tone stays
at low frequency, its phase shift due to parasitic capacitors of the circuit can be ignored here
without losing accuracy. In fact, this phase shift determines the frequency spacing of the
blockers the proposed technique can deal with, which will be discussed in details in next
section.
Node D: The baseband multiplier multiplies the baseband signals at Node B by those at
Node C, generating four third- and four fifth-order tones located around the fundamental
tones of the mixer output. Since the fifth-order products are small and also not related with
IM3 cancellation, they are neglected here and their effects will be discussed later. Here
4.2. PROPOSED LINEARIZATION TECHNIQUE 91
without losing accuracy, only third-order products at node D are listed, as
vD ≈AIM3cos(ω1t+ Φ2) + AIM3cos(ω2t+ Φ1)
+AIM3cos(ωIM3,Lt+ Φ1) + AIM3cos(ωIM3,Ht+ Φ2)
(4.5)
where
AIM3 = 1/2Kma2ACGA03 (4.6)
and Km is the multiplying gain of the baseband multiplier. The phase shift of this operation
is ignored too since it is also in the IF band.
Node E: Signals at Node D are fed back to the main path and added with the mixer output
through a combining circuit to cancel the IM3 tones. Assuming a unit gain of the combiner,
the signals at Node E can be expressed as
vE = ACGA0cos(ω1t+ Φ1) + AIM3cos(ω1t+ Φ2)
+ACGA0cos(ω2t+ Φ2) + AIM3cos(ω2t+ Φ1)
+3
4a3A0
3cos(ωIM3,Lt+ Φ3) + AIM3cos(ωIM3,Lt+ Φ1)
+3
4a3A0
3cos(ωIM3,Ht+ Φ4) + AIM3cos(ωIM3,Ht+ Φ2)
(4.7)
The condition for complete IM3 cancellation is clear: the corresponding tones at same
frequencies should have the same amplitude and 180 of phase difference. Referring to
4.2. PROPOSED LINEARIZATION TECHNIQUE 92
(4.7), this requirement can be translated to the following conditions:
a3 = −2
3Kma2ACG (4.8a)
Φ1 = Φ3 (4.8b)
Φ2 = Φ4 (4.8c)
4.2.2 Discussions on cancellation condition
The cancellation condition in (4.8) reveals alignment requirements of two aspects for the
IM3 tones between the main and auxiliary paths: the amplitude and the phase.
The amplitude alignment, expressed by (4.8a), can be fulfilled by adjusting a2 of the
IM2 generator and Km of the multiplier in the auxiliary path, with ACG and a3 regarded
as constants once the mixer in the main path is designed. Since the entire circuits are
implemented in the differential manner, “–” in (4.8a) can be easily realized by reversing
the positive and negative terminals while combining the signals of the two paths. Note that
the original and the canceling IM3 are both in the third order of input amplitude, and all the
parameters in (4.8a) are device-related and have nothing to do with the input amplitude. In
this way, if (4.8a) is fulfilled, the effective cancellation over wide range of input power can
be achieved because the injected signal automatically tracks with the input signal.
The phase alignment requirement consists of two parts. The first part is explicitly ex-
pressed by (4.8b) and (4.8c). The second part is the validation of the assumption used in
the above derivation for many times, i.e. the phase shifts introduced to the signal of interest
by the auxiliary path can be ignored.
The first part expressed by (4.8b) and (4.8c) originates from the intrinsic working prin-
ciple of the proposed method. In this method, fundamental outputs of the mixer are used to
4.2. PROPOSED LINEARIZATION TECHNIQUE 93
produce IM3 terms for the compensation, along with which their phases shifts (Φ1, Φ2) are
introduced to IM3 terms, too, as explained in (4.5). Thus, from (4.8b) and (4.8c), it appears
that only if the phases of generated IM3 need to be equal to that of their counterpart (Φ3,
Φ4) from the main path, a complete cancellation can be achieved.
Conditions in (4.8b) and (4.8c) can be met spontaneously if the two input tones are
located close to one another. Although Φ1 ∼ Φ4 of the mixer depends on many factors,
such as working frequency, nonlinearities, and the loading effects at the mixer output, the
four tones of the output located at ω1, ω2, ωIM3,L and ωIM3,H experience approximately equal
phase shifts regardless of the circuit topology if the two input tones are located close to
one another, i.e. Φ1 ≈ Φ2 ≈ Φ3 ≈ Φ4. With the increase of two-tone space, the phase
differences among Φ1 ∼ Φ4 start to increase and the IM3 cancellation will thus degrade.
However, the in-band blockers and even the out-of-band blockers are often relatively close
to signal of interest for most of the protocols. Within the required frequency range for these
protocols, the proposed technique are still working effectively.
The second part, i.e. the phase shift assumption, is reasonable because signal of interest
is in the auxiliary path are in the IF band. If the bandwidth of the auxiliary path designed
properly, the phase shift introduced from the auxiliary circuitry to the signal of interest can
be limited to a small range, which does not severely affect the IM3 cancellation. It will be
further described by the circuit description in Section 4.3 and proved by the design example
in Section 4.4.
4.2.3 Effects on Gain and IIP5
While producing IM3 for cancellation, the auxiliary path also generates other tones that
can affect performances of the main path, such as gain and fifth-order input intercept point
4.2. PROPOSED LINEARIZATION TECHNIQUE 94
1 2IM3,L IM3,H
IM5,L IM5,H
D
E
1 2IM5,L IM5,H
IM3,L = 1 - 2
5th-order Tones
3rd-order Tones
1st-order Tones
IM5,H = 2 - 2 1
IM3,H = 2 - 1
IM5,L = 1 - 2 2
Figure 4.3: The spectrum at Node D with 5th order terms considered
(IIP5). As can be observed from both Fig. 4.2 and (4.5) in Section 4.2.1, two tones located at
ω1 and ω2 are generated along the IM3 for the cancellation. What is more, in the description
of the signals at Node D, only the third-order products related to IM3 cancellation were
included for the simplicity of the discussion. In fact, four fifth-order terms are generated at
the same node simultaneously, which can be expressed as
vD,IM5 = AIM5cos(ω1t+ Φ3) + AIM5cos(ω2t+ Φ4)
+AIM5cos(ωIM5,Lt+ Φ3) + AIM5cos(ωIM5,Ht+ Φ4)
(4.9)
where
AIM5 = 1/2Kma2a3A05 (4.10)
4.3. KEY BLOCKS 95
and
ωIM5,L = 3ω1−2ω2 (4.11a)
ωIM5,H = 3ω2−2ω1 (4.11b)
The spectrum at Node D and Node E are redrawn in Fig. 4.3 with all these terms considered,
As can be observed, both the gain and IIP5 are affected by the adoption of the auxiliary path.
However, the effects on both the conversion gain and IIP5 can be neglected without
losing accuracy. To prove it, a quantitative example is provided here. Suppose a two-tone
input signal of -20 dBm is applied at a baseline mixer with an IIP3 of 0 dBm. Then at
the mixer output, the IM3 is 40 dBc below the fundamental tone. Since the generated IM3
tones are in the same order as the uncompensated IM3 of the main path, the largest effects
of these terms on the fundamental tone is around 0.09 dB. Furthermore, AIM5 is smaller
than AIM3 by the same amount of AIM3 to the amplitude of the fundamental tones, which is
40 dBc, too. Therefore, the effect of the IM5 tones is negligible, too.
4.3 Key Blocks
One advantage of the proposed method is that all the operations required in the proposed
technique can be realized either by the circuit topologies reported in the former state-of-
the-art [66,106,107], or by reusing the existing blocks in the receiver. In the following, the
circuit implementation of the key blocks in the proposed diagram of Fig 4.2 are described,
with the key factors in (4.8a) expressed with the device parameters.
4.3. KEY BLOCKS 96
Figure 4.4: Diagram of IM2 generator: (a) building block (b) circuit schematic
4.3.1 IM2 Generator
Based on (4.4), the IM2 generator needs to produce a low-frequency IM2 tone that is in-
phase with the envelope of the input RF signals and proportional to the square of the input
magnitude. Its signal flow diagram is provided in Fig. 4.4(a). As can be seen, the input
signal first goes through a 2nd-order distorter to produce all the second-order harmonics
and intermodulations, and then through a tone selector to pick out the low-frequency IM2
tone among them.
Although appearing as a separate stage in Fig. 4.4(a), the tone selector can be imple-
mented within the distorter circuit. To explain this, suppose the two-tone RF input signals,
4.3. KEY BLOCKS 97
ω1 and ω2, are located at 2.01 and 2.02 GHz. Consequently, the desired IM2 tone ω2 − ω1
is located at 10 MHz, while other second-order tones, including 2ω1, ω1 +ω2, 2ω2 and DC,
are located at 4.02, 4.03, 4.04 and 0 GHz, which can all be well distinguished from 10
MHz. Obviously, the high frequency second-order tones can be easily filtered out by the
low-pass filter integrated at the load of the distorter, and the DC tone can be eliminated by
the inter-stage bias circuit.
The above numerical example also reveals that the high frequency second-order tones
are typically far apart from the desired IM2 tone. As a result, they can be easily filtered
out without introducing significant phase shift to the tone of interest if proper pole position
of the low-pass filter is selected. Thus, in the following circuit analysis, it can be safely
assumed that no phase shift is introduced to the IM2 tone of interest from filtering.
Based on the above analysis, the IM2 generator circuit is proposed, as shown in Fig. 4.4(b).
As seen, The 2nd-order distorter is implemented by a squaring circuit, which is composed
of M1∼M3, R1 and C1. The drain current of M1 and M2 can be expanded using Taylor
series [66], as
in = g1(vg − vs) + g2(vg − vs)2 + g3(vg − vs)
3 + · · · (4.12)
where gi represnts the ith-order transconductance coefficient of the device, which are given
by
g1 =∂IDS
∂VGS, g2 =
1
2!
∂2IDS
∂V 2GS, g3 =
1
3!
∂3IDS
∂V 3GS. (4.13)
If the differential two-tone input signal, as in (4.1), is appled to the squaring circuit, the
fundamental tones will be canceled at the output while the common-mode second-order
4.3. KEY BLOCKS 98
tones remain and can be expressed as
vout,2nd = (A0cosω1t+ A0cosω2t)2
× (−2g2,M1)× [R1//(sC1)−1]
(4.14)
where gi,Mj represents the ith-order transconductance coefficient of Mj . As already ex-
plained above, with proper design of R1 and C1 as well as the DC block C4, the desired
low-frequency IM2 tone can be selected without phase shift, expressed as
Since the squaring circuit produces a single-ended output, an active balun is used to
recast the low-frequency IM2 tone to the differential manner, which is composed of M4,
R2, R3 C2 and C3 in Fig. 4.4(b). As can be seen, to further attenuate the unwanted second-
order tones at RF frequency, RC networks are used at both outputs of the balun, too. The
transfer functions of the balun for the two paths are approximately expressed as
AB+ = − gm,M4R2
1 + gm,M4R3× 1
1 + sR2C2, (4.16a)
AB− =gm,M4R3
1 + gm,M4R3× 1
1 + s R31+gm,M4R3
C3. (4.16b)
To guarantee a balanced differential output, R3 = R2 and C3 = (1 + gm,M4R3)C2 must be
fulfilled. Similar to R1 and C1, with the pole position of the balun designed properly, the
phase shift on the low-frequency IM2 tone can be ignored. Thus, the differential output
signal becomes
vIM2 =4g2,M1gm,M4R1R2
1 + gm,M4R2× A2
0cos(ω2 − ω1)t. (4.17)
4.3. KEY BLOCKS 99
Comparing (4.17) with (4.4), the desired IM2 with an amplitude proportional to A20 is
obtained, and the second-order coefficient of the IM2 generator corresponding to α2 in (4.4)
can be written as
α2 =4g2,M1gm,M4R1R2
1 + gm,M4R2. (4.18)
Note that although phase shift introduced to the desired IM2 tone is negligible with proper
design, it can be large enough to affect the cancellation when the two tone space (ω2 − ω1)
is sufficiently large.
4.3.2 Baseband Multiplier
Based on (4.5), the baseband multiplier multiplies IM2 tones by the mixer output to produce
IM3 for cancellation, which is desired to be proportional to the cubic of the input magnitude
with no extra phase shift introduced during the multiplication.
Fig. 4.5 provides the schematic of the multiplier. As can be seen, this topology uses the
square law of the MOS transistors M1 ∼ M4 to realize multiplication. One set of analog
multiplicator is fed to the gates of squaring transistors directly, while the other is fed to
the sources of same transistors through a pair of source followers consisting of M5 ∼ M8.
Double-balanced structure is used in the multiplier to cancel out all the higher order and
common-mode signals appearing at the output. R1 and R2 converts the output current into
voltage. The multiplying coefficient corresponding to (4.6) can be approximately expressed
as [106, 107]
Km = −µnCox
(W
L
)MiRj (4.19)
in which(WL
)Mi represents the dimension of squaring transistors M1 ∼ M4 and Rj repre-
sents the load resistance R1 and R2.
4.3. KEY BLOCKS 100
Figure 4.5: Circuit schematic of the baseband multiplier
Similar to IM2 generator, the phase shift introduced to the output IM3 tone by the mul-
tiplier can be neglected, too. For the proposed topology, the dominant pole is located at the
output, which consists of the load resistors (R1 and R2) and the parasitic capacitor at the
same node. With sufficient current assigned to the multiplier, dominant pole frequency can
be far from the that of output signal, and thus brings negligible phase shift. This analysis
will be further proven by the simulation results provided in Section 4.4.2.
4.3.3 Signal Combiner
Based on (4.7), the combiner adds output signal of the mixer and that of the auxiliary path
to realize the IM3 cancellation. Because the combiner is subsequent stage of the mixer,
its linearity requirement is rigid to prevent more IM3 terms from being generated during
the signal combination. To quantitatively acquire the linearity requirement, suppose the
proposed technique is applied to a mixer with 10-dB gain and 0-dBm IIP3. Even if the
generated IM3 tones from the auxiliary path are identical in amplitude and 180 out of
4.3. KEY BLOCKS 101
vout+
vout _vx
_
vy _
vx+
vy+
Rf
RfR1
R2
R1
R2
Figure 4.6: Circuit schematic of the signal combiner
phase to the IM3 of the mixer, the combiner still requires an IIP3 of as large as 20 dBm to
achieve an 10-dBm IIP3 improvement for the mixer.
Op-amp-based adder is adopted here to function as the signal combiner, because it
demonstrate superior linearity performance resulting from the use of strong feedback. As
shown in Fig. 4.6, suppose two sets of differential signals, denoted as vx and vy, are applied
at the input, the output of the combiner can be expressed as
vout = −Rf(1
R1vx +
1
R2vy). (4.20)
If Rf = R1 = R2 is fulfilled, the operation expressed in (4.7) is obtained. Obviously, the
weights of vx and vy can be adjusted during combination by controlling the ratio of R1 to
R2.
The fully differential operational amplifier can be realized with the widely-used op amp
circuit shown in Fig. 4.7. As can be seen, it is a two-stage amplifier, with a cascode structure
(M1 - M11) for the first stage and common-source (M12 - M15) as the second. In order to
enlarge the voltage headroom at output, a folded configuration is adopted in the first stage
as well. Miller capacitors C1 and C2 in the second stage are used to compensate the phase
margin for the stability considerations. The common-mode (CM) feedback circuit consists
4.3. KEY BLOCKS 102
V b3
V b2
V b1
V in+
V in-
V out+
V out-
V CM
V dd
V ss
M1
M2
M3
M4M
5
M6
M7
M8
M9
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
R 1 R 2
C3
C4
C1
C2
Figure 4.7: The schematic of the op amp in combiner
4.3. KEY BLOCKS 103
BlockerCW
f
| |Interference
IM3 for Cancellation
Signal
f
Transfer Function
Mixer Output
IM3 for Cancellation
| |
(a)
(b)
Figure 4.8: Transfer function of the combiner illustrated in output spectrum, (a) for two-tone test and (b) for the receiver where IF amplifier/filter is re-used
of a CM level sense circuit (R1, R2, C3 C4) and an active current mirror as the comparator
(M16 - M20).
Although the adoption of op-amp-based adder seems more power-consuming than us-
ing current-mode transconductor-based adder, it is actually power-efficient from systematic
perspective, since the op-amp-based adder can be realized through reusing the subsequent
stage of the mixer in a practical receiver design. In a typical receiver architecture [104], the
mixer is usually followed by IF amplifiers or filters made of op-amp-based circuits, which
can be readily modified to realize the signal combination without affecting their original
functions.
In the above analysis, IIP3 based on two-tone test is the main indicator of the proposed
4.4. CHIP DESIGN DETAILS 104
linearization technique. To get a complete two-tone test result with an accurate IIP3 value,
the combiner needs to demonstrate a flat gain over the frequency covering all the four
output tones, as illustrated in Fig. 4.8(a). As the increase of two-tone space, the bandwidth
requirement of the combiner increases drastically. However, in practical communication
system, the two fundamental tones of the two-tone test actually represent the two blockers,
and the channel of interest is located at where one of the IM3 tone is, as illustrated in
Fig. 4.8(b). Thus, although the IF amplifier/filter in the transceiver re-used as combiner
only covers the band of interest, the proposed scheme is still able to suppress the IM3
tones overlapping on the channel of interest, which is unrelated to the two-tone spacing
frequency.
4.4 Chip Design Details
As a proof of concept, the proposed linearization technique is applied to a 2-GHz Gilbert
mixer to improve its IIP3 performance. The detailed schematic of the proposed circuit is
shown Fig. 4.9.
4.4.1 Mixer Design
The mixer to be linearized adopts a Gilbert cell configuration with its tail current source
omitted, as shown in Fig. 4.9. Although losing some common mode rejection capability due
to the absence of the tail current source, this mixer can work under lower supply voltage,
and is thus widely used in the low voltage applications [42, 108, 109].
This mixer topology is adopted as it is a good example to show the versatility of the
proposed technique. The implementation of many linearization techniques relies on the
configuration of the mixer. For instance, the IM2 injection method [66, 78] needs to inject
4.4. CHIP DESIGN DETAILS 105
Vdd
Vb4
Vb5
Vb0
Vss
v in+
v in
_
Vdd Vss
v LO+
v LO
_
Vb6
Vb6
Vb8
Vb7
Mix
er
Bas
eban
d M
ulti
plie
r
IF A
mpl
ifie
r (C
ombi
ner)
v out
+
v out
_
IM
2G
ener
ator
2nd
-ord
er D
isto
rter
& T
one
Sel
ecto
rA
mpl
itud
e A
djus
tor
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
R33
R35
R7
R8 R9
R17
R18
R19
R20
R21
R23
R22
R24
R25
R26
R10
R11
R12
R14
R13
R16
R15
R27
R28
R29
R30
R31
R32
C7
C8
C9
C10
C11
C12
C14
C13
C15
C16
Vb3
R6
R5C5
C6
Vb2
R4
R3
C3
C4
Vb1
R2
C1
C2
R1
R34
R36
Aux
ilia
ry P
ath
(L
inea
riza
tion
)
Mai
n P
ath
(R
ecei
ver)
Figure 4.9: The circuit implementation of the proposed feedforward technique
4.4. CHIP DESIGN DETAILS 106
IM2 distortion into the tail current source, and thus can be hardly applied to the mixer used
in this work. However, the proposed scheme can be used to linearize this mixer without a
problem, as its application does not depend on the mixer configuration.
The mixer simulates a conversion gain of 8.7 dB and an IIP3 of 2.9 dBm. Translating
these performance specifications to the parameters used in the derivation of Section 4.2.1,
it can be gotten that ACG and a3 are equal to 2.7 and 18.5, respectively.
4.4.2 Linearization Path Design
As shown in Fig. 4.9, the circuit topologies discussed in Sec. 4.3 are adopted to implement
the blocks in the auxiliary path shown in Fig. 4.2. The design target is to generate proper
values for Km and a2 so that (4.8) can be fulfilled. Simultaneously, the phase shift intro-
duced to the signal of interest is desired to be as small as possible over the two-tone space
range from 1 MHz to 20 MHz.
1) IM2 Generator
In addition to the circuit configuration proposed in Section 4.3.1, a variable gain amplifier
(VGA) is supplemented to adjust the amplitude of IM2 tone, forming the IM2 Generator
used in the chip, as can be seen in Fig. 4.9. Two goals are mainly considered during the
design. First, the second-order coefficient of IM2 generator (a2 in Section 4.2.1) with large
tuning range is desired. Second, phase shift introduced to the IM2 tone should be negligible
over a reasonable two-tone spacing frequency.
Before demonstrating the design details, to provide an intuitive illustration of IM2 Gen-
erator’s working principle, the transient waveforms of its input and output are provided in
Fig. 4.10. In this plot, two-tone signals are applied at the input with the tones located at
4.4. CHIP DESIGN DETAILS 107
−0.05
0
0.05(V
)Input differential signal
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16−0.01
−0.005
0
0.005
0.01IM
2 generator output differential signal
time(μs)
(V)
Figure 4.10: Simulated input and output signals of IM2 generator.
2.25 and 2.35 GHz, respectively, both with a strength of -22 dBm. Comparing the input
and output waveforms, it can be observed that the generated IM2 tone is in-phase with the
envelop of input signals.
The second-order coefficient a2 can be adjusted through tuning the bias of squaring
devices (M7, M8) and controlling the gain of VGA. With M7 and M8 designed to be 24-
µm/0.12-µm, g2 versus VGS are plotted in Fig. 4.11. To obtain a wide tuning range for g2,
the transistors are biased at around the middle of slope (0.4 V), at which g2 of around 0.018
A/V 2 is acquired. The VGA, which is realized by a differential common-source amplifier
4.4. CHIP DESIGN DETAILS 108
Figure 4.11: Simulated g2 versus VGS of M7 and M8 in Fig. 4.9.
with resistive source degeneration, provides 8 gain steps from -4.9 dB to 2.8 dB with a step
size of approximately 1.1 dB. Based on these settings, a2 is equal to 4.80 with the gain of
VGA set to -1.6 dB. Taking the tuning capability of the VGA into consideration, a2 ranges
from 3.16 to 8.15.
The phase shift introduced to the desired IM2 tone mainly results from filters used to
attenuate the unwanted IM2 tones at other frequencies. Along with the signal path of IM2
tone in the IM2 generator, there are three first-order low-pass filters located at the load of
each stage (consisting of R7 and C7 , R8,9 and C8,9, R17-20 and the parasitic capacitors at
the same nodes); and three high-pass filters at the biasing circuit of each stage (consisting
of R5 and C5, R10 and C10, R11,12 and C11,12, R13,14 and C13,14). In order to get IF IM2 tone
with negligible in a wide frequency range, the poles of low- and high-pass filters are chosen
to be 1.5 GHz and 30 kHz respectively. Consequently, the phase shift on the IM2 of interest
is less than 10 when the two-tone spacing is in the range of 1 to 50 MHz, as indicated
in Fig. 4.12. At the same time, an attenuation of 9 dB on the unwanted second-order
4.4. CHIP DESIGN DETAILS 109
0 10 20 30 40 50−6
−2
2
6
10
Two−Tone Spacing Frequency (MHz)
Pha
se s
hift
(deg
ree)
Figure 4.12: Simulated phase shifts introduced by the IM2 Generator
harmonics at around 4 GHz can be realized. Obviously, the pole position can be adjusted
to meet the different two-tone bandwidth requirements, which in turn causes changes in
out-of-band suppression and power consumption as a trade off.
In addition, the balance of the active balun in IM2 generator is easy to achieve, because
IM2 tone of interest is located at relatively low frequency. With R8 and R9 designed to be
equal, and C9 to be 30 fF larger than C8, the positive and negative output of the active balun
are well balanced. The amplitude and phase imbalance of the two outputs are plotted in
Fig. 4.13. As can be seen, the amplitude and phase imbalances are limited into 0.005 dB
and 0.15 over the two-tone spacing frequency 0 to 50 MHz. It can be safely assumed that
the two branch are perfectly balanced within the operating bandwidth.
2) Baseband Multiplier
The multiplier used in the chip adopts the exact topology proposed in Section 4.3.2, as
seen in Fig. 4.9. Two goals are mainly considered during the design. First, good linearity
4.4. CHIP DESIGN DETAILS 110
0 10 20 30 40 500.000
0.001
0.002
0.003
0.004
0.005
Two−tone Spacing Frequency (MHz)
Am
plitu
de Im
b. (
dB)
0 10 20 30 40 500
0.03
0.06
0.09
0.12
0.15
0 10 20 30 40 500
0.03
0.06
0.09
0.12
0.15
Pha
se Im
b. (
degr
ee)Amplitude Imbalance
Phase Imbalance
Figure 4.13: Simulated imbalance of the active balun in Fig. 4.9.
is desired to be guaranteed, so that the amplitude of output IM3 tone can be proportional
to the cube of the input RF signal’s amplitude. Second, the phase shift introduced by the
multiplier should be small.
Two measures are taken to enhance the linearity of multiplier. First, proper transistor
sizes are selected to suppress the source of nonlinearity. For the adopted topology, the main
contributor of the nonlinearity is gate-to-source voltage variation of the source followers
when the current of squaring transistors varies. Thus, the transistor sizes of the source fol-
lowers (M17-18) are chosen to be 60-µm/0.12-µm, which are much larger than that of the
squaring circuits (M19-22, 30-µm/0.12-µm). In this way, the gate-to-source voltage variation
of the source followers is less affected by the the current through the squaring transistor.
Second, from systematic perspective, the mixer output signal is attenuated by 12 dB atten-
uation through a voltage divider before arriving at the multiplier, as illustrated in Fig. 4.9,
which prevents the multiplier from being saturated by large blockers at the input.
As a result, the generated IM3 tone is proportional to the cube of the input RF signal’s
amplitude in a large power range. Fig. 4.14 plots the power of IM3 at multiplier output
4.4. CHIP DESIGN DETAILS 111
−30 −25 −20 −15 −10−100
−80
−60
−40
−20
Input RF Power (dBm)
Out
put I
M3 P
ower
(dB
m)
3dB/dB
Input = −13 dBm
Figure 4.14: Power of IM3 at multiplier output versus RF input of the chip
versus RF input of the chip. As can be observed, the output power increases at a slope of
3dB/dB when the input power is in a reasonable range. As the input power keeps increasing,
the curve starts to compress and reach 1 dB compression point eventually when the input
power is up to -13 dBm. However this is already sufficient large for the in-band blockers
in most of the wireless receiver applications.
To guarantee the negligible phase shift, the dominant pole of the multiplier is designed
to be as large as 1050 MHz. The phase shift introduced by the dominant pole of this value
is plotted in Fig. 4.15. As can be seen, the phase shift is less than 6, even when the
output frequency is up to 200 MHz, and only less phase error is thus introduced when the
frequency of output tone is smaller. Thus, phase error from multiplier can barely degrade
the cancellation. Taking 12 dB of attenuation into consideration, the equivalent Km gotten
in this design is around 2.3.
4.4. CHIP DESIGN DETAILS 112
Figure 4.15: Simulated phase shifts introduced by the multiplier
3) Combiner Design
In this work, IIP3 based on two-tone test is the main indicator to demonstrate the effective-
ness of the proposed linearization technique. Thus, to get an accurate two-tone test result,
the combiner needs to demonstrate a flat gain over the frequency that covers all four output
tones. Here, two-tone test result are expected to be observed for a two-tone space from 1
to 20 MHz. With the IF set at 25 MHz for the mixer, a flat gain of the combiner from 1
MHz to 65 MHz is needed. To meet this requirement, a fully differential, two-stage op amp
configuration is adopted. A DC gain of 55 dB and a GBW of 430 MHz is designed for the
op amp. With R27-32 all set to 4 kΩ, a unit gain is achieved with less than 0.2-dB drop up
to 80 MHz.
4.4.3 Simulated IIP3 Improvement on PVT Variation
While a considerable IIP3 improvement is achieved by the design described above, the
extent of the improvement can be affected by the PVT variations.
4.4. CHIP DESIGN DETAILS 113
Table 4.1: IIP3 Improvement versus Process Corners
Gain/∆Gain dB 8.5/0.0 17.6/+5.0 15.0/0.0 22.0/0.0 11.2/−1.8 16.5/+0.5
NF/∆NF dB 17.9/+0.23 10.1/+0.1 14.0/0.0 5.3/0.0 13.8/+1.3 14.2/+0.9
Voltage V 1.2 1.8 1.8 1.5 2.0 1.8
Current/∆Current mA 12.6/+4.24 10.9/+1.7 4.5/+0.5 13.0/+0.3 7.4/0.0 3.0/+0.1
FOM V−1 3.10 2.88 3.09 1.81 1.61 1.82
1 Simulation results.2 The results are that of the front-end, including an LNA and a mixer.3 The NF of the mixer and the IF amplifier as a whole is measured.4 The mixer, IF amplifier and linearization circuits consume 4 mA, 4.4 mA and 4.2 mA, respectively.
in series to combiner is measured to be 17.7 dB when the linearization circuitry is turned
off. When the auxiliary path is turned on, the noise figure only increases by 0.2 dB.
Table 4.3 summarizes the measured performance of the mixer in both unlinearized and
linearized cases. A performance comparison with other state-of-the-art linearization tech-
niques are also demonstrated in the same table. Considering that both gain and linearity
performances are partially determined by the power supply voltage, a linearity figure of
merit (FOM) is adopted here to provide a fair comparison among works developed under
4.6. SUMMARY 120
different supply voltage, defined as:
FOM[V−1
]=
Gain[1]×IIP3[V]
V2DD[V2]
=OIP3[V]
V2DD[V2]
where Gain [1] is the conversion gain in magnitude, IIP3 [V] is the input third-order in-
tercept point in V, OIP3 [V] is the output third-order intercept point in V, and VDD [V] is
the power supply voltage in V. As can be seen from Table 4.3, the proposed mixer offers
competitive linearity performance under a normalized supply voltage, thus featuring a high
FOM compared to other works.
4.6 Summary
A feedforward linearization scheme to cancel the IM3 terms of the mixer is proposed,
which is indifferent to mixer topology at the cost of small amount of extra DC power
and NF deterioration. Unlike the linearization technique in the former state of art, where
an extra full receiver is used to generate IM3, IM3 for cancellation is generated through
the multiplication of low-frequency IM2 signals generated from a squaring circuit and the
IF fundamental signal of the mixer output. Consequently, the power consumption of the
circuitry in the auxiliary path is low and the cancellation through auxiliary path are immune
to the parasitics of the circuit. A IIP3 improvement of 10 dB over a large two-tone space is
demonstrated with negligible noise and gain degradation and small amount of extra current.
121
Chapter 5
A Wideband Transformer-Coupled Mixer
5.1 Introduction
In this chapter, a low-power, wideband current commutating mixer with on-chip balun is
presented. The mixer adopts a folded structure with its transconductor and the switch-
ing stages coupled by a balun, which is made of an on-chip multifilament transformer.
With this balun integrated, the single-ended-to-differential conversion is realized within
the mixer block. Since the transformer is located at the conjunction of the transconductor
and the switching stages, its bandwidth determines the bandwidth of the mixer. The trans-
former network is designed to work at over-coupling state, so that a wide bandwidth can be
achieved. A tunable resistive feedback is used in the transconductance stage to adjust for
the wideband response as well as the wideband input matching.
A balun is usually needed between the LNA and the mixer in a typical wireless receiver
architecture [111,112]. The differential structure is used for the mixer topology to suppress
the even-order nonlinearities, RF/LO feedthroughs as well as the common-mode noise. On
5.1. INTRODUCTION 122
the other hand, most LNA designs reported are single-ended to accommodate the singled-
ended antennas. Thus, a balun is desired between the two blocks to realize the singled-
ended-to-differential signal conversion, which characterizes the balanced amplitude and
phase.
Realizing the balun with good performance in a wideband manner is particularly chal-
lenging, as the gain and phase balances are hard to be maintained in a wide frequency
range. Among all the reported works, there are two distinct types of baluns, i.e., passive
and active baluns.
The active balun is appealing in the circuit design because of its compact size. There
are several types of active balun topologies: single FET circuits, differential amplifier cir-
cuits and common-gate cascaded with common-source (CG-CS) circuits. As the simplest
configuration, the single-FET types generate the differential output signal at the drain and
the source of the FET when the input signal is applied at the gate. Examples can be found
in [113] and [114] with operation frequency up to 2 GHz. However, the parasitic capaci-
tance of the FET makes this type difficult to achieve the required phase balance for ultra
wideband and high-frequency application.
The second type, the differential amplifier balun circuit, usually has poor amplitude and
phase balance because the current source becomes an imperfect open circuit at the high fre-
quency. The leakage signal to the current source will cause the phase and gain imbalances.
One former work utilized this type to implement a balun with very wide frequency range
from 0.2 to 22 GHz, however it consumes a large power of 166 mW [115]. The third type of
the balun is the CG-CS circuit, which demonstrates relatively low power consumption and
adequate isolation. However, it also suffers from parasitic effects when the operating fre-
quency is high. An active phase splitter made in InGaP HBT process adopts this structure,
5.2. MIXER DESIGN 123
which exhibits a maximum amplitude error and a phase error up to 1.3 dB and 8, respec-
tively, in a band of 1850 to 1910 MHz [116]. To improve the performance at high frequency
and wideband applications, the cascode CG can be used in the CG-CS structure [117].
On the other hand, passive on-chip transformers have also been extensively used as
the balun because of their superior common mode rejection ratio (CMRR) and zero power
consumption [118,119]. In the former uses, the transformer is usually tuned to work in res-
onance [118,120]. Although the high signal-to-noise ratio and current gain can be achieved
in this way, the operation bandwidth is narrow.
In this chapter, a mixer with an in-circuit balun is designed. The balun, which is made
of a passive transformer, is tuned to work as an over-coupled resonator to achieve wide
operating band. In the following, the mixer design details with component selection as well
as implementation of transformer is described first. Then measurement results showing the
wideband operation and the balanced output are demonstrated to prove the concept.
5.2 Mixer Design
As shown in Fig. 5.1, the proposed mixer is a folded current commutating mixer with its
transconductance stage and the switching stage coupled by the balun T1. The transcon-
ductance stage is built with a single-ended cascode combined with a resistive feedback
network. The switching stage is fully differential, so is the IF load, which is made of
self-biased current source.
The balun is implemented fully on chip in a standard CMOS 1P8M process. As shown
in Fig. 5.2, stacked structure is adopted for high coupling factor, i.e. the primary spiral is
built in the top metal layer and secondary spiral in the second from the top layer. Fig. 5.3
demonstrates both the top view and the side view of the balun. As can be observed, the