Kenichi Okada, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Ning Li, Shogo Ito, Win Chaivipas, Ryo Minami, and Akira Matsuzawa Tokyo Institute of Technology, Japan Matsuzawa & Okada Lab. A 60GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE 802.15.3c
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Kenichi Okada, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Ning Li, Shogo Ito, Win
Chaivipas, Ryo Minami, and Akira Matsuzawa
Tokyo Institute of Technology, Japan
Matsuzawa& Okada Lab.
A 60GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver
[2] NEC 2.6Gbps/QPSK wired 90nm, Tx, Rx w/o LO 133mW (Tx) 206mW (Rx) 4.5mm2
[3] UCB 4Gbps/QPSK 1m with 25dBi external horn antenna
90nm, single-chip TRx inc. 30GHz PLL and BB
170mW (Tx mode) 138mW (Rx mode) 6.88mm2
[4]U. Toronto 4Gbps/BPSK 2m with 25dBi external
horn antenna65nm, single-chip TRx w/o LO
374mW with 1.2V (233mW with 1.0V) 1mm2
[5] NTU 4Gbps/OOK 2cm with 5dBi on- board antenna
90nm, Tx, Rx, VCO, on-board antenna
183mW (Tx) 103mW (Rx)
0.43mm2(Tx) 0.68mm2(Rx)
[6] NTU 2Gbps/FSK120cm (1Gbps) 55cm (2Gbps) with 5dBi on-board antenna
90nm, single-chip TRx inc. PLL with on-board antenna
280mW (Tx) 150mW (Rx)80mW (PLL)
1.26mm2
[1] S. Pinel et al., ISSCC 2008, pp.130-131 [2] M. Tanomura et al., ISSCC 2008, pp.558-559 [3] C. Marcu et al., ISSCC 2009, pp. 314-315 [4] A. Tomkins et al., JSSC, vol.44, no.8, pp.2085-2099, Aug. 2009 [5] J. Lee et al., ISSCC 2009, pp.316-317 [6] H. Wang et al., VLSI Circuits 2010, pp.95-96
MIM Transmission Line• De-coupling use• Modeling accuracy• Avoiding self-resonance of
parallel-plate capacitors
0123456789
10
0 10 20 30 40 50 60 70Frequency [GHz]
Z0[O
hm]
MeasuredModel
GND
MIM TL
GND
GND
GND
TL
MIM capacitor
MIM transmission line
50Ω
transmission line
[7] T. Suzuki, et al., ISSCC 2008
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Up-Conversion Mixer• Double-balanced Gilbert mixer• Only one side is used
to PA
from LO
from BB I/Q
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Tx Measurement
Psat: 10.9dBmP1dB: 9.5dBmPAE: 8.8% (only PA)
CG: 18.3dBLO freq.: 60.48GHz (ch2)PDC: 186mW
Pin [dBm]
Pout
[dBm
]
-6-4-202468
101214
-30 -25 -20 -15 -10 -5 0 5 10
9.5dBm @ P1dB
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4-Stage CS-CS LNA• Wf=1μm (1st & 2nd stages) for noise opt.• Wf=2μm (3rd & 4th stages) for gain opt.• Small resistors to prevent oscillations• Variable gain by adjusting bias voltages
2Ω
2Ω
2Ω
2Ω
2Ω
2Ω
2Ω
2Ω
W=1μm x40 1μm x40 2μm x20 2μm x20
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Down-Conversion Mixer• Parallel-line transformer• High common-mode rejection in
Direct conversion with 60GHz quadrature oscillators
In-package
[9] M. Tanomura, et al., ISSCC 2008, pp.558-559 [10] J. Lee, et al., ISSCC 2009, pp.316-317[11] A. Tomkins, et al., JSSC, vol.44, no.8, pp.2085-2099, Aug. 2009 [2] C. Marcu, et al., ISSCC 2009, pp. 314-315
伝送レート比較
世界初の60GHz帯16QAMダイレクト コンバージョン無線機を実現
0123456789
101112
2007 2008 2009 2010 2011 2012
Toronto Univ.(only BPSK)
Tokyo Tech
NEC(QPSK)
UCB(QPSK)
OOK
OOKFSK
QPSK
16QAM
Year
Dat
a ra
te [G
bps]
direct-conversionother arch.
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Summary and Conclusion• The first 16QAM direct-conversion transceiver• 60GHz quadrature ILO with 20GHz PLL
– 20dB improvement in phase noise• Full-rate 16QAM/8PSK/QPSK/BPSK
for IEEE802.15.3c• Ch1(57.24-59.40GHz) and Ch2(59.40-61.56GHz)• Standard 65nm CMOS• Antenna built into a package
AcknowledgementThis work was partially supported by MIC, MEXT, STARC, SCOPE, NEDO, Canon Foundation, and VDEC in collaboration with Cadence Design Systems, Inc., and Agilent Technologies Japan, Ltd. The authors thank Dr. Hirose, Dr. Suzuki, Dr. Sato, and Dr. Kawano of Fujitsu Laboratories, Ltd., Dr. Taniguchi of JRC, Dr. Hirachi of AMMSys Inc., Dr. Noda, Mr. Kondo, Mr. Yamagishi, and Dr. Fukuzawa of SONY, and Prof. Ando of Tokyo Institute of Technology for their valuable discussions and technical support.
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For additional multimedia material: See http://www.isscc.org
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60GHz Research Team
Han(modeling) Bunsen(Rx)Matsushita(Tx)
Minami(TRx)
Sato(VCO) Asada(PA)
Musa(PLL)Murakami(ILO)
Yamaguchi(ILO)Okada
Bu(LNA)
2010/9/7@ South Bldg. 9, 5F cleanroom
+W. Chaivipas, N. Li, N.Takayama, S.Ito, Y.Nomiyama+W. Chaivipas, N. Li, N.Takayama, S.Ito, Y.Nomiyama
15 Ph.D. & Master students in 4 years
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Reference[1] K. Scheir, G. Vandersteen, Y. Rolain, and P. Wambacq, “A 57-to-66GHz Quadrature PLL in 45nm
Digital CMOS,” IEEE ISSCC, 29.6, pp.494-495, Feb. 2009.[2] C. Marcu, et al., “A 90nm CMOS Low-Power 60GHz Transceiver with Integrated Baseband
Circuitry,” IEEE ISSCC, 18.5, pp.315-315, Feb. 2009.[3] W. Chan, and J. Long, “A 56-65GHz Injection-Locked Frequency Tripler with Quadrature Outputs in
90-nm CMOS,” IEEE JSSC, vol. 43, no. 12, pp. 2739-2746, Dec. 2008.[4] A. Musa, R. Murakami, T. Sato, W. Chaivipas, K. Okada, and A. Matsuzawa, "A 58-63.6GHz
Quadrature PLL Frequency Synthesizer,“ IEEE A-SSCC, pp.189-192, Nov. 2010.[5] K.-H. Tsai, J.-H. Wu, and S.-I. Liu, "A Digitally Calibrated 64.3-66.2GHz Phase-Locked Loop," IEEE
RFIC, pp.307-310, June 2008.[6] C. Lee, and S.-l. Li, "A 58-to-60.4GHz Frequency Synthesizer in 90nm CMOS," IEEE ISSCC, 10.5,
pp.196-197, Feb. 2007.[7] T. Suzuki, Y. Kawano, M. Sato, T. Hirose, and K. Joshin, “60 and 77GHz Power Amplifiers in
Standard 90nm CMOS,” IEEE ISSCC, 31.3, pp.562-563, Feb. 2008.[8] R. Suga, et al., “Cost-Effective 60-GHz Antenna-Package with End-Fire Radiation for Wireless File-
Transfer System,” IEEE Trans. on MTT, vol.58, no.12, pp.3989-3995, Dec. 2010.[9] M. Tanomura, et al., “TX and RX Front-Ends for 60GHz Band in 90nm Standard Bulk CMOS,” IEEE
ISSCC, 31.1, pp.558-559, Feb. 2008.[10] J. Lee, et al., “A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System with OOK
Modulation and On-Board Antenna Assembly,” IEEE ISSCC, 18.6, pp.316-317, Feb. 2009.[11] A. Tomkins, et al., “A Zero-IF 60GHz 65nm CMOS Transceiver with Direct BPSK Modulation
Demonstrating up to 6Gb/s Data Rates over a 2m Wireless Link,” IEEE JSSC, vol.44, no.8, pp.2085- 2099, Aug. 2009
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Backup slides
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Power ConsumptionTx 186mW
PA 114.6mWMixer 23.0mW x2LO buf. 5.0mW x2QILO 14.9mW
Rx 106mWLNA 20.7mWMixer inc. IF amp. 30.4mW x2LO buf. 5.0mW x2QILO 14.9mW